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2023-12-06 08f87f769b595151be1afeff53e144f543faa614 
 kernel/arch/arm/boot/dts/at91sam9rl.dtsi
....@@ -1,13 +1,11 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
34  *
45  *  Copyright (C) 2014 Microchip
56  *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
6
- *
7
- * Licensed under GPLv2 or later.
87  */
98 
10
-#include "skeleton.dtsi"
119 #include <dt-bindings/pinctrl/at91.h>
1210 #include <dt-bindings/clock/at91.h>
1311 #include <dt-bindings/interrupt-controller/irq.h>
....@@ -15,6 +13,8 @@
1513 #include <dt-bindings/pwm/pwm.h>
1614 
1715 / {
16
+	#address-cells = <1>;
17
+	#size-cells = <1>;
1818 	model = "Atmel AT91SAM9RL family SoC";
1919 	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
2020 	interrupt-parent = <&aic>;
....@@ -38,16 +38,18 @@
3838 	};
3939 
4040 	cpus {
41
-		#address-cells = <0>;
41
+		#address-cells = <1>;
4242 		#size-cells = <0>;
4343 
44
-		cpu {
44
+		cpu@0 {
4545 			compatible = "arm,arm926ej-s";
4646 			device_type = "cpu";
47
+			reg = <0>;
4748 		};
4849 	};
4950 
50
-	memory {
51
+	memory@20000000 {
52
+		device_type = "memory";
5153 		reg = <0x20000000 0x04000000>;
5254 	};
5355 
....@@ -74,6 +76,9 @@
7476 	sram: sram@300000 {
7577 		compatible = "mmio-sram";
7678 		reg = <0x00300000 0x10000>;
79
+		#address-cells = <1>;
80
+		#size-cells = <1>;
81
+		ranges = <0 0x00300000 0x10000>;
7782 	};
7883 
7984 	ahb {
....@@ -88,7 +93,7 @@
8893 			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
8994 			pinctrl-names = "default";
9095 			pinctrl-0 = <&pinctrl_fb>;
91
-			clocks = <&lcd_clk>, <&lcd_clk>;
96
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
9297 			clock-names = "hclk", "lcdc_clk";
9398 			status = "disabled";
9499 		};
....@@ -106,7 +111,7 @@
106111 				  0x3 0x0 0x40000000 0x10000000
107112 				  0x4 0x0 0x50000000 0x10000000
108113 				  0x5 0x0 0x60000000 0x10000000>;
109
-			clocks = <&mck>;
114
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
110115 			status = "disabled";
111116 
112117 			nand_controller: nand-controller {
....@@ -132,7 +137,7 @@
132137 				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
133138 					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
134139 					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
135
-				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
140
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
136141 				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
137142 			};
138143 
....@@ -143,7 +148,7 @@
143148 				#address-cells = <1>;
144149 				#size-cells = <0>;
145150 				pinctrl-names = "default";
146
-				clocks = <&mci0_clk>;
151
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
147152 				clock-names = "mci_clk";
148153 				status = "disabled";
149154 			};
....@@ -154,7 +159,7 @@
154159 				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
155160 				#address-cells = <1>;
156161 				#size-cells = <0>;
157
-				clocks = <&twi0_clk>;
162
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
158163 				status = "disabled";
159164 			};
160165 
....@@ -175,7 +180,7 @@
175180 				atmel,use-dma-tx;
176181 				pinctrl-names = "default";
177182 				pinctrl-0 = <&pinctrl_usart0>;
178
-				clocks = <&usart0_clk>;
183
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
179184 				clock-names = "usart";
180185 				status = "disabled";
181186 			};
....@@ -188,7 +193,7 @@
188193 				atmel,use-dma-tx;
189194 				pinctrl-names = "default";
190195 				pinctrl-0 = <&pinctrl_usart1>;
191
-				clocks = <&usart1_clk>;
196
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
192197 				clock-names = "usart";
193198 				status = "disabled";
194199 			};
....@@ -201,7 +206,7 @@
201206 				atmel,use-dma-tx;
202207 				pinctrl-names = "default";
203208 				pinctrl-0 = <&pinctrl_usart2>;
204
-				clocks = <&usart2_clk>;
209
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
205210 				clock-names = "usart";
206211 				status = "disabled";
207212 			};
....@@ -214,7 +219,7 @@
214219 				atmel,use-dma-tx;
215220 				pinctrl-names = "default";
216221 				pinctrl-0 = <&pinctrl_usart3>;
217
-				clocks = <&usart3_clk>;
222
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
218223 				clock-names = "usart";
219224 				status = "disabled";
220225 			};
....@@ -242,7 +247,7 @@
242247 				reg = <0xfffc8000 0x300>;
243248 				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
244249 				#pwm-cells = <3>;
245
-				clocks = <&pwm_clk>;
250
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
246251 				clock-names = "pwm_clk";
247252 				status = "disabled";
248253 			};
....@@ -255,7 +260,7 @@
255260 				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
256261 				pinctrl-names = "default";
257262 				pinctrl-0 = <&pinctrl_spi0>;
258
-				clocks = <&spi0_clk>;
263
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
259264 				clock-names = "spi_clk";
260265 				status = "disabled";
261266 			};
....@@ -266,7 +271,7 @@
266271 				compatible = "atmel,at91sam9rl-adc";
267272 				reg = <0xfffd0000 0x100>;
268273 				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
269
-				clocks = <&adc_clk>, <&adc_op_clk>;
274
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
270275 				clock-names = "adc_clk", "adc_op_clk";
271276 				atmel,adc-use-external-triggers;
272277 				atmel,adc-channels-used = <0x3f>;
....@@ -301,67 +306,13 @@
301306 			};
302307 
303308 			usb0: gadget@fffd4000 {
304
-				#address-cells = <1>;
305
-				#size-cells = <0>;
306309 				compatible = "atmel,at91sam9rl-udc";
307310 				reg = <0x00600000 0x100000>,
308311 				      <0xfffd4000 0x4000>;
309312 				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
310
-				clocks = <&udphs_clk>, <&utmi>;
313
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
311314 				clock-names = "pclk", "hclk";
312315 				status = "disabled";
313
-
314
-				ep@0 {
315
-					reg = <0>;
316
-					atmel,fifo-size = <64>;
317
-					atmel,nb-banks = <1>;
318
-				};
319
-
320
-				ep@1 {
321
-					reg = <1>;
322
-					atmel,fifo-size = <1024>;
323
-					atmel,nb-banks = <2>;
324
-					atmel,can-dma;
325
-					atmel,can-isoc;
326
-				};
327
-
328
-				ep@2 {
329
-					reg = <2>;
330
-					atmel,fifo-size = <1024>;
331
-					atmel,nb-banks = <2>;
332
-					atmel,can-dma;
333
-					atmel,can-isoc;
334
-				};
335
-
336
-				ep@3 {
337
-					reg = <3>;
338
-					atmel,fifo-size = <1024>;
339
-					atmel,nb-banks = <3>;
340
-					atmel,can-dma;
341
-				};
342
-
343
-				ep@4 {
344
-					reg = <4>;
345
-					atmel,fifo-size = <1024>;
346
-					atmel,nb-banks = <3>;
347
-					atmel,can-dma;
348
-				};
349
-
350
-				ep@5 {
351
-					reg = <5>;
352
-					atmel,fifo-size = <1024>;
353
-					atmel,nb-banks = <3>;
354
-					atmel,can-dma;
355
-					atmel,can-isoc;
356
-				};
357
-
358
-				ep@6 {
359
-					reg = <6>;
360
-					atmel,fifo-size = <1024>;
361
-					atmel,nb-banks = <3>;
362
-					atmel,can-dma;
363
-					atmel,can-isoc;
364
-				};
365316 			};
366317 
367318 			dma0: dma-controller@ffffe600 {
....@@ -369,7 +320,7 @@
369320 				reg = <0xffffe600 0x200>;
370321 				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
371322 				#dma-cells = <2>;
372
-				clocks = <&dma0_clk>;
323
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
373324 				clock-names = "dma_clk";
374325 			};
375326 
....@@ -402,7 +353,7 @@
402353 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
403354 				pinctrl-names = "default";
404355 				pinctrl-0 = <&pinctrl_dbgu>;
405
-				clocks = <&mck>;
356
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
406357 				clock-names = "usart";
407358 				status = "disabled";
408359 			};
....@@ -797,7 +748,7 @@
797748 					gpio-controller;
798749 					interrupt-controller;
799750 					#interrupt-cells = <2>;
800
-					clocks = <&pioA_clk>;
751
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
801752 				};
802753 
803754 				pioB: gpio@fffff600 {
....@@ -808,7 +759,7 @@
808759 					gpio-controller;
809760 					interrupt-controller;
810761 					#interrupt-cells = <2>;
811
-					clocks = <&pioB_clk>;
762
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
812763 				};
813764 
814765 				pioC: gpio@fffff800 {
....@@ -819,7 +770,7 @@
819770 					gpio-controller;
820771 					interrupt-controller;
821772 					#interrupt-cells = <2>;
822
-					clocks = <&pioC_clk>;
773
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
823774 				};
824775 
825776 				pioD: gpio@fffffa00 {
....@@ -830,7 +781,7 @@
830781 					gpio-controller;
831782 					interrupt-controller;
832783 					#interrupt-cells = <2>;
833
-					clocks = <&pioD_clk>;
784
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
834785 				};
835786 			};
836787 
....@@ -838,202 +789,9 @@
838789 				compatible = "atmel,at91sam9rl-pmc", "syscon";
839790 				reg = <0xfffffc00 0x100>;
840791 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
841
-				interrupt-controller;
842
-				#address-cells = <1>;
843
-				#size-cells = <0>;
844
-				#interrupt-cells = <1>;
845
-
846
-				main: mainck {
847
-					compatible = "atmel,at91rm9200-clk-main";
848
-					#clock-cells = <0>;
849
-					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
850
-					clocks = <&main_xtal>;
851
-				};
852
-
853
-				plla: pllack {
854
-					compatible = "atmel,at91rm9200-clk-pll";
855
-					#clock-cells = <0>;
856
-					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
857
-					clocks = <&main>;
858
-					reg = <0>;
859
-					atmel,clk-input-range = <1000000 32000000>;
860
-					#atmel,pll-clk-output-range-cells = <3>;
861
-					atmel,pll-clk-output-ranges = <80000000 200000000 0>,
862
-								<190000000 240000000 2>;
863
-				};
864
-
865
-				utmi: utmick {
866
-					compatible = "atmel,at91sam9x5-clk-utmi";
867
-					#clock-cells = <0>;
868
-					interrupt-parent = <&pmc>;
869
-					interrupts = <AT91_PMC_LOCKU>;
870
-					clocks = <&main>;
871
-				};
872
-
873
-				mck: masterck {
874
-					compatible = "atmel,at91rm9200-clk-master";
875
-					#clock-cells = <0>;
876
-					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
877
-					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
878
-					atmel,clk-output-range = <0 94000000>;
879
-					atmel,clk-divisors = <1 2 4 0>;
880
-				};
881
-
882
-				prog: progck {
883
-					compatible = "atmel,at91rm9200-clk-programmable";
884
-					#address-cells = <1>;
885
-					#size-cells = <0>;
886
-					interrupt-parent = <&pmc>;
887
-					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
888
-
889
-					prog0: prog0 {
890
-						#clock-cells = <0>;
891
-						reg = <0>;
892
-						interrupts = <AT91_PMC_PCKRDY(0)>;
893
-					};
894
-
895
-					prog1: prog1 {
896
-						#clock-cells = <0>;
897
-						reg = <1>;
898
-						interrupts = <AT91_PMC_PCKRDY(1)>;
899
-					};
900
-				};
901
-
902
-				systemck {
903
-					compatible = "atmel,at91rm9200-clk-system";
904
-					#address-cells = <1>;
905
-					#size-cells = <0>;
906
-
907
-					pck0: pck0 {
908
-						#clock-cells = <0>;
909
-						reg = <8>;
910
-						clocks = <&prog0>;
911
-					};
912
-
913
-					pck1: pck1 {
914
-						#clock-cells = <0>;
915
-						reg = <9>;
916
-						clocks = <&prog1>;
917
-					};
918
-
919
-				};
920
-
921
-				periphck {
922
-					compatible = "atmel,at91rm9200-clk-peripheral";
923
-					#address-cells = <1>;
924
-					#size-cells = <0>;
925
-					clocks = <&mck>;
926
-
927
-					pioA_clk: pioA_clk {
928
-						#clock-cells = <0>;
929
-						reg = <2>;
930
-					};
931
-
932
-					pioB_clk: pioB_clk {
933
-						#clock-cells = <0>;
934
-						reg = <3>;
935
-					};
936
-
937
-					pioC_clk: pioC_clk {
938
-						#clock-cells = <0>;
939
-						reg = <4>;
940
-					};
941
-
942
-					pioD_clk: pioD_clk {
943
-						#clock-cells = <0>;
944
-						reg = <5>;
945
-					};
946
-
947
-					usart0_clk: usart0_clk {
948
-						#clock-cells = <0>;
949
-						reg = <6>;
950
-					};
951
-
952
-					usart1_clk: usart1_clk {
953
-						#clock-cells = <0>;
954
-						reg = <7>;
955
-					};
956
-
957
-					usart2_clk: usart2_clk {
958
-						#clock-cells = <0>;
959
-						reg = <8>;
960
-					};
961
-
962
-					usart3_clk: usart3_clk {
963
-						#clock-cells = <0>;
964
-						reg = <9>;
965
-					};
966
-
967
-					mci0_clk: mci0_clk {
968
-						#clock-cells = <0>;
969
-						reg = <10>;
970
-					};
971
-
972
-					twi0_clk: twi0_clk {
973
-						#clock-cells = <0>;
974
-						reg = <11>;
975
-					};
976
-
977
-					twi1_clk: twi1_clk {
978
-						#clock-cells = <0>;
979
-						reg = <12>;
980
-					};
981
-
982
-					spi0_clk: spi0_clk {
983
-						#clock-cells = <0>;
984
-						reg = <13>;
985
-					};
986
-
987
-					ssc0_clk: ssc0_clk {
988
-						#clock-cells = <0>;
989
-						reg = <14>;
990
-					};
991
-
992
-					ssc1_clk: ssc1_clk {
993
-						#clock-cells = <0>;
994
-						reg = <15>;
995
-					};
996
-
997
-					tc0_clk: tc0_clk {
998
-						#clock-cells = <0>;
999
-						reg = <16>;
1000
-					};
1001
-
1002
-					tc1_clk: tc1_clk {
1003
-						#clock-cells = <0>;
1004
-						reg = <17>;
1005
-					};
1006
-
1007
-					tc2_clk: tc2_clk {
1008
-						#clock-cells = <0>;
1009
-						reg = <18>;
1010
-					};
1011
-
1012
-					pwm_clk: pwm_clk {
1013
-						#clock-cells = <0>;
1014
-						reg = <19>;
1015
-					};
1016
-
1017
-					adc_clk: adc_clk {
1018
-						#clock-cells = <0>;
1019
-						reg = <20>;
1020
-					};
1021
-
1022
-					dma0_clk: dma0_clk {
1023
-						#clock-cells = <0>;
1024
-						reg = <21>;
1025
-					};
1026
-
1027
-					udphs_clk: udphs_clk {
1028
-						#clock-cells = <0>;
1029
-						reg = <22>;
1030
-					};
1031
-
1032
-					lcd_clk: lcd_clk {
1033
-						#clock-cells = <0>;
1034
-						reg = <23>;
1035
-					};
1036
-				};
792
+				#clock-cells = <2>;
793
+				clocks = <&clk32k>, <&main_xtal>;
794
+				clock-names = "slow_clk", "main_xtal";
1037795 			};
1038796 
1039797 			rstc@fffffd00 {
....@@ -1052,7 +810,7 @@
1052810 				compatible = "atmel,at91sam9260-pit";
1053811 				reg = <0xfffffd30 0xf>;
1054812 				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1055
-				clocks = <&mck>;
813
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
1056814 			};
1057815 
1058816 			watchdog@fffffd40 {
....@@ -1063,30 +821,11 @@
1063821 				status = "disabled";
1064822 			};
1065823 
1066
-			sckc@fffffd50 {
824
+			clk32k: sckc@fffffd50 {
1067825 				compatible = "atmel,at91sam9x5-sckc";
1068826 				reg = <0xfffffd50 0x4>;
1069
-
1070
-				slow_osc: slow_osc {
1071
-					compatible = "atmel,at91sam9x5-clk-slow-osc";
1072
-					#clock-cells = <0>;
1073
-					atmel,startup-time-usec = <1200000>;
1074
-					clocks = <&slow_xtal>;
1075
-				};
1076
-
1077
-				slow_rc_osc: slow_rc_osc {
1078
-					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1079
-					#clock-cells = <0>;
1080
-					atmel,startup-time-usec = <75>;
1081
-					clock-frequency = <32768>;
1082
-					clock-accuracy = <50000000>;
1083
-				};
1084
-
1085
-				clk32k: slck {
1086
-					compatible = "atmel,at91sam9x5-clk-slow";
1087
-					#clock-cells = <0>;
1088
-					clocks = <&slow_rc_osc &slow_osc>;
1089
-				};
827
+				clocks = <&slow_xtal>;
828
+				#clock-cells = <0>;
1090829 			};
1091830 
1092831 			rtc@fffffd20 {