mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/include/linux/mv643xx.h
..
..
@@ -1,14 +1,10 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
1
2
 /*
2
3
  * mv643xx.h - MV-643XX Internal registers definition file.
3
4
  *
4
5
  * Copyright 2002 Momentum Computer, Inc.
5
6
  * 	Author: Matthew Dharm <mdharm@momenco.com>
6
7
  * Copyright 2002 GALILEO TECHNOLOGY, LTD. 
7
- *
8
- * This program is free software; you can redistribute  it and/or modify it
9
- * under  the terms of  the GNU General  Public License as published by the
10
- * Free Software Foundation;  either version 2 of the  License, or (at your
11
- * option) any later version.
12
8
  */
13
9
 #ifndef __ASM_MV643XX_H
14
10
 #define __ASM_MV643XX_H
..
..
@@ -921,52 +917,6 @@
921
917
 #define MV64340_SERIAL_INIT_STATUS                                  0xf32c
922
918
 
923
919
 extern void mv64340_irq_init(unsigned int base);
924
-
925
-/* MPSC Platform Device, Driver Data (Shared register regions) */
926
-#define	MPSC_SHARED_NAME		"mpsc_shared"
927
-
928
-#define	MPSC_ROUTING_BASE_ORDER		0
929
-#define	MPSC_SDMA_INTR_BASE_ORDER	1
930
-
931
-#define MPSC_ROUTING_REG_BLOCK_SIZE	0x000c
932
-#define MPSC_SDMA_INTR_REG_BLOCK_SIZE	0x0084
933
-
934
-struct mpsc_shared_pdata {
935
-	u32	mrr_val;
936
-	u32	rcrr_val;
937
-	u32	tcrr_val;
938
-	u32	intr_cause_val;
939
-	u32	intr_mask_val;
940
-};
941
-
942
-/* MPSC Platform Device, Driver Data */
943
-#define	MPSC_CTLR_NAME			"mpsc"
944
-
945
-#define	MPSC_BASE_ORDER			0
946
-#define	MPSC_SDMA_BASE_ORDER		1
947
-#define	MPSC_BRG_BASE_ORDER		2
948
-
949
-#define MPSC_REG_BLOCK_SIZE		0x0038
950
-#define MPSC_SDMA_REG_BLOCK_SIZE	0x0c18
951
-#define MPSC_BRG_REG_BLOCK_SIZE		0x0008
952
-
953
-struct mpsc_pdata {
954
-	u8	mirror_regs;
955
-	u8	cache_mgmt;
956
-	u8	max_idle;
957
-	int	default_baud;
958
-	int	default_bits;
959
-	int	default_parity;
960
-	int	default_flow;
961
-	u32	chr_1_val;
962
-	u32	chr_2_val;
963
-	u32	chr_10_val;
964
-	u32	mpcr_val;
965
-	u32	bcr_val;
966
-	u8	brg_can_tune;
967
-	u8	brg_clk_src;
968
-	u32	brg_clk_freq;
969
-};
970
920
 
971
921
 /* Watchdog Platform Device, Driver Data */
972
922
 #define	MV64x60_WDT_NAME			"mv64x60_wdt"