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hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/video/rockchip/rga3/rga_policy.c
..
..
@@ -46,6 +46,53 @@
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 	return feature;
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 }
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48
 
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+static bool rga_check_csc_constant(const struct rga_hw_data *data, struct rga_req *rga_base,
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+				   uint32_t mode, uint32_t flag)
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+{
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+	if (mode & flag)
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+		return true;
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+
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+	if ((rga_base->full_csc.flag & 0x1) && (data->feature & RGA_FULL_CSC))
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+		return true;
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+
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+	return false;
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+}
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+
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+static bool rga_check_csc(const struct rga_hw_data *data, struct rga_req *rga_base)
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+{
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+	switch (rga_base->yuv2rgb_mode) {
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+	case 0x1:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_y2r_mode, RGA_MODE_CSC_BT601L);
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+	case 0x2:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_y2r_mode, RGA_MODE_CSC_BT601F);
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+	case 0x3:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_y2r_mode, RGA_MODE_CSC_BT709);
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+	case 0x1 << 2:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_r2y_mode, RGA_MODE_CSC_BT601F);
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+	case 0x2 << 2:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_r2y_mode, RGA_MODE_CSC_BT601L);
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+	case 0x3 << 2:
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+		return rga_check_csc_constant(data, rga_base,
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+					      data->csc_r2y_mode, RGA_MODE_CSC_BT709);
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+	default:
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+		break;
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+	}
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+
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+	if ((rga_base->full_csc.flag & 0x1)) {
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+		if (data->feature & RGA_FULL_CSC)
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+			return true;
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+		else
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+			return false;
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+	}
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+
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+	return true;
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+}
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+
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 static bool rga_check_resolution(const struct rga_rect_range *range, int width, int height)
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 {
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98
 	if (width > range->max.width || height > range->max.height)
..
..
@@ -118,6 +165,12 @@
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 	if (!rga_check_resolution(&data->input_range, src0->act_w, src0->act_h))
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 		return false;
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+	if (data == &rga3_data &&
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+	    !rga_check_resolution(&data->input_range,
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+				  src0->act_w + src0->x_offset,
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+				  src0->act_h + src0->y_offset))
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+		return false;
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+
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 	if (!rga_check_format(data, src0->rd_mode, src0->format, 0))
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 		return false;
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176
 
..
..
@@ -133,6 +186,12 @@
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 	if (!rga_check_resolution(&data->input_range, src1->act_w, src1->act_h))
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 		return false;
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188
 
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+	if (data == &rga3_data &&
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+	    !rga_check_resolution(&data->input_range,
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+				  src1->act_w + src1->x_offset,
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+				  src1->act_h + src1->y_offset))
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+		return false;
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+
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 	if (!rga_check_format(data, src1->rd_mode, src1->format, 1))
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 		return false;
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..
..
@@ -146,6 +205,12 @@
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 			 struct rga_img_info_t *dst)
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 {
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 	if (!rga_check_resolution(&data->output_range, dst->act_w, dst->act_h))
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+		return false;
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+
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+	if (data == &rga3_data &&
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+	    !rga_check_resolution(&data->output_range,
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+				  dst->act_w + dst->x_offset,
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+				  dst->act_h + dst->y_offset))
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 		return false;
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215
 
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 	if (!rga_check_format(data, dst->rd_mode, dst->format, 2))
..
..
@@ -306,6 +371,13 @@
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 			continue;
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 		}
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373
 
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+		if (!rga_check_csc(data, rga_base)) {
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+			if (DEBUGGER_EN(MSG))
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+				pr_info("core = %d, break on rga_check_csc",
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+					scheduler->core);
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+			continue;
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+		}
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+
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 		optional_cores |= scheduler->core;
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 	}
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