| .. | .. |
|---|
| 1 | +// SPDX-License-Identifier: GPL-2.0 |
|---|
| 1 | 2 | /* |
|---|
| 2 | | - * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
|---|
| 3 | + * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. |
|---|
| 3 | 4 | * |
|---|
| 4 | 5 | * This software is licensed under the terms of the GNU General Public |
|---|
| 5 | 6 | * License version 2, as published by the Free Software Foundation, and |
|---|
| .. | .. |
|---|
| 55 | 56 | .thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK, |
|---|
| 56 | 57 | .thermtrip_enable_mask = TEGRA124_THERMTRIP_CPU_EN_MASK, |
|---|
| 57 | 58 | .thermtrip_threshold_mask = TEGRA124_THERMTRIP_CPU_THRESH_MASK, |
|---|
| 59 | + .thermctl_isr_mask = THERM_IRQ_CPU_MASK, |
|---|
| 58 | 60 | .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, |
|---|
| 59 | 61 | .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, |
|---|
| 60 | 62 | .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, |
|---|
| .. | .. |
|---|
| 73 | 75 | .thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK, |
|---|
| 74 | 76 | .thermtrip_enable_mask = TEGRA124_THERMTRIP_GPU_EN_MASK, |
|---|
| 75 | 77 | .thermtrip_threshold_mask = TEGRA124_THERMTRIP_GPUMEM_THRESH_MASK, |
|---|
| 78 | + .thermctl_isr_mask = THERM_IRQ_GPU_MASK, |
|---|
| 76 | 79 | .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, |
|---|
| 77 | 80 | .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, |
|---|
| 78 | 81 | .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, |
|---|
| .. | .. |
|---|
| 89 | 92 | .thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK, |
|---|
| 90 | 93 | .thermtrip_enable_mask = TEGRA124_THERMTRIP_TSENSE_EN_MASK, |
|---|
| 91 | 94 | .thermtrip_threshold_mask = TEGRA124_THERMTRIP_TSENSE_THRESH_MASK, |
|---|
| 95 | + .thermctl_isr_mask = THERM_IRQ_TSENSE_MASK, |
|---|
| 92 | 96 | .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, |
|---|
| 93 | 97 | .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, |
|---|
| 94 | 98 | .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, |
|---|
| .. | .. |
|---|
| 107 | 111 | .thermtrip_any_en_mask = TEGRA124_THERMTRIP_ANY_EN_MASK, |
|---|
| 108 | 112 | .thermtrip_enable_mask = TEGRA124_THERMTRIP_MEM_EN_MASK, |
|---|
| 109 | 113 | .thermtrip_threshold_mask = TEGRA124_THERMTRIP_GPUMEM_THRESH_MASK, |
|---|
| 114 | + .thermctl_isr_mask = THERM_IRQ_MEM_MASK, |
|---|
| 110 | 115 | .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, |
|---|
| 111 | 116 | .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, |
|---|
| 112 | 117 | .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, |
|---|