mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/staging/media/tegra-vde/uapi.h
..
..
@@ -1,20 +1,13 @@
1
-/*
2
- * Copyright (C) 2016-2017 Dmitry Osipenko <digetx@gmail.com>
3
- *
4
- * This program is free software; you can redistribute it and/or
5
- * modify it under the terms of the GNU General Public License
6
- * as published by the Free Software Foundation; either version
7
- * 2 of the License, or (at your option) any later version.
8
- */
9
-
1
+/* SPDX-License-Identifier: GPL-2.0+ */
2
+/* Copyright (C) 2016-2017 Dmitry Osipenko <digetx@gmail.com> */
10
3
 #ifndef _UAPI_TEGRA_VDE_H_
11
4
 #define _UAPI_TEGRA_VDE_H_
12
5
 
13
6
 #include <linux/types.h>
14
7
 #include <asm/ioctl.h>
15
8
 
16
-#define FLAG_B_FRAME		(1 << 0)
17
-#define FLAG_REFERENCE		(1 << 1)
9
+#define FLAG_B_FRAME		0x1
10
+#define FLAG_REFERENCE		0x2
18
11
 
19
12
 struct tegra_vde_h264_frame {
20
13
 	__s32 y_fd;
..
..
@@ -28,40 +21,42 @@
28
21
 	__u32 frame_num;
29
22
 	__u32 flags;
30
23
 
31
-	__u32 reserved;
32
-} __attribute__((packed));
24
+	// Must be zero'ed
25
+	__u32 reserved[6];
26
+};
33
27
 
34
28
 struct tegra_vde_h264_decoder_ctx {
35
29
 	__s32 bitstream_data_fd;
36
30
 	__u32 bitstream_data_offset;
37
31
 
38
32
 	__u64 dpb_frames_ptr;
39
-	__u8  dpb_frames_nb;
40
-	__u8  dpb_ref_frames_with_earlier_poc_nb;
33
+	__u32 dpb_frames_nb;
34
+	__u32 dpb_ref_frames_with_earlier_poc_nb;
41
35
 
42
36
 	// SPS
43
-	__u8  baseline_profile;
44
-	__u8  level_idc;
45
-	__u8  log2_max_pic_order_cnt_lsb;
46
-	__u8  log2_max_frame_num;
47
-	__u8  pic_order_cnt_type;
48
-	__u8  direct_8x8_inference_flag;
49
-	__u8  pic_width_in_mbs;
50
-	__u8  pic_height_in_mbs;
37
+	__u32 baseline_profile;
38
+	__u32 level_idc;
39
+	__u32 log2_max_pic_order_cnt_lsb;
40
+	__u32 log2_max_frame_num;
41
+	__u32 pic_order_cnt_type;
42
+	__u32 direct_8x8_inference_flag;
43
+	__u32 pic_width_in_mbs;
44
+	__u32 pic_height_in_mbs;
51
45
 
52
46
 	// PPS
53
-	__u8  pic_init_qp;
54
-	__u8  deblocking_filter_control_present_flag;
55
-	__u8  constrained_intra_pred_flag;
56
-	__u8  chroma_qp_index_offset;
57
-	__u8  pic_order_present_flag;
47
+	__u32 pic_init_qp;
48
+	__u32 deblocking_filter_control_present_flag;
49
+	__u32 constrained_intra_pred_flag;
50
+	__u32 chroma_qp_index_offset;
51
+	__u32 pic_order_present_flag;
58
52
 
59
53
 	// Slice header
60
-	__u8  num_ref_idx_l0_active_minus1;
61
-	__u8  num_ref_idx_l1_active_minus1;
54
+	__u32 num_ref_idx_l0_active_minus1;
55
+	__u32 num_ref_idx_l1_active_minus1;
62
56
 
63
-	__u32 reserved;
64
-} __attribute__((packed));
57
+	// Must be zero'ed
58
+	__u32 reserved[11];
59
+};
65
60
 
66
61
 #define VDE_IOCTL_BASE			('v' + 0x20)
67
62