mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/spi/spi-sprd-adi.c
..
..
@@ -77,6 +77,7 @@
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77
 
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 /* Bits definitions for register REG_WDG_CTRL */
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 #define BIT_WDG_RUN			BIT(1)
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+#define BIT_WDG_NEW			BIT(2)
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 #define BIT_WDG_RST			BIT(3)
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82
 
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 /* Registers definitions for PMIC */
..
..
@@ -86,6 +87,7 @@
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 #define BIT_WDG_EN			BIT(2)
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88
 
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 /* Definition of PMIC reset status register */
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+#define HWRST_STATUS_SECURITY		0x02
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 #define HWRST_STATUS_RECOVERY		0x20
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 #define HWRST_STATUS_NORMAL		0x40
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 #define HWRST_STATUS_ALARM		0x50
..
..
@@ -97,6 +99,8 @@
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 #define HWRST_STATUS_AUTODLOADER	0xa0
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 #define HWRST_STATUS_IQMODE		0xb0
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 #define HWRST_STATUS_SPRDISK		0xc0
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+#define HWRST_STATUS_FACTORYTEST	0xe0
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+#define HWRST_STATUS_WATCHDOG		0xf0
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104
 
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 /* Use default timeout 50 ms that converts to watchdog values */
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 #define WDG_LOAD_VAL			((50 * 32768) / 1000)
..
..
@@ -162,14 +166,16 @@
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 	int read_timeout = ADI_READ_TIMEOUT;
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 	unsigned long flags;
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 	u32 val, rd_addr;
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-	int ret;
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+	int ret = 0;
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170
 
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-	ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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-					  ADI_HWSPINLOCK_TIMEOUT,
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-					  &flags);
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-	if (ret) {
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-		dev_err(sadi->dev, "get the hw lock failed\n");
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-		return ret;
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+	if (sadi->hwlock) {
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+		ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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+						  ADI_HWSPINLOCK_TIMEOUT,
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+						  &flags);
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+		if (ret) {
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+			dev_err(sadi->dev, "get the hw lock failed\n");
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+			return ret;
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+		}
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 	}
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180
 
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 	/*
..
..
@@ -216,7 +222,8 @@
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 	*read_val = val & RD_VALUE_MASK;
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223
 
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 out:
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-	hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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+	if (sadi->hwlock)
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+		hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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 	return ret;
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228
 }
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229
 
..
..
@@ -227,12 +234,14 @@
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234
 	unsigned long flags;
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235
 	int ret;
229
236
 
230
-	ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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-					  ADI_HWSPINLOCK_TIMEOUT,
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-					  &flags);
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-	if (ret) {
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-		dev_err(sadi->dev, "get the hw lock failed\n");
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-		return ret;
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+	if (sadi->hwlock) {
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+		ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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+						  ADI_HWSPINLOCK_TIMEOUT,
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+						  &flags);
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+		if (ret) {
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+			dev_err(sadi->dev, "get the hw lock failed\n");
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+			return ret;
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+		}
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245
 	}
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246
 
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 	ret = sprd_adi_drain_fifo(sadi);
..
..
@@ -258,7 +267,8 @@
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267
 	}
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268
 
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 out:
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-	hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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+	if (sadi->hwlock)
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+		hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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272
 	return ret;
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273
 }
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274
 
..
..
@@ -307,6 +317,18 @@
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 	return 0;
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 }
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319
 
320
+static void sprd_adi_set_wdt_rst_mode(struct sprd_adi *sadi)
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+{
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+#if IS_ENABLED(CONFIG_SPRD_WATCHDOG)
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+	u32 val;
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+
325
+	/* Set default watchdog reboot mode */
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+	sprd_adi_read(sadi, sadi->slave_pbase + PMIC_RST_STATUS, &val);
327
+	val |= HWRST_STATUS_WATCHDOG;
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+	sprd_adi_write(sadi, sadi->slave_pbase + PMIC_RST_STATUS, val);
329
+#endif
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+}
331
+
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332
 static int sprd_adi_restart_handler(struct notifier_block *this,
311
333
 				    unsigned long mode, void *cmd)
312
334
 {
..
..
@@ -336,11 +358,16 @@
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 		reboot_mode = HWRST_STATUS_IQMODE;
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359
 	else if (!strncmp(cmd, "sprdisk", 7))
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360
 		reboot_mode = HWRST_STATUS_SPRDISK;
361
+	else if (!strncmp(cmd, "tospanic", 8))
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+		reboot_mode = HWRST_STATUS_SECURITY;
363
+	else if (!strncmp(cmd, "factorytest", 11))
364
+		reboot_mode = HWRST_STATUS_FACTORYTEST;
339
365
 	else
340
366
 		reboot_mode = HWRST_STATUS_NORMAL;
341
367
 
342
368
 	/* Record the reboot mode */
343
369
 	sprd_adi_read(sadi, sadi->slave_pbase + PMIC_RST_STATUS, &val);
370
+	val &= ~HWRST_STATUS_WATCHDOG;
344
371
 	val |= reboot_mode;
345
372
 	sprd_adi_write(sadi, sadi->slave_pbase + PMIC_RST_STATUS, val);
346
373
 
..
..
@@ -356,6 +383,10 @@
356
383
 
357
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 	/* Unlock the watchdog */
358
385
 	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOCK, WDG_UNLOCK_KEY);
386
+
387
+	sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);
388
+	val |= BIT_WDG_NEW;
389
+	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val);
359
390
 
360
391
 	/* Load the watchdog timeout value, 50ms is always enough. */
361
392
 	sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);
..
..
@@ -382,9 +413,6 @@
382
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 	int i, size, chn_cnt;
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414
 	const __be32 *list;
384
415
 	u32 tmp;
385
-
386
-	/* Address bits select default 12 bits */
387
-	writel_relaxed(0, sadi->base + REG_ADI_CTRL0);
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416
 
389
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 	/* Set all channels as default priority */
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 	writel_relaxed(0, sadi->base + REG_ADI_CHN_PRIL);
..
..
@@ -462,19 +490,27 @@
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 	sadi->slave_pbase = res->start + ADI_SLAVE_OFFSET;
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 	sadi->ctlr = ctlr;
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492
 	sadi->dev = &pdev->dev;
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-	ret = of_hwspin_lock_get_id_byname(np, "adi");
466
-	if (ret < 0) {
467
-		dev_err(&pdev->dev, "can not get the hardware spinlock\n");
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-		goto put_ctlr;
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-	}
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-
471
-	sadi->hwlock = devm_hwspin_lock_request_specific(&pdev->dev, ret);
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-	if (!sadi->hwlock) {
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-		ret = -ENXIO;
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-		goto put_ctlr;
493
+	ret = of_hwspin_lock_get_id(np, 0);
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+	if (ret > 0 || (IS_ENABLED(CONFIG_HWSPINLOCK) && ret == 0)) {
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+		sadi->hwlock =
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+			devm_hwspin_lock_request_specific(&pdev->dev, ret);
497
+		if (!sadi->hwlock) {
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+			ret = -ENXIO;
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+			goto put_ctlr;
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+		}
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+	} else {
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+		switch (ret) {
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+		case -ENOENT:
504
+			dev_info(&pdev->dev, "no hardware spinlock supplied\n");
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+			break;
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+		default:
507
+			dev_err_probe(&pdev->dev, ret, "failed to find hwlock id\n");
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+			goto put_ctlr;
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+		}
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510
 	}
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511
 
477
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 	sprd_adi_hw_init(sadi);
513
+	sprd_adi_set_wdt_rst_mode(sadi);
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514
 
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 	ctlr->dev.of_node = pdev->dev.of_node;
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 	ctlr->bus_num = pdev->id;