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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376 
 kernel/drivers/spi/spi-pl022.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * A driver for the ARM PL022 PrimeCell SSP/SPI bus master.
34  *
....@@ -10,16 +11,6 @@
1011  *	linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
1112  * Initial adoption to PL022 by:
1213  *      Sachin Verma <sachin.verma@st.com>
13
- *
14
- * This program is free software; you can redistribute it and/or modify
15
- * it under the terms of the GNU General Public License as published by
16
- * the Free Software Foundation; either version 2 of the License, or
17
- * (at your option) any later version.
18
- *
19
- * This program is distributed in the hope that it will be useful,
20
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
21
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22
- * GNU General Public License for more details.
2314  */
2415 
2516 #include <linux/init.h>
....@@ -253,6 +244,7 @@
253244 #define STATE_RUNNING			((void *) 1)
254245 #define STATE_DONE			((void *) 2)
255246 #define STATE_ERROR			((void *) -1)
247
+#define STATE_TIMEOUT			((void *) -2)
256248 
257249 /*
258250  * SSP State - Whether Enabled or Disabled
....@@ -306,7 +298,7 @@
306298 	READING_U32
307299 };
308300 
309
-/**
301
+/*
310302  * The type of writing going on on this chip
311303  */
312304 enum ssp_writing {
....@@ -325,6 +317,7 @@
325317  * @extended_cr: 32 bit wide control register 0 with extra
326318  * features and extra features in CR1 as found in the ST variants
327319  * @pl023: supports a subset of the ST extensions called "PL023"
320
+ * @loopback: supports loopback mode
328321  * @internal_cs_ctrl: supports chip select control register
329322  */
330323 struct vendor_data {
....@@ -361,11 +354,14 @@
361354  * @read: the type of read currently going on
362355  * @write: the type of write currently going on
363356  * @exp_fifo_level: expected FIFO level
357
+ * @rx_lev_trig: receive FIFO watermark level which triggers IRQ
358
+ * @tx_lev_trig: transmit FIFO watermark level which triggers IRQ
364359  * @dma_rx_channel: optional channel for RX DMA
365360  * @dma_tx_channel: optional channel for TX DMA
366361  * @sgt_rx: scattertable for the RX transfer
367362  * @sgt_tx: scattertable for the TX transfer
368363  * @dummypage: a dummy page used for driving data on the bus with DMA
364
+ * @dma_running: indicates whether DMA is in operation
369365  * @cur_cs: current chip select (gpio)
370366  * @chipselects: list of chipselects (gpios)
371367  */
....@@ -493,12 +489,11 @@
493489 					struct spi_transfer, transfer_list);
494490 
495491 	/* Delay if requested before any change in chip select */
496
-	if (last_transfer->delay_usecs)
497
-		/*
498
-		 * FIXME: This runs in interrupt context.
499
-		 * Is this really smart?
500
-		 */
501
-		udelay(last_transfer->delay_usecs);
492
+	/*
493
+	 * FIXME: This runs in interrupt context.
494
+	 * Is this really smart?
495
+	 */
496
+	spi_transfer_delay_exec(last_transfer);
502497 
503498 	if (!last_transfer->cs_change) {
504499 		struct spi_message *next_msg;
....@@ -671,7 +666,7 @@
671666 	writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase));
672667 }
673668 
674
-/**
669
+/*
675670  * This will write to TX and read from RX according to the parameters
676671  * set in pl022.
677672  */
....@@ -861,11 +856,10 @@
861856 
862857 	/* Update total bytes transferred */
863858 	msg->actual_length += pl022->cur_transfer->len;
864
-	if (pl022->cur_transfer->cs_change)
865
-		pl022_cs_control(pl022, SSP_CHIP_DESELECT);
866
-
867859 	/* Move to next transfer */
868860 	msg->state = next_transfer(pl022);
861
+	if (msg->state != STATE_DONE && pl022->cur_transfer->cs_change)
862
+		pl022_cs_control(pl022, SSP_CHIP_DESELECT);
869863 	tasklet_schedule(&pl022->pump_transfers);
870864 }
871865 
....@@ -1168,7 +1162,7 @@
11681162 	int err;
11691163 
11701164 	/* automatically configure DMA channels from platform, normally using DT */
1171
-	chan = dma_request_slave_channel_reason(dev, "rx");
1165
+	chan = dma_request_chan(dev, "rx");
11721166 	if (IS_ERR(chan)) {
11731167 		err = PTR_ERR(chan);
11741168 		goto err_no_rxchan;
....@@ -1176,7 +1170,7 @@
11761170 
11771171 	pl022->dma_rx_channel = chan;
11781172 
1179
-	chan = dma_request_slave_channel_reason(dev, "tx");
1173
+	chan = dma_request_chan(dev, "tx");
11801174 	if (IS_ERR(chan)) {
11811175 		err = PTR_ERR(chan);
11821176 		goto err_no_txchan;
....@@ -1247,6 +1241,8 @@
12471241 
12481242 /**
12491243  * pl022_interrupt_handler - Interrupt handler for SSP controller
1244
+ * @irq: IRQ number
1245
+ * @dev_id: Local device data
12501246  *
12511247  * This function handles interrupts generated for an interrupt based transfer.
12521248  * If a receive overrun (ROR) interrupt is there then we disable SSP, flag the
....@@ -1333,10 +1329,10 @@
13331329 		}
13341330 		/* Update total bytes transferred */
13351331 		msg->actual_length += pl022->cur_transfer->len;
1336
-		if (pl022->cur_transfer->cs_change)
1337
-			pl022_cs_control(pl022, SSP_CHIP_DESELECT);
13381332 		/* Move to next transfer */
13391333 		msg->state = next_transfer(pl022);
1334
+		if (msg->state != STATE_DONE && pl022->cur_transfer->cs_change)
1335
+			pl022_cs_control(pl022, SSP_CHIP_DESELECT);
13401336 		tasklet_schedule(&pl022->pump_transfers);
13411337 		return IRQ_HANDLED;
13421338 	}
....@@ -1344,7 +1340,7 @@
13441340 	return IRQ_HANDLED;
13451341 }
13461342 
1347
-/**
1343
+/*
13481344  * This sets up the pointers to memory for the next message to
13491345  * send out on the SPI bus.
13501346  */
....@@ -1410,12 +1406,11 @@
14101406 		previous = list_entry(transfer->transfer_list.prev,
14111407 					struct spi_transfer,
14121408 					transfer_list);
1413
-		if (previous->delay_usecs)
1414
-			/*
1415
-			 * FIXME: This runs in interrupt context.
1416
-			 * Is this really smart?
1417
-			 */
1418
-			udelay(previous->delay_usecs);
1409
+		/*
1410
+		 * FIXME: This runs in interrupt context.
1411
+		 * Is this really smart?
1412
+		 */
1413
+		spi_transfer_delay_exec(previous);
14191414 
14201415 		/* Reselect chip select only if cs_change was requested */
14211416 		if (previous->cs_change)
....@@ -1485,15 +1480,37 @@
14851480 	writew(irqflags, SSP_IMSC(pl022->virtbase));
14861481 }
14871482 
1483
+static void print_current_status(struct pl022 *pl022)
1484
+{
1485
+	u32 read_cr0;
1486
+	u16 read_cr1, read_dmacr, read_sr;
1487
+
1488
+	if (pl022->vendor->extended_cr)
1489
+		read_cr0 = readl(SSP_CR0(pl022->virtbase));
1490
+	else
1491
+		read_cr0 = readw(SSP_CR0(pl022->virtbase));
1492
+	read_cr1 = readw(SSP_CR1(pl022->virtbase));
1493
+	read_dmacr = readw(SSP_DMACR(pl022->virtbase));
1494
+	read_sr = readw(SSP_SR(pl022->virtbase));
1495
+
1496
+	dev_warn(&pl022->adev->dev, "spi-pl022 CR0: %x\n", read_cr0);
1497
+	dev_warn(&pl022->adev->dev, "spi-pl022 CR1: %x\n", read_cr1);
1498
+	dev_warn(&pl022->adev->dev, "spi-pl022 DMACR: %x\n", read_dmacr);
1499
+	dev_warn(&pl022->adev->dev, "spi-pl022 SR: %x\n", read_sr);
1500
+	dev_warn(&pl022->adev->dev,
1501
+			"spi-pl022 exp_fifo_level/fifodepth: %u/%d\n",
1502
+			pl022->exp_fifo_level,
1503
+			pl022->vendor->fifodepth);
1504
+
1505
+}
1506
+
14881507 static void do_polling_transfer(struct pl022 *pl022)
14891508 {
14901509 	struct spi_message *message = NULL;
14911510 	struct spi_transfer *transfer = NULL;
14921511 	struct spi_transfer *previous = NULL;
1493
-	struct chip_data *chip;
14941512 	unsigned long time, timeout;
14951513 
1496
-	chip = pl022->cur_chip;
14971514 	message = pl022->cur_msg;
14981515 
14991516 	while (message->state != STATE_DONE) {
....@@ -1507,8 +1524,7 @@
15071524 			previous =
15081525 			    list_entry(transfer->transfer_list.prev,
15091526 				       struct spi_transfer, transfer_list);
1510
-			if (previous->delay_usecs)
1511
-				udelay(previous->delay_usecs);
1527
+			spi_transfer_delay_exec(previous);
15121528 			if (previous->cs_change)
15131529 				pl022_cs_control(pl022, SSP_CHIP_SELECT);
15141530 		} else {
....@@ -1538,7 +1554,8 @@
15381554 			if (time_after(time, timeout)) {
15391555 				dev_warn(&pl022->adev->dev,
15401556 				"%s: timeout!\n", __func__);
1541
-				message->state = STATE_ERROR;
1557
+				message->state = STATE_TIMEOUT;
1558
+				print_current_status(pl022);
15421559 				goto out;
15431560 			}
15441561 			cpu_relax();
....@@ -1546,15 +1563,18 @@
15461563 
15471564 		/* Update total byte transferred */
15481565 		message->actual_length += pl022->cur_transfer->len;
1549
-		if (pl022->cur_transfer->cs_change)
1550
-			pl022_cs_control(pl022, SSP_CHIP_DESELECT);
15511566 		/* Move to next transfer */
15521567 		message->state = next_transfer(pl022);
1568
+		if (message->state != STATE_DONE
1569
+		    && pl022->cur_transfer->cs_change)
1570
+			pl022_cs_control(pl022, SSP_CHIP_DESELECT);
15531571 	}
15541572 out:
15551573 	/* Handle end of message */
15561574 	if (message->state == STATE_DONE)
15571575 		message->status = 0;
1576
+	else if (message->state == STATE_TIMEOUT)
1577
+		message->status = -EAGAIN;
15581578 	else
15591579 		message->status = -EIO;
15601580 
....@@ -2295,13 +2315,13 @@
22952315 	return status;
22962316 }
22972317 
2298
-static int
2318
+static void
22992319 pl022_remove(struct amba_device *adev)
23002320 {
23012321 	struct pl022 *pl022 = amba_get_drvdata(adev);
23022322 
23032323 	if (!pl022)
2304
-		return 0;
2324
+		return;
23052325 
23062326 	/*
23072327 	 * undo pm_runtime_put() in probe.  I assume that we're not
....@@ -2316,7 +2336,6 @@
23162336 	clk_disable_unprepare(pl022->clk);
23172337 	amba_release_regions(adev);
23182338 	tasklet_disable(&pl022->pump_transfers);
2319
-	return 0;
23202339 }
23212340 
23222341 #ifdef CONFIG_PM_SLEEP
....@@ -2326,10 +2345,8 @@
23262345 	int ret;
23272346 
23282347 	ret = spi_master_suspend(pl022->master);
2329
-	if (ret) {
2330
-		dev_warn(dev, "cannot suspend master\n");
2348
+	if (ret)
23312349 		return ret;
2332
-	}
23332350 
23342351 	ret = pm_runtime_force_suspend(dev);
23352352 	if (ret) {
....@@ -2354,9 +2371,7 @@
23542371 
23552372 	/* Start the queue running */
23562373 	ret = spi_master_resume(pl022->master);
2357
-	if (ret)
2358
-		dev_err(dev, "problem starting queue (%d)\n", ret);
2359
-	else
2374
+	if (!ret)
23602375 		dev_dbg(dev, "resumed\n");
23612376 
23622377 	return ret;