| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (C) 2009 Texas Instruments. |
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| 3 | 4 | * Copyright (C) 2010 EF Johnson Technologies |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify |
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| 6 | | - * it under the terms of the GNU General Public License as published by |
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| 7 | | - * the Free Software Foundation; either version 2 of the License, or |
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| 8 | | - * (at your option) any later version. |
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| 9 | | - * |
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| 10 | | - * This program is distributed in the hope that it will be useful, |
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| 11 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 13 | | - * GNU General Public License for more details. |
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| 14 | 5 | */ |
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| 15 | 6 | |
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| 16 | 7 | #include <linux/interrupt.h> |
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| 17 | 8 | #include <linux/io.h> |
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| 18 | | -#include <linux/gpio.h> |
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| 9 | +#include <linux/gpio/consumer.h> |
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| 19 | 10 | #include <linux/module.h> |
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| 20 | 11 | #include <linux/delay.h> |
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| 21 | 12 | #include <linux/platform_device.h> |
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| .. | .. |
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| 25 | 16 | #include <linux/dma-mapping.h> |
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| 26 | 17 | #include <linux/of.h> |
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| 27 | 18 | #include <linux/of_device.h> |
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| 28 | | -#include <linux/of_gpio.h> |
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| 29 | 19 | #include <linux/spi/spi.h> |
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| 30 | 20 | #include <linux/spi/spi_bitbang.h> |
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| 31 | 21 | #include <linux/slab.h> |
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| .. | .. |
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| 208 | 198 | static void davinci_spi_chipselect(struct spi_device *spi, int value) |
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| 209 | 199 | { |
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| 210 | 200 | struct davinci_spi *dspi; |
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| 211 | | - struct davinci_spi_platform_data *pdata; |
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| 212 | 201 | struct davinci_spi_config *spicfg = spi->controller_data; |
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| 213 | 202 | u8 chip_sel = spi->chip_select; |
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| 214 | 203 | u16 spidat1 = CS_DEFAULT; |
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| 215 | 204 | |
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| 216 | 205 | dspi = spi_master_get_devdata(spi->master); |
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| 217 | | - pdata = &dspi->pdata; |
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| 218 | 206 | |
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| 219 | 207 | /* program delay transfers if tx_delay is non zero */ |
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| 220 | 208 | if (spicfg && spicfg->wdelay) |
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| .. | .. |
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| 224 | 212 | * Board specific chip select logic decides the polarity and cs |
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| 225 | 213 | * line for the controller |
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| 226 | 214 | */ |
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| 227 | | - if (spi->cs_gpio >= 0) { |
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| 215 | + if (spi->cs_gpiod) { |
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| 228 | 216 | if (value == BITBANG_CS_ACTIVE) |
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| 229 | | - gpio_set_value(spi->cs_gpio, spi->mode & SPI_CS_HIGH); |
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| 217 | + gpiod_set_value(spi->cs_gpiod, 1); |
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| 230 | 218 | else |
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| 231 | | - gpio_set_value(spi->cs_gpio, |
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| 232 | | - !(spi->mode & SPI_CS_HIGH)); |
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| 219 | + gpiod_set_value(spi->cs_gpiod, 0); |
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| 233 | 220 | } else { |
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| 234 | 221 | if (value == BITBANG_CS_ACTIVE) { |
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| 235 | | - spidat1 |= SPIDAT1_CSHOLD_MASK; |
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| 222 | + if (!(spi->mode & SPI_CS_WORD)) |
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| 223 | + spidat1 |= SPIDAT1_CSHOLD_MASK; |
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| 236 | 224 | spidat1 &= ~(0x1 << chip_sel); |
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| 237 | 225 | } |
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| 238 | 226 | } |
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| .. | .. |
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| 242 | 230 | |
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| 243 | 231 | /** |
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| 244 | 232 | * davinci_spi_get_prescale - Calculates the correct prescale value |
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| 245 | | - * @maxspeed_hz: the maximum rate the SPI clock can run at |
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| 233 | + * @dspi: the controller data |
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| 234 | + * @max_speed_hz: the maximum rate the SPI clock can run at |
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| 246 | 235 | * |
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| 247 | 236 | * This function calculates the prescale value that generates a clock rate |
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| 248 | 237 | * less than or equal to the specified maximum. |
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| .. | .. |
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| 419 | 408 | */ |
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| 420 | 409 | static int davinci_spi_setup(struct spi_device *spi) |
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| 421 | 410 | { |
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| 422 | | - int retval = 0; |
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| 423 | 411 | struct davinci_spi *dspi; |
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| 424 | | - struct davinci_spi_platform_data *pdata; |
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| 425 | | - struct spi_master *master = spi->master; |
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| 426 | 412 | struct device_node *np = spi->dev.of_node; |
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| 427 | 413 | bool internal_cs = true; |
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| 428 | 414 | |
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| 429 | 415 | dspi = spi_master_get_devdata(spi->master); |
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| 430 | | - pdata = &dspi->pdata; |
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| 431 | 416 | |
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| 432 | 417 | if (!(spi->mode & SPI_NO_CS)) { |
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| 433 | | - if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) { |
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| 434 | | - retval = gpio_direction_output( |
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| 435 | | - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
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| 418 | + if (np && spi->cs_gpiod) |
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| 436 | 419 | internal_cs = false; |
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| 437 | | - } else if (pdata->chip_sel && |
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| 438 | | - spi->chip_select < pdata->num_chipselect && |
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| 439 | | - pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) { |
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| 440 | | - spi->cs_gpio = pdata->chip_sel[spi->chip_select]; |
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| 441 | | - retval = gpio_direction_output( |
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| 442 | | - spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
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| 443 | | - internal_cs = false; |
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| 444 | | - } |
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| 445 | | - |
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| 446 | | - if (retval) { |
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| 447 | | - dev_err(&spi->dev, "GPIO %d setup failed (%d)\n", |
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| 448 | | - spi->cs_gpio, retval); |
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| 449 | | - return retval; |
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| 450 | | - } |
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| 451 | 420 | |
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| 452 | 421 | if (internal_cs) |
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| 453 | 422 | set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); |
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| .. | .. |
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| 602 | 571 | u32 errors = 0; |
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| 603 | 572 | struct davinci_spi_config *spicfg; |
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| 604 | 573 | struct davinci_spi_platform_data *pdata; |
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| 605 | | - unsigned uninitialized_var(rx_buf_count); |
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| 606 | 574 | |
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| 607 | 575 | dspi = spi_master_get_devdata(spi->master); |
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| 608 | 576 | pdata = &dspi->pdata; |
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| .. | .. |
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| 737 | 705 | /** |
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| 738 | 706 | * dummy_thread_fn - dummy thread function |
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| 739 | 707 | * @irq: IRQ number for this SPI Master |
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| 740 | | - * @context_data: structure for SPI Master controller davinci_spi |
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| 708 | + * @data: structure for SPI Master controller davinci_spi |
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| 741 | 709 | * |
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| 742 | 710 | * This is to satisfy the request_threaded_irq() API so that the irq |
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| 743 | 711 | * handler is called in interrupt context. |
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| .. | .. |
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| 750 | 718 | /** |
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| 751 | 719 | * davinci_spi_irq - Interrupt handler for SPI Master Controller |
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| 752 | 720 | * @irq: IRQ number for this SPI Master |
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| 753 | | - * @context_data: structure for SPI Master controller davinci_spi |
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| 721 | + * @data: structure for SPI Master controller davinci_spi |
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| 754 | 722 | * |
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| 755 | 723 | * ISR will determine that interrupt arrives either for READ or WRITE command. |
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| 756 | 724 | * According to command it will do the appropriate action. It will check |
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| .. | .. |
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| 971 | 939 | if (ret) |
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| 972 | 940 | goto free_master; |
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| 973 | 941 | |
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| 942 | + master->use_gpio_descriptors = true; |
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| 974 | 943 | master->dev.of_node = pdev->dev.of_node; |
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| 975 | 944 | master->bus_num = pdev->id; |
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| 976 | 945 | master->num_chipselect = pdata->num_chipselect; |
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| 977 | 946 | master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); |
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| 978 | | - master->flags = SPI_MASTER_MUST_RX; |
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| 947 | + master->flags = SPI_MASTER_MUST_RX | SPI_MASTER_GPIO_SS; |
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| 979 | 948 | master->setup = davinci_spi_setup; |
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| 980 | 949 | master->cleanup = davinci_spi_cleanup; |
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| 981 | 950 | master->can_dma = davinci_spi_can_dma; |
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| .. | .. |
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| 985 | 954 | dspi->prescaler_limit = pdata->prescaler_limit; |
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| 986 | 955 | dspi->version = pdata->version; |
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| 987 | 956 | |
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| 988 | | - dspi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP; |
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| 957 | + dspi->bitbang.flags = SPI_NO_CS | SPI_LSB_FIRST | SPI_LOOP | SPI_CS_WORD; |
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| 989 | 958 | if (dspi->version == SPI_VERSION_2) |
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| 990 | 959 | dspi->bitbang.flags |= SPI_READY; |
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| 991 | | - |
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| 992 | | - if (pdev->dev.of_node) { |
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| 993 | | - int i; |
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| 994 | | - |
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| 995 | | - for (i = 0; i < pdata->num_chipselect; i++) { |
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| 996 | | - int cs_gpio = of_get_named_gpio(pdev->dev.of_node, |
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| 997 | | - "cs-gpios", i); |
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| 998 | | - |
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| 999 | | - if (cs_gpio == -EPROBE_DEFER) { |
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| 1000 | | - ret = cs_gpio; |
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| 1001 | | - goto free_clk; |
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| 1002 | | - } |
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| 1003 | | - |
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| 1004 | | - if (gpio_is_valid(cs_gpio)) { |
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| 1005 | | - ret = devm_gpio_request(&pdev->dev, cs_gpio, |
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| 1006 | | - dev_name(&pdev->dev)); |
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| 1007 | | - if (ret) |
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| 1008 | | - goto free_clk; |
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| 1009 | | - } |
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| 1010 | | - } |
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| 1011 | | - } |
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| 1012 | 960 | |
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| 1013 | 961 | dspi->bitbang.txrx_bufs = davinci_spi_bufs; |
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| 1014 | 962 | |
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