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| 1 | 1 | /* |
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| 2 | | - * Copyright 2012-2015 Avago Technologies. All rights reserved. |
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| 2 | + * Copyright 2000-2020 Broadcom Inc. All rights reserved. |
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| 3 | 3 | * |
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| 4 | 4 | * |
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| 5 | 5 | * Name: mpi2_pci.h |
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| 6 | 6 | * Title: MPI PCIe Attached Devices structures and definitions. |
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| 7 | 7 | * Creation Date: October 9, 2012 |
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| 8 | 8 | * |
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| 9 | | - * mpi2_pci.h Version: 02.00.02 |
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| 9 | + * mpi2_pci.h Version: 02.00.04 |
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| 10 | 10 | * |
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| 11 | 11 | * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 |
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| 12 | 12 | * prefix are for use only on MPI v2.5 products, and must not be used |
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| .. | .. |
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| 23 | 23 | * Removed SOP support. |
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| 24 | 24 | * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to |
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| 25 | 25 | * NVME Encapsulated Request. |
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| 26 | + * 07-22-18 02.00.03 Updted flags field for NVME Encapsulated req |
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| 27 | + * 12-17-18 02.00.04 Added MPI26_PCIE_DEVINFO_SCSI |
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| 28 | + * Shortten some defines to be compatible with DOS |
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| 26 | 29 | * -------------------------------------------------------------------------- |
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| 27 | 30 | */ |
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| 28 | 31 | |
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| .. | .. |
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| 40 | 43 | #define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000) |
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| 41 | 44 | #define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001) |
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| 42 | 45 | #define MPI26_PCIE_DEVINFO_NVME (0x00000003) |
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| 43 | | - |
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| 46 | +#define MPI26_PCIE_DEVINFO_SCSI (0x00000004) |
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| 44 | 47 | |
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| 45 | 48 | /**************************************************************************** |
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| 46 | 49 | * NVMe Encapsulated message |
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| .. | .. |
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| 74 | 77 | #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000) |
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| 75 | 78 | #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010) |
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| 76 | 79 | /*Error Response Address Space */ |
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| 77 | | -#define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR (0x000C) |
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| 78 | | -#define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR (0x0000) |
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| 79 | | -#define MPI26_NVME_FLAGS_IOCPLB_RSP_ADDR (0x0008) |
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| 80 | | -#define MPI26_NVME_FLAGS_IOCPLBNTA_RSP_ADDR (0x000C) |
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| 81 | | -/*Data Direction*/ |
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| 80 | +#define MPI26_NVME_FLAGS_ERR_RSP_ADDR_MASK (0x000C) |
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| 81 | +#define MPI26_NVME_FLAGS_ERR_RSP_ADDR_SYSTEM (0x0000) |
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| 82 | +#define MPI26_NVME_FLAGS_ERR_RSP_ADDR_IOCTL (0x0008) |
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| 83 | +/* Data Direction*/ |
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| 82 | 84 | #define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003) |
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| 83 | 85 | #define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000) |
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| 84 | 86 | #define MPI26_NVME_FLAGS_WRITE (0x0001) |
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