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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376 
 kernel/drivers/rtc/rtc-omap.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0+
12 /*
23  * TI OMAP Real Time Clock interface for Linux
34  *
....@@ -6,14 +7,8 @@
67  *
78  * Copyright (C) 2006 David Brownell (new RTC framework)
89  * Copyright (C) 2014 Johan Hovold <johan@kernel.org>
9
- *
10
- * This program is free software; you can redistribute it and/or
11
- * modify it under the terms of the GNU General Public License
12
- * as published by the Free Software Foundation; either version
13
- * 2 of the License, or (at your option) any later version.
1410  */
1511 
16
-#include <dt-bindings/gpio/gpio.h>
1712 #include <linux/bcd.h>
1813 #include <linux/clk.h>
1914 #include <linux/delay.h>
....@@ -271,7 +266,7 @@
271266 }
272267 
273268 /* this hardware doesn't support "don't care" alarm fields */
274
-static int tm2bcd(struct rtc_time *tm)
269
+static void tm2bcd(struct rtc_time *tm)
275270 {
276271 	tm->tm_sec = bin2bcd(tm->tm_sec);
277272 	tm->tm_min = bin2bcd(tm->tm_min);
....@@ -279,13 +274,7 @@
279274 	tm->tm_mday = bin2bcd(tm->tm_mday);
280275 
281276 	tm->tm_mon = bin2bcd(tm->tm_mon + 1);
282
-
283
-	/* epoch == 1900 */
284
-	if (tm->tm_year < 100 || tm->tm_year > 199)
285
-		return -EINVAL;
286277 	tm->tm_year = bin2bcd(tm->tm_year - 100);
287
-
288
-	return 0;
289278 }
290279 
291280 static void bcd2tm(struct rtc_time *tm)
....@@ -328,8 +317,7 @@
328317 {
329318 	struct omap_rtc *rtc = dev_get_drvdata(dev);
330319 
331
-	if (tm2bcd(tm) < 0)
332
-		return -EINVAL;
320
+	tm2bcd(tm);
333321 
334322 	local_irq_disable();
335323 	rtc_wait_not_busy(rtc);
....@@ -378,8 +366,7 @@
378366 	struct omap_rtc *rtc = dev_get_drvdata(dev);
379367 	u8 reg, irqwake_reg = 0;
380368 
381
-	if (tm2bcd(&alm->time) < 0)
382
-		return -EINVAL;
369
+	tm2bcd(&alm->time);
383370 
384371 	local_irq_disable();
385372 	rtc_wait_not_busy(rtc);
....@@ -415,25 +402,17 @@
415402 
416403 static struct omap_rtc *omap_rtc_power_off_rtc;
417404 
418
-/*
419
- * omap_rtc_poweroff: RTC-controlled power off
420
- *
421
- * The RTC can be used to control an external PMIC via the pmic_power_en pin,
422
- * which can be configured to transition to OFF on ALARM2 events.
423
- *
424
- * Notes:
425
- * The two-second alarm offset is the shortest offset possible as the alarm
426
- * registers must be set before the next timer update and the offset
427
- * calculation is too heavy for everything to be done within a single access
428
- * period (~15 us).
429
- *
430
- * Called with local interrupts disabled.
405
+/**
406
+ * omap_rtc_power_off_program: Set the pmic power off sequence. The RTC
407
+ * generates pmic_pwr_enable control, which can be used to control an external
408
+ * PMIC.
431409  */
432
-static void omap_rtc_power_off(void)
410
+int omap_rtc_power_off_program(struct device *dev)
433411 {
434412 	struct omap_rtc *rtc = omap_rtc_power_off_rtc;
435413 	struct rtc_time tm;
436414 	unsigned long now;
415
+	int seconds;
437416 	u32 val;
438417 
439418 	rtc->type->unlock(rtc);
....@@ -441,17 +420,18 @@
441420 	val = rtc_readl(rtc, OMAP_RTC_PMIC_REG);
442421 	rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN);
443422 
444
-	/* set alarm two seconds from now */
445
-	omap_rtc_read_time_raw(rtc, &tm);
446
-	bcd2tm(&tm);
447
-	rtc_tm_to_time(&tm, &now);
448
-	rtc_time_to_tm(now + 2, &tm);
423
+again:
424
+	/* Clear any existing ALARM2 event */
425
+	rtc_writel(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM2);
449426 
450
-	if (tm2bcd(&tm) < 0) {
451
-		dev_err(&rtc->rtc->dev, "power off failed\n");
452
-		rtc->type->lock(rtc);
453
-		return;
454
-	}
427
+	/* set alarm one second from now */
428
+	omap_rtc_read_time_raw(rtc, &tm);
429
+	seconds = tm.tm_sec;
430
+	bcd2tm(&tm);
431
+	now = rtc_tm_to_time64(&tm);
432
+	rtc_time64_to_tm(now + 1, &tm);
433
+
434
+	tm2bcd(&tm);
455435 
456436 	rtc_wait_not_busy(rtc);
457437 
....@@ -470,14 +450,55 @@
470450 	val = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
471451 	rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG,
472452 			val | OMAP_RTC_INTERRUPTS_IT_ALARM2);
453
+
454
+	/* Retry in case roll over happened before alarm was armed. */
455
+	if (rtc_read(rtc, OMAP_RTC_SECONDS_REG) != seconds) {
456
+		val = rtc_read(rtc, OMAP_RTC_STATUS_REG);
457
+		if (!(val & OMAP_RTC_STATUS_ALARM2))
458
+			goto again;
459
+	}
460
+
473461 	rtc->type->lock(rtc);
474462 
463
+	return 0;
464
+}
465
+EXPORT_SYMBOL(omap_rtc_power_off_program);
466
+
467
+/*
468
+ * omap_rtc_poweroff: RTC-controlled power off
469
+ *
470
+ * The RTC can be used to control an external PMIC via the pmic_power_en pin,
471
+ * which can be configured to transition to OFF on ALARM2 events.
472
+ *
473
+ * Notes:
474
+ * The one-second alarm offset is the shortest offset possible as the alarm
475
+ * registers must be set before the next timer update and the offset
476
+ * calculation is too heavy for everything to be done within a single access
477
+ * period (~15 us).
478
+ *
479
+ * Called with local interrupts disabled.
480
+ */
481
+static void omap_rtc_power_off(void)
482
+{
483
+	struct rtc_device *rtc = omap_rtc_power_off_rtc->rtc;
484
+	u32 val;
485
+
486
+	omap_rtc_power_off_program(rtc->dev.parent);
487
+
488
+	/* Set PMIC power enable and EXT_WAKEUP in case PB power on is used */
489
+	omap_rtc_power_off_rtc->type->unlock(omap_rtc_power_off_rtc);
490
+	val = rtc_readl(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG);
491
+	val |= OMAP_RTC_PMIC_POWER_EN_EN | OMAP_RTC_PMIC_EXT_WKUP_POL(0) |
492
+			OMAP_RTC_PMIC_EXT_WKUP_EN(0);
493
+	rtc_writel(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG, val);
494
+	omap_rtc_power_off_rtc->type->lock(omap_rtc_power_off_rtc);
495
+
475496 	/*
476
-	 * Wait for alarm to trigger (within two seconds) and external PMIC to
497
+	 * Wait for alarm to trigger (within one second) and external PMIC to
477498 	 * power off the system. Add a 500 ms margin for external latencies
478499 	 * (e.g. debounce circuits).
479500 	 */
480
-	mdelay(2500);
501
+	mdelay(1500);
481502 }
482503 
483504 static const struct rtc_class_ops omap_rtc_ops = {
....@@ -594,7 +615,7 @@
594615 		break;
595616 	default:
596617 		return -ENOTSUPP;
597
-	};
618
+	}
598619 
599620 	*config = pinconf_to_config_packed(param, arg);
600621 
....@@ -705,7 +726,6 @@
705726 static int omap_rtc_probe(struct platform_device *pdev)
706727 {
707728 	struct omap_rtc	*rtc;
708
-	struct resource	*res;
709729 	u8 reg, mask, new_ctrl;
710730 	const struct platform_device_id *id_entry;
711731 	const struct of_device_id *of_id;
....@@ -719,8 +739,7 @@
719739 	if (of_id) {
720740 		rtc->type = of_id->data;
721741 		rtc->is_pmic_controller = rtc->type->has_pmic_mode &&
722
-				of_property_read_bool(pdev->dev.of_node,
723
-						"system-power-controller");
742
+			of_device_is_system_power_controller(pdev->dev.of_node);
724743 	} else {
725744 		id_entry = platform_get_device_id(pdev);
726745 		rtc->type = (void *)id_entry->driver_data;
....@@ -743,8 +762,7 @@
743762 	if (!IS_ERR(rtc->clk))
744763 		clk_prepare_enable(rtc->clk);
745764 
746
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
747
-	rtc->base = devm_ioremap_resource(&pdev->dev, res);
765
+	rtc->base = devm_platform_ioremap_resource(pdev, 0);
748766 	if (IS_ERR(rtc->base)) {
749767 		clk_disable_unprepare(rtc->clk);
750768 		return PTR_ERR(rtc->base);
....@@ -841,6 +859,8 @@
841859 	}
842860 
843861 	rtc->rtc->ops = &omap_rtc_ops;
862
+	rtc->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
863
+	rtc->rtc->range_max = RTC_TIMESTAMP_END_2099;
844864 	omap_rtc_nvmem_config.priv = rtc;
845865 
846866 	/* handle periodic and alarm irqs */