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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376 
 kernel/drivers/regulator/qcom_spmi-regulator.c
....@@ -1,14 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 and
6
- * only version 2 as published by the Free Software Foundation.
7
- *
8
- * This program is distributed in the hope that it will be useful,
9
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
10
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11
- * GNU General Public License for more details.
124  */
135 
146 #include <linux/module.h>
....@@ -104,6 +96,8 @@
10496 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
10597 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
10698 	SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
99
+	SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426,
100
+	SPMI_REGULATOR_LOGICAL_TYPE_HFS430,
107101 };
108102 
109103 enum spmi_regulator_type {
....@@ -141,6 +135,18 @@
141135 	SPMI_REGULATOR_SUBTYPE_LV_P600		= 0x2b,
142136 	SPMI_REGULATOR_SUBTYPE_LV_P1200		= 0x2c,
143137 	SPMI_REGULATOR_SUBTYPE_LV_P450		= 0x2d,
138
+	SPMI_REGULATOR_SUBTYPE_HT_N300_ST	= 0x30,
139
+	SPMI_REGULATOR_SUBTYPE_HT_N600_ST	= 0x31,
140
+	SPMI_REGULATOR_SUBTYPE_HT_N1200_ST	= 0x32,
141
+	SPMI_REGULATOR_SUBTYPE_HT_LVP150	= 0x3b,
142
+	SPMI_REGULATOR_SUBTYPE_HT_LVP300	= 0x3c,
143
+	SPMI_REGULATOR_SUBTYPE_L660_N300_ST	= 0x42,
144
+	SPMI_REGULATOR_SUBTYPE_L660_N600_ST	= 0x43,
145
+	SPMI_REGULATOR_SUBTYPE_L660_P50		= 0x46,
146
+	SPMI_REGULATOR_SUBTYPE_L660_P150	= 0x47,
147
+	SPMI_REGULATOR_SUBTYPE_L660_P600	= 0x49,
148
+	SPMI_REGULATOR_SUBTYPE_L660_LVP150	= 0x4d,
149
+	SPMI_REGULATOR_SUBTYPE_L660_LVP600	= 0x4f,
144150 	SPMI_REGULATOR_SUBTYPE_LV100		= 0x01,
145151 	SPMI_REGULATOR_SUBTYPE_LV300		= 0x02,
146152 	SPMI_REGULATOR_SUBTYPE_MV300		= 0x08,
....@@ -150,11 +156,13 @@
150156 	SPMI_REGULATOR_SUBTYPE_5V_BOOST		= 0x01,
151157 	SPMI_REGULATOR_SUBTYPE_FTS_CTL		= 0x08,
152158 	SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL	= 0x09,
159
+	SPMI_REGULATOR_SUBTYPE_FTS426_CTL	= 0x0a,
153160 	SPMI_REGULATOR_SUBTYPE_BB_2A		= 0x01,
154161 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1	= 0x0d,
155162 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2	= 0x0e,
156163 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3	= 0x0f,
157164 	SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4	= 0x10,
165
+	SPMI_REGULATOR_SUBTYPE_HFS430		= 0x0a,
158166 };
159167 
160168 enum spmi_common_regulator_registers {
....@@ -168,6 +176,18 @@
168176 	SPMI_COMMON_REG_PULL_DOWN		= 0x48,
169177 	SPMI_COMMON_REG_SOFT_START		= 0x4c,
170178 	SPMI_COMMON_REG_STEP_CTRL		= 0x61,
179
+};
180
+
181
+/*
182
+ * Second common register layout used by newer devices starting with ftsmps426
183
+ * Note that some of the registers from the first common layout remain
184
+ * unchanged and their definition is not duplicated.
185
+ */
186
+enum spmi_ftsmps426_regulator_registers {
187
+	SPMI_FTSMPS426_REG_VOLTAGE_LSB		= 0x40,
188
+	SPMI_FTSMPS426_REG_VOLTAGE_MSB		= 0x41,
189
+	SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB	= 0x68,
190
+	SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB	= 0x69,
171191 };
172192 
173193 enum spmi_vs_registers {
....@@ -229,6 +249,14 @@
229249 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK	0x01
230250 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK	0x1f
231251 
252
+#define SPMI_FTSMPS426_MODE_BYPASS_MASK		3
253
+#define SPMI_FTSMPS426_MODE_RETENTION_MASK	4
254
+#define SPMI_FTSMPS426_MODE_LPM_MASK		5
255
+#define SPMI_FTSMPS426_MODE_AUTO_MASK		6
256
+#define SPMI_FTSMPS426_MODE_HPM_MASK		7
257
+
258
+#define SPMI_FTSMPS426_MODE_MASK		0x07
259
+
232260 /* Common regulator pull down control register layout */
233261 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK	0x80
234262 
....@@ -273,6 +301,25 @@
273301  */
274302 #define SPMI_FTSMPS_STEP_MARGIN_NUM	4
275303 #define SPMI_FTSMPS_STEP_MARGIN_DEN	5
304
+
305
+#define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK	0x03
306
+#define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT	0
307
+
308
+/* Clock rate in kHz of the FTSMPS426 regulator reference clock. */
309
+#define SPMI_FTSMPS426_CLOCK_RATE		4800
310
+
311
+#define SPMI_HFS430_CLOCK_RATE			1600
312
+
313
+/* Minimum voltage stepper delay for each step. */
314
+#define SPMI_FTSMPS426_STEP_DELAY		2
315
+
316
+/*
317
+ * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is
318
+ * used to adjust the step rate in order to account for oscillator variance.
319
+ */
320
+#define SPMI_FTSMPS426_STEP_MARGIN_NUM	10
321
+#define SPMI_FTSMPS426_STEP_MARGIN_DEN	11
322
+
276323 
277324 /* VSET value to decide the range of ULT SMPS */
278325 #define ULT_SMPS_RANGE_SPLIT 0x60
....@@ -345,7 +392,7 @@
345392 	enum spmi_regulator_logical_type	logical_type;
346393 	u32					revision_min;
347394 	u32					revision_max;
348
-	struct regulator_ops			*ops;
395
+	const struct regulator_ops		*ops;
349396 	struct spmi_voltage_set_points		*set_points;
350397 	int					hpm_min_load;
351398 };
....@@ -447,6 +494,10 @@
447494 	SPMI_VOLTAGE_RANGE(1,  160000, 1360000, 2200000, 2200000, 10000),
448495 };
449496 
497
+static struct spmi_voltage_range ftsmps426_ranges[] = {
498
+	SPMI_VOLTAGE_RANGE(0,       0,  320000, 1352000, 1352000,  4000),
499
+};
500
+
450501 static struct spmi_voltage_range boost_ranges[] = {
451502 	SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
452503 };
....@@ -472,6 +523,26 @@
472523 	SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
473524 };
474525 
526
+static struct spmi_voltage_range pldo660_ranges[] = {
527
+	SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 3544000, 3544000, 8000),
528
+};
529
+
530
+static struct spmi_voltage_range nldo660_ranges[] = {
531
+	SPMI_VOLTAGE_RANGE(0,  320000,  320000, 1304000, 1304000, 8000),
532
+};
533
+
534
+static struct spmi_voltage_range ht_lvpldo_ranges[] = {
535
+	SPMI_VOLTAGE_RANGE(0, 1504000, 1504000, 2000000, 2000000, 8000),
536
+};
537
+
538
+static struct spmi_voltage_range ht_nldo_ranges[] = {
539
+	SPMI_VOLTAGE_RANGE(0,  312000,  312000, 1304000, 1304000, 8000),
540
+};
541
+
542
+static struct spmi_voltage_range hfs430_ranges[] = {
543
+	SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000),
544
+};
545
+
475546 static DEFINE_SPMI_SET_POINTS(pldo);
476547 static DEFINE_SPMI_SET_POINTS(nldo1);
477548 static DEFINE_SPMI_SET_POINTS(nldo2);
....@@ -480,12 +551,18 @@
480551 static DEFINE_SPMI_SET_POINTS(smps);
481552 static DEFINE_SPMI_SET_POINTS(ftsmps);
482553 static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
554
+static DEFINE_SPMI_SET_POINTS(ftsmps426);
483555 static DEFINE_SPMI_SET_POINTS(boost);
484556 static DEFINE_SPMI_SET_POINTS(boost_byp);
485557 static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
486558 static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
487559 static DEFINE_SPMI_SET_POINTS(ult_nldo);
488560 static DEFINE_SPMI_SET_POINTS(ult_pldo);
561
+static DEFINE_SPMI_SET_POINTS(pldo660);
562
+static DEFINE_SPMI_SET_POINTS(nldo660);
563
+static DEFINE_SPMI_SET_POINTS(ht_lvpldo);
564
+static DEFINE_SPMI_SET_POINTS(ht_nldo);
565
+static DEFINE_SPMI_SET_POINTS(hfs430);
489566 
490567 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
491568 				 int len)
....@@ -747,18 +824,31 @@
747824 	return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
748825 }
749826 
827
+static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
828
+					      unsigned selector);
829
+
830
+static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev,
831
+					      unsigned selector)
832
+{
833
+	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
834
+	u8 buf[2];
835
+	int mV;
836
+
837
+	mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000;
838
+
839
+	buf[0] = mV & 0xff;
840
+	buf[1] = mV >> 8;
841
+	return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2);
842
+}
843
+
750844 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
751845 		unsigned int old_selector, unsigned int new_selector)
752846 {
753847 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
754
-	const struct spmi_voltage_range *range;
755848 	int diff_uV;
756849 
757
-	range = spmi_regulator_find_range(vreg);
758
-	if (!range)
759
-		return -EINVAL;
760
-
761
-	diff_uV = abs(new_selector - old_selector) * range->step_uV;
850
+	diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) -
851
+		      spmi_regulator_common_list_voltage(rdev, old_selector));
762852 
763853 	return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
764854 }
....@@ -776,6 +866,21 @@
776866 		return -EINVAL;
777867 
778868 	return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
869
+}
870
+
871
+static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev)
872
+{
873
+	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
874
+	const struct spmi_voltage_range *range;
875
+	u8 buf[2];
876
+	int uV;
877
+
878
+	spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2);
879
+
880
+	uV = (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000;
881
+	range = vreg->set_points->range;
882
+
883
+	return (uV - range->set_point_min_uV) / range->step_uV;
779884 }
780885 
781886 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev,
....@@ -911,13 +1016,33 @@
9111016 
9121017 	spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
9131018 
914
-	if (reg & SPMI_COMMON_MODE_HPM_MASK)
1019
+	reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
1020
+
1021
+	switch (reg) {
1022
+	case SPMI_COMMON_MODE_HPM_MASK:
9151023 		return REGULATOR_MODE_NORMAL;
916
-
917
-	if (reg & SPMI_COMMON_MODE_AUTO_MASK)
1024
+	case SPMI_COMMON_MODE_AUTO_MASK:
9181025 		return REGULATOR_MODE_FAST;
1026
+	default:
1027
+		return REGULATOR_MODE_IDLE;
1028
+	}
1029
+}
9191030 
920
-	return REGULATOR_MODE_IDLE;
1031
+static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev)
1032
+{
1033
+	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1034
+	u8 reg;
1035
+
1036
+	spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
1037
+
1038
+	switch (reg) {
1039
+	case SPMI_FTSMPS426_MODE_HPM_MASK:
1040
+		return REGULATOR_MODE_NORMAL;
1041
+	case SPMI_FTSMPS426_MODE_AUTO_MASK:
1042
+		return REGULATOR_MODE_FAST;
1043
+	default:
1044
+		return REGULATOR_MODE_IDLE;
1045
+	}
9211046 }
9221047 
9231048 static int
....@@ -925,12 +1050,43 @@
9251050 {
9261051 	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
9271052 	u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
928
-	u8 val = 0;
1053
+	u8 val;
9291054 
930
-	if (mode == REGULATOR_MODE_NORMAL)
1055
+	switch (mode) {
1056
+	case REGULATOR_MODE_NORMAL:
9311057 		val = SPMI_COMMON_MODE_HPM_MASK;
932
-	else if (mode == REGULATOR_MODE_FAST)
1058
+		break;
1059
+	case REGULATOR_MODE_FAST:
9331060 		val = SPMI_COMMON_MODE_AUTO_MASK;
1061
+		break;
1062
+	default:
1063
+		val = 0;
1064
+		break;
1065
+	}
1066
+
1067
+	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
1068
+}
1069
+
1070
+static int
1071
+spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode)
1072
+{
1073
+	struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1074
+	u8 mask = SPMI_FTSMPS426_MODE_MASK;
1075
+	u8 val;
1076
+
1077
+	switch (mode) {
1078
+	case REGULATOR_MODE_NORMAL:
1079
+		val = SPMI_FTSMPS426_MODE_HPM_MASK;
1080
+		break;
1081
+	case REGULATOR_MODE_FAST:
1082
+		val = SPMI_FTSMPS426_MODE_AUTO_MASK;
1083
+		break;
1084
+	case REGULATOR_MODE_IDLE:
1085
+		val = SPMI_FTSMPS426_MODE_LPM_MASK;
1086
+		break;
1087
+	default:
1088
+		return -EINVAL;
1089
+	}
9341090 
9351091 	return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
9361092 }
....@@ -1137,7 +1293,7 @@
11371293 
11381294 static struct regulator_ops spmi_saw_ops = {};
11391295 
1140
-static struct regulator_ops spmi_smps_ops = {
1296
+static const struct regulator_ops spmi_smps_ops = {
11411297 	.enable			= regulator_enable_regmap,
11421298 	.disable		= regulator_disable_regmap,
11431299 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1152,7 +1308,7 @@
11521308 	.set_pull_down		= spmi_regulator_common_set_pull_down,
11531309 };
11541310 
1155
-static struct regulator_ops spmi_ldo_ops = {
1311
+static const struct regulator_ops spmi_ldo_ops = {
11561312 	.enable			= regulator_enable_regmap,
11571313 	.disable		= regulator_disable_regmap,
11581314 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1169,7 +1325,7 @@
11691325 	.set_soft_start		= spmi_regulator_common_set_soft_start,
11701326 };
11711327 
1172
-static struct regulator_ops spmi_ln_ldo_ops = {
1328
+static const struct regulator_ops spmi_ln_ldo_ops = {
11731329 	.enable			= regulator_enable_regmap,
11741330 	.disable		= regulator_disable_regmap,
11751331 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1181,7 +1337,7 @@
11811337 	.get_bypass		= spmi_regulator_common_get_bypass,
11821338 };
11831339 
1184
-static struct regulator_ops spmi_vs_ops = {
1340
+static const struct regulator_ops spmi_vs_ops = {
11851341 	.enable			= spmi_regulator_vs_enable,
11861342 	.disable		= regulator_disable_regmap,
11871343 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1192,7 +1348,7 @@
11921348 	.get_mode		= spmi_regulator_common_get_mode,
11931349 };
11941350 
1195
-static struct regulator_ops spmi_boost_ops = {
1351
+static const struct regulator_ops spmi_boost_ops = {
11961352 	.enable			= regulator_enable_regmap,
11971353 	.disable		= regulator_disable_regmap,
11981354 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1203,7 +1359,7 @@
12031359 	.set_input_current_limit = spmi_regulator_set_ilim,
12041360 };
12051361 
1206
-static struct regulator_ops spmi_ftsmps_ops = {
1362
+static const struct regulator_ops spmi_ftsmps_ops = {
12071363 	.enable			= regulator_enable_regmap,
12081364 	.disable		= regulator_disable_regmap,
12091365 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1218,7 +1374,7 @@
12181374 	.set_pull_down		= spmi_regulator_common_set_pull_down,
12191375 };
12201376 
1221
-static struct regulator_ops spmi_ult_lo_smps_ops = {
1377
+static const struct regulator_ops spmi_ult_lo_smps_ops = {
12221378 	.enable			= regulator_enable_regmap,
12231379 	.disable		= regulator_disable_regmap,
12241380 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1232,7 +1388,7 @@
12321388 	.set_pull_down		= spmi_regulator_common_set_pull_down,
12331389 };
12341390 
1235
-static struct regulator_ops spmi_ult_ho_smps_ops = {
1391
+static const struct regulator_ops spmi_ult_ho_smps_ops = {
12361392 	.enable			= regulator_enable_regmap,
12371393 	.disable		= regulator_disable_regmap,
12381394 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1247,7 +1403,7 @@
12471403 	.set_pull_down		= spmi_regulator_common_set_pull_down,
12481404 };
12491405 
1250
-static struct regulator_ops spmi_ult_ldo_ops = {
1406
+static const struct regulator_ops spmi_ult_ldo_ops = {
12511407 	.enable			= regulator_enable_regmap,
12521408 	.disable		= regulator_disable_regmap,
12531409 	.is_enabled		= regulator_is_enabled_regmap,
....@@ -1264,12 +1420,41 @@
12641420 	.set_soft_start		= spmi_regulator_common_set_soft_start,
12651421 };
12661422 
1423
+static const struct regulator_ops spmi_ftsmps426_ops = {
1424
+	.enable			= regulator_enable_regmap,
1425
+	.disable		= regulator_disable_regmap,
1426
+	.is_enabled		= regulator_is_enabled_regmap,
1427
+	.set_voltage_sel	= spmi_regulator_ftsmps426_set_voltage,
1428
+	.set_voltage_time_sel	= spmi_regulator_set_voltage_time_sel,
1429
+	.get_voltage_sel	= spmi_regulator_ftsmps426_get_voltage,
1430
+	.map_voltage		= spmi_regulator_single_map_voltage,
1431
+	.list_voltage		= spmi_regulator_common_list_voltage,
1432
+	.set_mode		= spmi_regulator_ftsmps426_set_mode,
1433
+	.get_mode		= spmi_regulator_ftsmps426_get_mode,
1434
+	.set_load		= spmi_regulator_common_set_load,
1435
+	.set_pull_down		= spmi_regulator_common_set_pull_down,
1436
+};
1437
+
1438
+static const struct regulator_ops spmi_hfs430_ops = {
1439
+	.enable			= regulator_enable_regmap,
1440
+	.disable		= regulator_disable_regmap,
1441
+	.is_enabled		= regulator_is_enabled_regmap,
1442
+	.set_voltage_sel	= spmi_regulator_ftsmps426_set_voltage,
1443
+	.set_voltage_time_sel	= spmi_regulator_set_voltage_time_sel,
1444
+	.get_voltage_sel	= spmi_regulator_ftsmps426_get_voltage,
1445
+	.map_voltage		= spmi_regulator_single_map_voltage,
1446
+	.list_voltage		= spmi_regulator_common_list_voltage,
1447
+	.set_mode		= spmi_regulator_ftsmps426_set_mode,
1448
+	.get_mode		= spmi_regulator_ftsmps426_get_mode,
1449
+};
1450
+
12671451 /* Maximum possible digital major revision value */
12681452 #define INF 0xFF
12691453 
12701454 static const struct spmi_regulator_mapping supported_regulators[] = {
12711455 	/*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
12721456 	SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
1457
+	SPMI_VREG(BUCK,  HFS430,   0, INF, HFS430, hfs430, hfs430,  10000),
12731458 	SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
12741459 	SPMI_VREG(LDO,   N600,     0,   0, LDO,    ldo,    nldo2,   10000),
12751460 	SPMI_VREG(LDO,   N1200,    0,   0, LDO,    ldo,    nldo2,   10000),
....@@ -1290,6 +1475,30 @@
12901475 	SPMI_VREG(LDO,   LV_P300,  0, INF, LDO,    ldo,    pldo,    10000),
12911476 	SPMI_VREG(LDO,   LV_P600,  0, INF, LDO,    ldo,    pldo,    10000),
12921477 	SPMI_VREG(LDO,   LV_P1200, 0, INF, LDO,    ldo,    pldo,    10000),
1478
+	SPMI_VREG(LDO, HT_N300_ST,   0, INF, FTSMPS426, ftsmps426,
1479
+							ht_nldo,   30000),
1480
+	SPMI_VREG(LDO, HT_N600_ST,   0, INF, FTSMPS426, ftsmps426,
1481
+							ht_nldo,   30000),
1482
+	SPMI_VREG(LDO, HT_N1200_ST,  0, INF, FTSMPS426, ftsmps426,
1483
+							ht_nldo,   30000),
1484
+	SPMI_VREG(LDO, HT_LVP150,    0, INF, FTSMPS426, ftsmps426,
1485
+							ht_lvpldo, 10000),
1486
+	SPMI_VREG(LDO, HT_LVP300,    0, INF, FTSMPS426, ftsmps426,
1487
+							ht_lvpldo, 10000),
1488
+	SPMI_VREG(LDO, L660_N300_ST, 0, INF, FTSMPS426, ftsmps426,
1489
+							nldo660,   10000),
1490
+	SPMI_VREG(LDO, L660_N600_ST, 0, INF, FTSMPS426, ftsmps426,
1491
+							nldo660,   10000),
1492
+	SPMI_VREG(LDO, L660_P50,     0, INF, FTSMPS426, ftsmps426,
1493
+							pldo660,   10000),
1494
+	SPMI_VREG(LDO, L660_P150,    0, INF, FTSMPS426, ftsmps426,
1495
+							pldo660,   10000),
1496
+	SPMI_VREG(LDO, L660_P600,    0, INF, FTSMPS426, ftsmps426,
1497
+							pldo660,   10000),
1498
+	SPMI_VREG(LDO, L660_LVP150,  0, INF, FTSMPS426, ftsmps426,
1499
+							ht_lvpldo, 10000),
1500
+	SPMI_VREG(LDO, L660_LVP600,  0, INF, FTSMPS426, ftsmps426,
1501
+							ht_lvpldo, 10000),
12931502 	SPMI_VREG_VS(LV100,        0, INF),
12941503 	SPMI_VREG_VS(LV300,        0, INF),
12951504 	SPMI_VREG_VS(MV300,        0, INF),
....@@ -1299,6 +1508,7 @@
12991508 	SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST,  boost,  boost,       0),
13001509 	SPMI_VREG(FTS,   FTS_CTL,  0, INF, FTSMPS, ftsmps, ftsmps, 100000),
13011510 	SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1511
+	SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000),
13021512 	SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
13031513 	SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
13041514 						ult_lo_smps,   100000),
....@@ -1436,6 +1646,35 @@
14361646 	return ret;
14371647 }
14381648 
1649
+static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg,
1650
+						   int clock_rate)
1651
+{
1652
+	int ret;
1653
+	u8 reg = 0;
1654
+	int delay, slew_rate;
1655
+	const struct spmi_voltage_range *range = &vreg->set_points->range[0];
1656
+
1657
+	ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1658
+	if (ret) {
1659
+		dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1660
+		return ret;
1661
+	}
1662
+
1663
+	delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK;
1664
+	delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT;
1665
+
1666
+	/* slew_rate has units of uV/us */
1667
+	slew_rate = clock_rate * range->step_uV;
1668
+	slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay);
1669
+	slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM;
1670
+	slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN;
1671
+
1672
+	/* Ensure that the slew rate is greater than 0 */
1673
+	vreg->slew_rate = max(slew_rate, 1);
1674
+
1675
+	return ret;
1676
+}
1677
+
14391678 static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
14401679 				const struct spmi_regulator_init_data *data)
14411680 {
....@@ -1450,45 +1689,43 @@
14501689 		return ret;
14511690 
14521691 	/* Set up enable pin control. */
1453
-	if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1454
-	     || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
1455
-	     || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
1456
-	    && !(data->pin_ctrl_enable
1457
-			& SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1458
-		ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1459
-			~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1460
-		ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1461
-		    data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1692
+	if (!(data->pin_ctrl_enable & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1693
+		switch (type) {
1694
+		case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1695
+		case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
1696
+		case SPMI_REGULATOR_LOGICAL_TYPE_VS:
1697
+			ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1698
+				~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1699
+			ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1700
+				data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1701
+			break;
1702
+		default:
1703
+			break;
1704
+		}
14621705 	}
14631706 
14641707 	/* Set up mode pin control. */
1465
-	if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1466
-	    || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
1467
-		&& !(data->pin_ctrl_hpm
1468
-			& SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1469
-		ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1470
-			~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1471
-		ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1472
-			data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1473
-	}
1474
-
1475
-	if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
1476
-	   && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1477
-		ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1478
-			~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1479
-		ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1480
-		       data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1481
-	}
1482
-
1483
-	if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
1484
-		|| type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
1485
-		|| type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
1486
-		&& !(data->pin_ctrl_hpm
1487
-			& SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1488
-		ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1489
-			~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1490
-		ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1491
-		       data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1708
+	if (!(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1709
+		switch (type) {
1710
+		case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1711
+		case SPMI_REGULATOR_LOGICAL_TYPE_LDO:
1712
+			ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1713
+				~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1714
+			ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1715
+				data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1716
+			break;
1717
+		case SPMI_REGULATOR_LOGICAL_TYPE_VS:
1718
+		case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1719
+		case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1720
+		case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO:
1721
+			ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1722
+				~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1723
+			ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1724
+				data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1725
+			break;
1726
+		default:
1727
+			break;
1728
+		}
14921729 	}
14931730 
14941731 	/* Write back any control register values that were modified. */
....@@ -1575,6 +1812,19 @@
15751812 		ret = spmi_regulator_init_slew_rate(vreg);
15761813 		if (ret)
15771814 			return ret;
1815
+		break;
1816
+	case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426:
1817
+		ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
1818
+						SPMI_FTSMPS426_CLOCK_RATE);
1819
+		if (ret)
1820
+			return ret;
1821
+		break;
1822
+	case SPMI_REGULATOR_LOGICAL_TYPE_HFS430:
1823
+		ret = spmi_regulator_init_slew_rate_ftsmps426(vreg,
1824
+							SPMI_HFS430_CLOCK_RATE);
1825
+		if (ret)
1826
+			return ret;
1827
+		break;
15781828 	default:
15791829 		break;
15801830 	}
....@@ -1673,6 +1923,39 @@
16731923 	{ }
16741924 };
16751925 
1926
+static const struct spmi_regulator_data pm8950_regulators[] = {
1927
+	{ "s1", 0x1400, "vdd_s1", },
1928
+	{ "s2", 0x1700, "vdd_s2", },
1929
+	{ "s3", 0x1a00, "vdd_s3", },
1930
+	{ "s4", 0x1d00, "vdd_s4", },
1931
+	{ "s5", 0x2000, "vdd_s5", },
1932
+	{ "s6", 0x2300, "vdd_s6", },
1933
+	{ "l1", 0x4000, "vdd_l1_l19", },
1934
+	{ "l2", 0x4100, "vdd_l2_l23", },
1935
+	{ "l3", 0x4200, "vdd_l3", },
1936
+	{ "l4", 0x4300, "vdd_l4_l5_l6_l7_l16", },
1937
+	{ "l5", 0x4400, "vdd_l4_l5_l6_l7_l16", },
1938
+	{ "l6", 0x4500, "vdd_l4_l5_l6_l7_l16", },
1939
+	{ "l7", 0x4600, "vdd_l4_l5_l6_l7_l16", },
1940
+	{ "l8", 0x4700, "vdd_l8_l11_l12_l17_l22", },
1941
+	{ "l9", 0x4800, "vdd_l9_l10_l13_l14_l15_l18", },
1942
+	{ "l10", 0x4900, "vdd_l9_l10_l13_l14_l15_l18", },
1943
+	{ "l11", 0x4a00, "vdd_l8_l11_l12_l17_l22", },
1944
+	{ "l12", 0x4b00, "vdd_l8_l11_l12_l17_l22", },
1945
+	{ "l13", 0x4c00, "vdd_l9_l10_l13_l14_l15_l18", },
1946
+	{ "l14", 0x4d00, "vdd_l9_l10_l13_l14_l15_l18", },
1947
+	{ "l15", 0x4e00, "vdd_l9_l10_l13_l14_l15_l18", },
1948
+	{ "l16", 0x4f00, "vdd_l4_l5_l6_l7_l16", },
1949
+	{ "l17", 0x5000, "vdd_l8_l11_l12_l17_l22", },
1950
+	{ "l18", 0x5100, "vdd_l9_l10_l13_l14_l15_l18", },
1951
+	{ "l19", 0x5200, "vdd_l1_l19", },
1952
+	{ "l20", 0x5300, "vdd_l20", },
1953
+	{ "l21", 0x5400, "vdd_l21", },
1954
+	{ "l22", 0x5500, "vdd_l8_l11_l12_l17_l22", },
1955
+	{ "l23", 0x5600, "vdd_l2_l23", },
1956
+	{ }
1957
+};
1958
+
16761959 static const struct spmi_regulator_data pm8994_regulators[] = {
16771960 	{ "s1", 0x1400, "vdd_s1", },
16781961 	{ "s2", 0x1700, "vdd_s2", },
....@@ -1731,12 +2014,86 @@
17312014 	{ }
17322015 };
17332016 
2017
+static const struct spmi_regulator_data pm660_regulators[] = {
2018
+	{ "s1", 0x1400, "vdd_s1", },
2019
+	{ "s2", 0x1700, "vdd_s2", },
2020
+	{ "s3", 0x1a00, "vdd_s3", },
2021
+	{ "s4", 0x1d00, "vdd_s3", },
2022
+	{ "s5", 0x2000, "vdd_s5", },
2023
+	{ "s6", 0x2300, "vdd_s6", },
2024
+	{ "l1", 0x4000, "vdd_l1_l6_l7", },
2025
+	{ "l2", 0x4100, "vdd_l2_l3", },
2026
+	{ "l3", 0x4200, "vdd_l2_l3", },
2027
+	/* l4 is unaccessible on PM660 */
2028
+	{ "l5", 0x4400, "vdd_l5", },
2029
+	{ "l6", 0x4500, "vdd_l1_l6_l7", },
2030
+	{ "l7", 0x4600, "vdd_l1_l6_l7", },
2031
+	{ "l8", 0x4700, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2032
+	{ "l9", 0x4800, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2033
+	{ "l10", 0x4900, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2034
+	{ "l11", 0x4a00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2035
+	{ "l12", 0x4b00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2036
+	{ "l13", 0x4c00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2037
+	{ "l14", 0x4d00, "vdd_l8_l9_l10_l11_l12_l13_l14", },
2038
+	{ "l15", 0x4e00, "vdd_l15_l16_l17_l18_l19", },
2039
+	{ "l16", 0x4f00, "vdd_l15_l16_l17_l18_l19", },
2040
+	{ "l17", 0x5000, "vdd_l15_l16_l17_l18_l19", },
2041
+	{ "l18", 0x5100, "vdd_l15_l16_l17_l18_l19", },
2042
+	{ "l19", 0x5200, "vdd_l15_l16_l17_l18_l19", },
2043
+	{ }
2044
+};
2045
+
2046
+static const struct spmi_regulator_data pm660l_regulators[] = {
2047
+	{ "s1", 0x1400, "vdd_s1", },
2048
+	{ "s2", 0x1700, "vdd_s2", },
2049
+	{ "s3", 0x1a00, "vdd_s3", },
2050
+	{ "s4", 0x1d00, "vdd_s4", },
2051
+	{ "s5", 0x2000, "vdd_s5", },
2052
+	{ "l1", 0x4000, "vdd_l1_l9_l10", },
2053
+	{ "l2", 0x4100, "vdd_l2", },
2054
+	{ "l3", 0x4200, "vdd_l3_l5_l7_l8", },
2055
+	{ "l4", 0x4300, "vdd_l4_l6", },
2056
+	{ "l5", 0x4400, "vdd_l3_l5_l7_l8", },
2057
+	{ "l6", 0x4500, "vdd_l4_l6", },
2058
+	{ "l7", 0x4600, "vdd_l3_l5_l7_l8", },
2059
+	{ "l8", 0x4700, "vdd_l3_l5_l7_l8", },
2060
+	{ "l9", 0x4800, "vdd_l1_l9_l10", },
2061
+	{ "l10", 0x4900, "vdd_l1_l9_l10", },
2062
+	{ }
2063
+};
2064
+
2065
+
2066
+static const struct spmi_regulator_data pm8004_regulators[] = {
2067
+	{ "s2", 0x1700, "vdd_s2", },
2068
+	{ "s5", 0x2000, "vdd_s5", },
2069
+	{ }
2070
+};
2071
+
2072
+static const struct spmi_regulator_data pm8005_regulators[] = {
2073
+	{ "s1", 0x1400, "vdd_s1", },
2074
+	{ "s2", 0x1700, "vdd_s2", },
2075
+	{ "s3", 0x1a00, "vdd_s3", },
2076
+	{ "s4", 0x1d00, "vdd_s4", },
2077
+	{ }
2078
+};
2079
+
2080
+static const struct spmi_regulator_data pms405_regulators[] = {
2081
+	{ "s3", 0x1a00, "vdd_s3"},
2082
+	{ }
2083
+};
2084
+
17342085 static const struct of_device_id qcom_spmi_regulator_match[] = {
2086
+	{ .compatible = "qcom,pm8004-regulators", .data = &pm8004_regulators },
2087
+	{ .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators },
17352088 	{ .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
17362089 	{ .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
17372090 	{ .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
2091
+	{ .compatible = "qcom,pm8950-regulators", .data = &pm8950_regulators },
17382092 	{ .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
17392093 	{ .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
2094
+	{ .compatible = "qcom,pm660-regulators", .data = &pm660_regulators },
2095
+	{ .compatible = "qcom,pm660l-regulators", .data = &pm660l_regulators },
2096
+	{ .compatible = "qcom,pms405-regulators", .data = &pms405_regulators },
17402097 	{ }
17412098 };
17422099 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
....@@ -1744,6 +2101,7 @@
17442101 static int qcom_spmi_regulator_probe(struct platform_device *pdev)
17452102 {
17462103 	const struct spmi_regulator_data *reg;
2104
+	const struct spmi_voltage_range *range;
17472105 	const struct of_device_id *match;
17482106 	struct regulator_config config = { };
17492107 	struct regulator_dev *rdev;
....@@ -1833,6 +2191,12 @@
18332191 			}
18342192 		}
18352193 
2194
+		if (vreg->set_points && vreg->set_points->count == 1) {
2195
+			/* since there is only one range */
2196
+			range = vreg->set_points->range;
2197
+			vreg->desc.uV_step = range->step_uV;
2198
+		}
2199
+
18362200 		config.dev = dev;
18372201 		config.driver_data = vreg;
18382202 		config.regmap = regmap;