mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/pwm/pwm-rcar.c
..
..
@@ -1,16 +1,18 @@
1
+// SPDX-License-Identifier: GPL-2.0
1
2
 /*
2
3
  * R-Car PWM Timer driver
3
4
  *
4
5
  * Copyright (C) 2015 Renesas Electronics Corporation
5
6
  *
6
- * This is free software; you can redistribute it and/or modify
7
- * it under the terms of version 2 of the GNU General Public License as
8
- * published by the Free Software Foundation.
7
+ * Limitations:
8
+ * - The hardware cannot generate a 0% duty cycle.
9
9
  */
10
10
 
11
11
 #include <linux/clk.h>
12
12
 #include <linux/err.h>
13
13
 #include <linux/io.h>
14
+#include <linux/log2.h>
15
+#include <linux/math64.h>
14
16
 #include <linux/module.h>
15
17
 #include <linux/of.h>
16
18
 #include <linux/platform_device.h>
..
..
@@ -71,19 +73,15 @@
71
73
 static int rcar_pwm_get_clock_division(struct rcar_pwm_chip *rp, int period_ns)
72
74
 {
73
75
 	unsigned long clk_rate = clk_get_rate(rp->clk);
74
-	unsigned long long max; /* max cycle / nanoseconds */
75
-	unsigned int div;
76
+	u64 div, tmp;
76
77
 
77
78
 	if (clk_rate == 0)
78
79
 		return -EINVAL;
79
80
 
80
-	for (div = 0; div <= RCAR_PWM_MAX_DIVISION; div++) {
81
-		max = (unsigned long long)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE *
82
-			(1 << div);
83
-		do_div(max, clk_rate);
84
-		if (period_ns <= max)
85
-			break;
86
-	}
81
+	div = (u64)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE;
82
+	tmp = (u64)period_ns * clk_rate + div - 1;
83
+	tmp = div64_u64(tmp, div);
84
+	div = ilog2(tmp - 1) + 1;
87
85
 
88
86
 	return (div <= RCAR_PWM_MAX_DIVISION) ? div : -ERANGE;
89
87
 }
..
..
@@ -142,39 +140,8 @@
142
140
 	pm_runtime_put(chip->dev);
143
141
 }
144
142
 
145
-static int rcar_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
146
-			   int duty_ns, int period_ns)
143
+static int rcar_pwm_enable(struct rcar_pwm_chip *rp)
147
144
 {
148
-	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
149
-	int div, ret;
150
-
151
-	div = rcar_pwm_get_clock_division(rp, period_ns);
152
-	if (div < 0)
153
-		return div;
154
-
155
-	/*
156
-	 * Let the core driver set pwm->period if disabled and duty_ns == 0.
157
-	 * But, this driver should prevent to set the new duty_ns if current
158
-	 * duty_cycle is not set
159
-	 */
160
-	if (!pwm_is_enabled(pwm) && !duty_ns && !pwm->state.duty_cycle)
161
-		return 0;
162
-
163
-	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR);
164
-
165
-	ret = rcar_pwm_set_counter(rp, div, duty_ns, period_ns);
166
-	if (!ret)
167
-		rcar_pwm_set_clock_control(rp, div);
168
-
169
-	/* The SYNC should be set to 0 even if rcar_pwm_set_counter failed */
170
-	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, 0, RCAR_PWMCR);
171
-
172
-	return ret;
173
-}
174
-
175
-static int rcar_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
176
-{
177
-	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
178
145
 	u32 value;
179
146
 
180
147
 	/* Don't enable the PWM device if CYC0 or PH0 is 0 */
..
..
@@ -188,19 +155,49 @@
188
155
 	return 0;
189
156
 }
190
157
 
191
-static void rcar_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
158
+static void rcar_pwm_disable(struct rcar_pwm_chip *rp)
159
+{
160
+	rcar_pwm_update(rp, RCAR_PWMCR_EN0, 0, RCAR_PWMCR);
161
+}
162
+
163
+static int rcar_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
164
+			  const struct pwm_state *state)
192
165
 {
193
166
 	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);
167
+	int div, ret;
194
168
 
195
-	rcar_pwm_update(rp, RCAR_PWMCR_EN0, 0, RCAR_PWMCR);
169
+	/* This HW/driver only supports normal polarity */
170
+	if (state->polarity != PWM_POLARITY_NORMAL)
171
+		return -ENOTSUPP;
172
+
173
+	if (!state->enabled) {
174
+		rcar_pwm_disable(rp);
175
+		return 0;
176
+	}
177
+
178
+	div = rcar_pwm_get_clock_division(rp, state->period);
179
+	if (div < 0)
180
+		return div;
181
+
182
+	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR);
183
+
184
+	ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period);
185
+	if (!ret)
186
+		rcar_pwm_set_clock_control(rp, div);
187
+
188
+	/* The SYNC should be set to 0 even if rcar_pwm_set_counter failed */
189
+	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, 0, RCAR_PWMCR);
190
+
191
+	if (!ret)
192
+		ret = rcar_pwm_enable(rp);
193
+
194
+	return ret;
196
195
 }
197
196
 
198
197
 static const struct pwm_ops rcar_pwm_ops = {
199
198
 	.request = rcar_pwm_request,
200
199
 	.free = rcar_pwm_free,
201
-	.config = rcar_pwm_config,
202
-	.enable = rcar_pwm_enable,
203
-	.disable = rcar_pwm_disable,
200
+	.apply = rcar_pwm_apply,
204
201
 	.owner = THIS_MODULE,
205
202
 };
206
203
 
..
..
@@ -262,52 +259,11 @@
262
259
 };
263
260
 MODULE_DEVICE_TABLE(of, rcar_pwm_of_table);
264
261
 
265
-#ifdef CONFIG_PM_SLEEP
266
-static struct pwm_device *rcar_pwm_dev_to_pwm_dev(struct device *dev)
267
-{
268
-	struct rcar_pwm_chip *rcar_pwm = dev_get_drvdata(dev);
269
-	struct pwm_chip *chip = &rcar_pwm->chip;
270
-
271
-	return &chip->pwms[0];
272
-}
273
-
274
-static int rcar_pwm_suspend(struct device *dev)
275
-{
276
-	struct pwm_device *pwm = rcar_pwm_dev_to_pwm_dev(dev);
277
-
278
-	if (!test_bit(PWMF_REQUESTED, &pwm->flags))
279
-		return 0;
280
-
281
-	pm_runtime_put(dev);
282
-
283
-	return 0;
284
-}
285
-
286
-static int rcar_pwm_resume(struct device *dev)
287
-{
288
-	struct pwm_device *pwm = rcar_pwm_dev_to_pwm_dev(dev);
289
-
290
-	if (!test_bit(PWMF_REQUESTED, &pwm->flags))
291
-		return 0;
292
-
293
-	pm_runtime_get_sync(dev);
294
-
295
-	rcar_pwm_config(pwm->chip, pwm, pwm->state.duty_cycle,
296
-			pwm->state.period);
297
-	if (pwm_is_enabled(pwm))
298
-		rcar_pwm_enable(pwm->chip, pwm);
299
-
300
-	return 0;
301
-}
302
-#endif /* CONFIG_PM_SLEEP */
303
-static SIMPLE_DEV_PM_OPS(rcar_pwm_pm_ops, rcar_pwm_suspend, rcar_pwm_resume);
304
-
305
262
 static struct platform_driver rcar_pwm_driver = {
306
263
 	.probe = rcar_pwm_probe,
307
264
 	.remove = rcar_pwm_remove,
308
265
 	.driver = {
309
266
 		.name = "pwm-rcar",
310
-		.pm	= &rcar_pwm_pm_ops,
311
267
 		.of_match_table = of_match_ptr(rcar_pwm_of_table),
312
268
 	}
313
269
 };