| .. | .. |
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| 6 | 6 | config PINCTRL_BAYTRAIL |
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| 7 | 7 | bool "Intel Baytrail GPIO pin control" |
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| 8 | 8 | depends on ACPI |
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| 9 | | - select GPIOLIB |
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| 10 | | - select GPIOLIB_IRQCHIP |
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| 11 | | - select PINMUX |
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| 12 | | - select PINCONF |
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| 13 | | - select GENERIC_PINCONF |
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| 9 | + select PINCTRL_INTEL |
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| 14 | 10 | help |
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| 15 | 11 | driver for memory mapped GPIO functionality on Intel Baytrail |
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| 16 | 12 | platforms. Supports 3 banks with 102, 28 and 44 gpios. |
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| .. | .. |
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| 22 | 18 | config PINCTRL_CHERRYVIEW |
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| 23 | 19 | tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" |
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| 24 | 20 | depends on ACPI |
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| 21 | + select PINCTRL_INTEL |
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| 22 | + help |
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| 23 | + Cherryview/Braswell pinctrl driver provides an interface that |
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| 24 | + allows configuring of SoC pins and using them as GPIOs. |
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| 25 | + |
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| 26 | +config PINCTRL_LYNXPOINT |
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| 27 | + tristate "Intel Lynxpoint pinctrl and GPIO driver" |
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| 28 | + depends on ACPI |
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| 25 | 29 | select PINMUX |
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| 26 | 30 | select PINCONF |
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| 27 | 31 | select GENERIC_PINCONF |
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| 28 | 32 | select GPIOLIB |
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| 29 | 33 | select GPIOLIB_IRQCHIP |
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| 30 | 34 | help |
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| 31 | | - Cherryview/Braswell pinctrl driver provides an interface that |
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| 32 | | - allows configuring of SoC pins and using them as GPIOs. |
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| 35 | + Lynxpoint is the PCH of Intel Haswell. This pinctrl driver |
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| 36 | + provides an interface that allows configuring of PCH pins and |
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| 37 | + using them as GPIOs. |
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| 33 | 38 | |
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| 34 | 39 | config PINCTRL_MERRIFIELD |
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| 35 | 40 | tristate "Intel Merrifield pinctrl driver" |
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| .. | .. |
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| 82 | 87 | This pinctrl driver provides an interface that allows configuring |
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| 83 | 88 | of Intel Denverton SoC pins and using them as GPIOs. |
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| 84 | 89 | |
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| 90 | +config PINCTRL_EMMITSBURG |
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| 91 | + tristate "Intel Emmitsburg pinctrl and GPIO driver" |
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| 92 | + depends on ACPI |
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| 93 | + select PINCTRL_INTEL |
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| 94 | + help |
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| 95 | + This pinctrl driver provides an interface that allows configuring |
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| 96 | + of Intel Emmitsburg pins and using them as GPIOs. |
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| 97 | + |
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| 85 | 98 | config PINCTRL_GEMINILAKE |
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| 86 | 99 | tristate "Intel Gemini Lake SoC pinctrl and GPIO driver" |
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| 87 | 100 | depends on ACPI |
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| .. | .. |
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| 97 | 110 | help |
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| 98 | 111 | This pinctrl driver provides an interface that allows configuring |
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| 99 | 112 | of Intel Ice Lake PCH pins and using them as GPIOs. |
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| 113 | + |
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| 114 | +config PINCTRL_JASPERLAKE |
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| 115 | + tristate "Intel Jasper Lake PCH pinctrl and GPIO driver" |
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| 116 | + depends on ACPI |
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| 117 | + select PINCTRL_INTEL |
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| 118 | + help |
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| 119 | + This pinctrl driver provides an interface that allows configuring |
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| 120 | + of Intel Jasper Lake PCH pins and using them as GPIOs. |
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| 100 | 121 | |
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| 101 | 122 | config PINCTRL_LEWISBURG |
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| 102 | 123 | tristate "Intel Lewisburg pinctrl and GPIO driver" |
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| .. | .. |
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| 115 | 136 | provides an interface that allows configuring of PCH pins and |
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| 116 | 137 | using them as GPIOs. |
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| 117 | 138 | |
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| 139 | +config PINCTRL_TIGERLAKE |
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| 140 | + tristate "Intel Tiger Lake pinctrl and GPIO driver" |
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| 141 | + depends on ACPI |
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| 142 | + select PINCTRL_INTEL |
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| 143 | + help |
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| 144 | + This pinctrl driver provides an interface that allows configuring |
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| 145 | + of Intel Tiger Lake PCH pins and using them as GPIOs. |
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| 118 | 146 | endif |
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