| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
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| 1 | 2 | /** |
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| 2 | 3 | * drivers/net/phy/rockchip.c |
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| 3 | 4 | * |
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| .. | .. |
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| 6 | 7 | * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd |
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| 7 | 8 | * |
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| 8 | 9 | * David Wu <david.wu@rock-chips.com> |
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| 9 | | - * |
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| 10 | | - * This program is free software; you can redistribute it and/or modify |
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| 11 | | - * it under the terms of the GNU General Public License as published by |
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| 12 | | - * the Free Software Foundation; either version 2 of the License, or |
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| 13 | | - * (at your option) any later version. |
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| 14 | | - * |
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| 15 | 10 | */ |
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| 16 | 11 | |
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| 17 | 12 | #include <linux/ethtool.h> |
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| .. | .. |
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| 109 | 104 | |
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| 110 | 105 | static void rockchip_link_change_notify(struct phy_device *phydev) |
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| 111 | 106 | { |
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| 112 | | - int speed = SPEED_10; |
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| 113 | | - |
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| 114 | | - if (phydev->autoneg == AUTONEG_ENABLE) { |
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| 115 | | - int reg = phy_read(phydev, MII_SPECIAL_CONTROL_STATUS); |
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| 116 | | - |
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| 117 | | - if (reg < 0) { |
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| 118 | | - phydev_err(phydev, "phy_read err: %d.\n", reg); |
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| 119 | | - return; |
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| 120 | | - } |
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| 121 | | - |
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| 122 | | - if (reg & MII_SPEED_100) |
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| 123 | | - speed = SPEED_100; |
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| 124 | | - else if (reg & MII_SPEED_10) |
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| 125 | | - speed = SPEED_10; |
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| 126 | | - } else { |
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| 127 | | - int bmcr = phy_read(phydev, MII_BMCR); |
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| 128 | | - |
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| 129 | | - if (bmcr < 0) { |
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| 130 | | - phydev_err(phydev, "phy_read err: %d.\n", bmcr); |
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| 131 | | - return; |
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| 132 | | - } |
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| 133 | | - |
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| 134 | | - if (bmcr & BMCR_SPEED100) |
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| 135 | | - speed = SPEED_100; |
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| 136 | | - else |
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| 137 | | - speed = SPEED_10; |
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| 138 | | - } |
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| 139 | | - |
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| 140 | 107 | /* |
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| 141 | 108 | * If mode switch happens from 10BT to 100BT, all DSP/AFE |
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| 142 | 109 | * registers are set to default values. So any AFE/DSP |
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| 143 | 110 | * registers have to be re-initialized in this case. |
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| 144 | 111 | */ |
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| 145 | | - if ((phydev->speed == SPEED_10) && (speed == SPEED_100)) { |
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| 112 | + if (phydev->state == PHY_RUNNING && phydev->speed == SPEED_100) { |
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| 146 | 113 | int ret = rockchip_integrated_phy_analog_init(phydev); |
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| 114 | + |
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| 147 | 115 | if (ret) |
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| 148 | 116 | phydev_err(phydev, "rockchip_integrated_phy_analog_init err: %d.\n", |
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| 149 | 117 | ret); |
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| .. | .. |
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| 207 | 175 | .phy_id = INTERNAL_EPHY_ID, |
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| 208 | 176 | .phy_id_mask = 0xfffffff0, |
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| 209 | 177 | .name = "Rockchip integrated EPHY", |
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| 210 | | - .features = PHY_BASIC_FEATURES, |
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| 178 | + /* PHY_BASIC_FEATURES */ |
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| 211 | 179 | .flags = 0, |
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| 212 | 180 | .link_change_notify = rockchip_link_change_notify, |
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| 213 | 181 | .soft_reset = genphy_soft_reset, |
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| .. | .. |
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| 229 | 197 | |
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| 230 | 198 | MODULE_AUTHOR("David Wu <david.wu@rock-chips.com>"); |
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| 231 | 199 | MODULE_DESCRIPTION("Rockchip Ethernet PHY driver"); |
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| 232 | | -MODULE_LICENSE("GPL v2"); |
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| 200 | +MODULE_LICENSE("GPL"); |
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