forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376
kernel/drivers/media/platform/rockchip/isp/dev.h
....@@ -45,21 +45,11 @@
4545 #include "isp_stats.h"
4646 #include "isp_mipi_luma.h"
4747 #include "procfs.h"
48
+#include "isp_external.h"
4849 #include "version.h"
4950
5051 #define DRIVER_NAME "rkisp"
5152 #define ISP_VDEV_NAME DRIVER_NAME "_ispdev"
52
-#define SP_VDEV_NAME DRIVER_NAME "_selfpath"
53
-#define MP_VDEV_NAME DRIVER_NAME "_mainpath"
54
-#define DMA_VDEV_NAME DRIVER_NAME "_dmapath"
55
-#define RAW_VDEV_NAME DRIVER_NAME "_rawpath"
56
-#define DMATX0_VDEV_NAME DRIVER_NAME "_rawwr0"
57
-#define DMATX1_VDEV_NAME DRIVER_NAME "_rawwr1"
58
-#define DMATX2_VDEV_NAME DRIVER_NAME "_rawwr2"
59
-#define DMATX3_VDEV_NAME DRIVER_NAME "_rawwr3"
60
-#define DMARX0_VDEV_NAME DRIVER_NAME "_rawrd0_m"
61
-#define DMARX1_VDEV_NAME DRIVER_NAME "_rawrd1_l"
62
-#define DMARX2_VDEV_NAME DRIVER_NAME "_rawrd2_s"
6353
6454 #define GRP_ID_SENSOR BIT(0)
6555 #define GRP_ID_MIPIPHY BIT(1)
....@@ -70,8 +60,8 @@
7060 #define GRP_ID_ISP_BRIDGE BIT(6)
7161 #define GRP_ID_CSI BIT(7)
7262
73
-#define RKISP_MAX_SENSOR 2
74
-#define RKISP_MAX_PIPELINE 4
63
+#define RKISP_MAX_SENSOR 4
64
+#define RKISP_MAX_PIPELINE 8
7565
7666 #define RKISP_MEDIA_BUS_FMT_MASK 0xF000
7767 #define RKISP_MEDIA_BUS_FMT_BAYER 0x3000
....@@ -85,6 +75,7 @@
8575 ISP_FRAME_MP = BIT(3),
8676 ISP_FRAME_SP = BIT(4),
8777 ISP_FRAME_MPFBC = BIT(5),
78
+ ISP_FRAME_BP = BIT(6),
8879
8980 ISP_STOP = BIT(8),
9081 ISP_START = BIT(9),
....@@ -110,6 +101,25 @@
110101 RDBK_F_RD1,
111102 RDBK_F_RD2,
112103 RDBK_F_MAX
104
+};
105
+
106
+/* unite mode for isp to process high resolution
107
+ * ISP_UNITE_TWO: image splits left and right to two isp hardware
108
+ * ISP_UNITE_ONE: image splits left and right to single isp hardware
109
+ */
110
+enum {
111
+ ISP_UNITE_NONE = 0,
112
+ ISP_UNITE_TWO = 1,
113
+ ISP_UNITE_ONE = 2,
114
+};
115
+
116
+/* left and right index
117
+ * ISP_UNITE_LEFT: left of image to isp process
118
+ * ISP_UNITE_RIGHT: right of image to isp process
119
+ */
120
+enum {
121
+ ISP_UNITE_LEFT = 0,
122
+ ISP_UNITE_RIGHT = 1,
113123 };
114124
115125 /*
....@@ -158,6 +168,7 @@
158168 struct rkisp_hdr {
159169 u8 op_mode;
160170 u8 esp_mode;
171
+ u8 compr_bit;
161172 u8 index[HDR_DMA_MAX];
162173 atomic_t refcnt;
163174 struct v4l2_subdev *sensor;
....@@ -190,7 +201,6 @@
190201 struct v4l2_ctrl_handler ctrl_handler;
191202 struct media_device media_dev;
192203 struct v4l2_async_notifier notifier;
193
- struct v4l2_subdev *subdevs[RKISP_SD_MAX];
194204 struct rkisp_sensor_info *active_sensor;
195205 struct rkisp_sensor_info sensors[RKISP_MAX_SENSOR];
196206 int num_sensors;
....@@ -202,7 +212,7 @@
202212 struct rkisp_csi_device csi_dev;
203213 struct rkisp_bridge_device br_dev;
204214 struct rkisp_luma_vdev luma_vdev;
205
- struct proc_dir_entry *procfs;
215
+ struct rkisp_procfs procfs;
206216 struct rkisp_pipeline pipe;
207217 enum rkisp_isp_ver isp_ver;
208218 struct rkisp_emd_data emd_data_fifo[RKISP_EMDDATA_FIFO_MAX];
....@@ -219,9 +229,15 @@
219229 struct mutex apilock; /* mutex to serialize the calls of stream */
220230 struct mutex iqlock; /* mutex to serialize the calls of iq */
221231 wait_queue_head_t sync_onoff;
232
+
222233 dma_addr_t resmem_addr;
223234 phys_addr_t resmem_pa;
224235 size_t resmem_size;
236
+ struct rkisp_thunderboot_resmem_head tb_head;
237
+ bool is_thunderboot;
238
+ struct rkisp_tb_stream_info tb_stream_info;
239
+ unsigned int tb_addr_idx;
240
+
225241 int dev_id;
226242 unsigned int skip_frame;
227243 unsigned int irq_ends;
....@@ -229,8 +245,8 @@
229245 bool send_fbcgain;
230246 struct rkisp_ispp_buf *cur_fbcgain;
231247 struct rkisp_buffer *cur_spbuf;
232
- bool is_thunderboot;
233248
249
+ struct work_struct rdbk_work;
234250 struct kfifo rdbk_kfifo;
235251 spinlock_t rdbk_lock;
236252 int rdbk_cnt;
....@@ -238,6 +254,54 @@
238254 int rdbk_cnt_x2;
239255 int rdbk_cnt_x3;
240256 u32 rd_mode;
241
- u8 filt_state[RDBK_F_MAX];
257
+ int sw_rd_cnt;
258
+
259
+ struct rkisp_rx_buf_pool pv_pool[RKISP_RX_BUF_POOL_MAX];
260
+
261
+ struct mutex buf_lock;
262
+ spinlock_t cmsk_lock;
263
+ struct rkisp_cmsk_cfg cmsk_cfg;
264
+ bool is_cmsk_upd;
265
+ bool is_hw_link;
266
+ bool is_bigmode;
267
+ bool is_rdbk_auto;
268
+ bool is_pre_on;
269
+ bool is_first_double;
270
+ bool is_probe_end;
271
+ bool is_frame_double;
272
+
273
+ struct rkisp_vicap_input vicap_in;
274
+
275
+ u8 multi_mode;
276
+ u8 multi_index;
277
+ u8 rawaf_irq_cnt;
278
+ u8 unite_index;
242279 };
280
+
281
+static inline void
282
+rkisp_unite_write(struct rkisp_device *dev, u32 reg, u32 val, bool is_direct)
283
+{
284
+ rkisp_write(dev, reg, val, is_direct);
285
+ if (dev->hw_dev->unite)
286
+ rkisp_next_write(dev, reg, val, is_direct);
287
+}
288
+
289
+static inline void
290
+rkisp_unite_set_bits(struct rkisp_device *dev, u32 reg, u32 mask,
291
+ u32 val, bool is_direct)
292
+{
293
+ rkisp_set_bits(dev, reg, mask, val, is_direct);
294
+ if (dev->hw_dev->unite)
295
+ rkisp_next_set_bits(dev, reg, mask, val, is_direct);
296
+}
297
+
298
+static inline void
299
+rkisp_unite_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask,
300
+ bool is_direct)
301
+{
302
+ rkisp_clear_bits(dev, reg, mask, is_direct);
303
+ if (dev->hw_dev->unite)
304
+ rkisp_next_clear_bits(dev, reg, mask, is_direct);
305
+}
306
+
243307 #endif