~hc/RK356X_SDK_RELEASE.git

..	..	@@ -26,6 +26,10 @@
26	26	#include <linux/mfd/syscon.h>
27	27	#include "dev.h"
28	28	#include "procfs.h"
	29	+#include <linux/kthread.h>
	30	+#include "../../../../phy/rockchip/phy-rockchip-csi2-dphy-common.h"
	31	+#include <linux/of_reserved_mem.h>
	32	+#include <linux/of_address.h>
29	33
30	34	#define RKCIF_VERNO_LEN 10
31	35
..	..	@@ -92,6 +96,9 @@
92	96	return len;
93	97	}
94	98
	99	+static DEVICE_ATTR(compact_test, S_IWUSR \| S_IRUSR,
	100	+ rkcif_show_compact_mode, rkcif_store_compact_mode);
	101	+
95	102	static ssize_t rkcif_show_line_int_num(struct device *dev,
96	103	struct device_attribute *attr,
97	104	char *buf)
..	..	@@ -109,9 +116,15 @@
109	116	const char *buf, size_t len)
110	117	{
111	118	struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	119	+ struct sditf_priv *priv = cif_dev->sditf[0];
112	120	int val = 0;
113	121	int ret = 0;
114	122
	123	+ if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE) {
	124	+ dev_info(cif_dev->dev,
	125	+ "current mode is on the fly, wake up mode wouldn't used\n");
	126	+ return len;
	127	+ }
115	128	ret = kstrtoint(buf, 0, &val);
116	129	if (!ret && val >= 0 && val <= 0x3fff)
117	130	cif_dev->wait_line_cache = val;
..	..	@@ -119,6 +132,9 @@
119	132	dev_info(cif_dev->dev, "set line int num failed\n");
120	133	return len;
121	134	}
	135	+
	136	+static DEVICE_ATTR(wait_line, S_IWUSR \| S_IRUSR,
	137	+ rkcif_show_line_int_num, rkcif_store_line_int_num);
122	138
123	139	static ssize_t rkcif_show_dummybuf_mode(struct device *dev,
124	140	struct device_attribute *attr,
..	..	@@ -152,8 +168,11 @@
152	168	return len;
153	169	}
154	170
155		-/* show the compact mode of each stream in stream index order,
156		- * 1 for compact, 0 for 16bit
	171	+static DEVICE_ATTR(is_use_dummybuf, S_IWUSR \| S_IRUSR,
	172	+ rkcif_show_dummybuf_mode, rkcif_store_dummybuf_mode);
	173	+
	174	+/* show the memory mode of each stream in stream index order,
	175	+ * 1 for high align, 0 for low align
157	176	*/
158	177	static ssize_t rkcif_show_memory_mode(struct device *dev,
159	178	struct device_attribute *attr,
..	..	@@ -210,24 +229,388 @@
210	229	return len;
211	230	}
212	231
213		-static DEVICE_ATTR(compact_test, S_IWUSR \| S_IRUSR,
214		- rkcif_show_compact_mode, rkcif_store_compact_mode);
215		-
216		-static DEVICE_ATTR(wait_line, S_IWUSR \| S_IRUSR,
217		- rkcif_show_line_int_num, rkcif_store_line_int_num);
218		-
219		-static DEVICE_ATTR(is_use_dummybuf, S_IWUSR \| S_IRUSR,
220		- rkcif_show_dummybuf_mode, rkcif_store_dummybuf_mode);
221		-
222	232	static DEVICE_ATTR(is_high_align, S_IWUSR \| S_IRUSR,
223	233	rkcif_show_memory_mode, rkcif_store_memory_mode);
224	234
	235	+static ssize_t rkcif_show_scale_ch0_blc(struct device *dev,
	236	+ struct device_attribute *attr,
	237	+ char *buf)
	238	+{
	239	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	240	+ int ret;
	241	+
	242	+ ret = snprintf(buf, PAGE_SIZE, "ch0 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	243	+ cif_dev->scale_vdev[0].blc.pattern00,
	244	+ cif_dev->scale_vdev[0].blc.pattern01,
	245	+ cif_dev->scale_vdev[0].blc.pattern02,
	246	+ cif_dev->scale_vdev[0].blc.pattern03);
	247	+ return ret;
	248	+}
	249	+
	250	+static ssize_t rkcif_store_scale_ch0_blc(struct device *dev,
	251	+ struct device_attribute *attr,
	252	+ const char *buf, size_t len)
	253	+{
	254	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	255	+ int i = 0, index = 0;
	256	+ unsigned int val[4] = {0};
	257	+ unsigned int temp = 0;
	258	+ int ret = 0;
	259	+ int j = 0;
	260	+ char cha[2] = {0};
	261	+
	262	+ if (buf) {
	263	+ index = 0;
	264	+ for (i = 0; i < len; i++) {
	265	+ if (((buf[i] == ' ') \|\| (buf[i] == '\n')) && j) {
	266	+ index++;
	267	+ j = 0;
	268	+ if (index == 4)
	269	+ break;
	270	+ continue;
	271	+ } else {
	272	+ if (buf[i] < '0' \|\| buf[i] > '9')
	273	+ continue;
	274	+ cha[0] = buf[i];
	275	+ cha[1] = '\0';
	276	+ ret = kstrtoint(cha, 0, &temp);
	277	+ if (!ret) {
	278	+ if (j)
	279	+ val[index] *= 10;
	280	+ val[index] += temp;
	281	+ j++;
	282	+ }
	283	+ }
	284	+ }
	285	+ if (val[0] > 255 \|\| val[1] > 255 \|\| val[2] > 255 \|\| val[3] > 255)
	286	+ return -EINVAL;
	287	+ cif_dev->scale_vdev[0].blc.pattern00 = val[0];
	288	+ cif_dev->scale_vdev[0].blc.pattern01 = val[1];
	289	+ cif_dev->scale_vdev[0].blc.pattern02 = val[2];
	290	+ cif_dev->scale_vdev[0].blc.pattern03 = val[3];
	291	+ dev_info(cif_dev->dev,
	292	+ "set ch0 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	293	+ cif_dev->scale_vdev[0].blc.pattern00,
	294	+ cif_dev->scale_vdev[0].blc.pattern01,
	295	+ cif_dev->scale_vdev[0].blc.pattern02,
	296	+ cif_dev->scale_vdev[0].blc.pattern03);
	297	+ }
	298	+
	299	+ return len;
	300	+}
	301	+
	302	+static DEVICE_ATTR(scale_ch0_blc, S_IWUSR \| S_IRUSR,
	303	+ rkcif_show_scale_ch0_blc, rkcif_store_scale_ch0_blc);
	304	+
	305	+static ssize_t rkcif_show_scale_ch1_blc(struct device *dev,
	306	+ struct device_attribute *attr,
	307	+ char *buf)
	308	+{
	309	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	310	+ int ret;
	311	+
	312	+ ret = snprintf(buf, PAGE_SIZE, "ch1 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	313	+ cif_dev->scale_vdev[1].blc.pattern00,
	314	+ cif_dev->scale_vdev[1].blc.pattern01,
	315	+ cif_dev->scale_vdev[1].blc.pattern02,
	316	+ cif_dev->scale_vdev[1].blc.pattern03);
	317	+ return ret;
	318	+}
	319	+
	320	+static ssize_t rkcif_store_scale_ch1_blc(struct device *dev,
	321	+ struct device_attribute *attr,
	322	+ const char *buf, size_t len)
	323	+{
	324	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	325	+ int i = 0, index = 0;
	326	+ unsigned int val[4] = {0};
	327	+ unsigned int temp = 0;
	328	+ int ret = 0;
	329	+ int j = 0;
	330	+ char cha[2] = {0};
	331	+
	332	+ if (buf) {
	333	+ index = 0;
	334	+ for (i = 0; i < len; i++) {
	335	+ if (((buf[i] == ' ') \|\| (buf[i] == '\n')) && j) {
	336	+ index++;
	337	+ j = 0;
	338	+ if (index == 4)
	339	+ break;
	340	+ continue;
	341	+ } else {
	342	+ if (buf[i] < '0' \|\| buf[i] > '9')
	343	+ continue;
	344	+ cha[0] = buf[i];
	345	+ cha[1] = '\0';
	346	+ ret = kstrtoint(cha, 0, &temp);
	347	+ if (!ret) {
	348	+ if (j)
	349	+ val[index] *= 10;
	350	+ val[index] += temp;
	351	+ j++;
	352	+ }
	353	+ }
	354	+ }
	355	+ if (val[0] > 255 \|\| val[1] > 255 \|\| val[2] > 255 \|\| val[3] > 255)
	356	+ return -EINVAL;
	357	+
	358	+ cif_dev->scale_vdev[1].blc.pattern00 = val[0];
	359	+ cif_dev->scale_vdev[1].blc.pattern01 = val[1];
	360	+ cif_dev->scale_vdev[1].blc.pattern02 = val[2];
	361	+ cif_dev->scale_vdev[1].blc.pattern03 = val[3];
	362	+
	363	+ dev_info(cif_dev->dev,
	364	+ "set ch1 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	365	+ cif_dev->scale_vdev[1].blc.pattern00,
	366	+ cif_dev->scale_vdev[1].blc.pattern01,
	367	+ cif_dev->scale_vdev[1].blc.pattern02,
	368	+ cif_dev->scale_vdev[1].blc.pattern03);
	369	+ }
	370	+
	371	+ return len;
	372	+}
	373	+
	374	+static DEVICE_ATTR(scale_ch1_blc, S_IWUSR \| S_IRUSR,
	375	+ rkcif_show_scale_ch1_blc, rkcif_store_scale_ch1_blc);
	376	+
	377	+static ssize_t rkcif_show_scale_ch2_blc(struct device *dev,
	378	+ struct device_attribute *attr,
	379	+ char *buf)
	380	+{
	381	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	382	+ int ret;
	383	+
	384	+ ret = snprintf(buf, PAGE_SIZE, "ch2 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	385	+ cif_dev->scale_vdev[2].blc.pattern00,
	386	+ cif_dev->scale_vdev[2].blc.pattern01,
	387	+ cif_dev->scale_vdev[2].blc.pattern02,
	388	+ cif_dev->scale_vdev[2].blc.pattern03);
	389	+ return ret;
	390	+}
	391	+
	392	+static ssize_t rkcif_store_scale_ch2_blc(struct device *dev,
	393	+ struct device_attribute *attr,
	394	+ const char *buf, size_t len)
	395	+{
	396	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	397	+ int i = 0, index = 0;
	398	+ unsigned int val[4] = {0};
	399	+ unsigned int temp = 0;
	400	+ int ret = 0;
	401	+ int j = 0;
	402	+ char cha[2] = {0};
	403	+
	404	+ if (buf) {
	405	+ index = 0;
	406	+ for (i = 0; i < len; i++) {
	407	+ if (((buf[i] == ' ') \|\| (buf[i] == '\n')) && j) {
	408	+ index++;
	409	+ j = 0;
	410	+ if (index == 4)
	411	+ break;
	412	+ continue;
	413	+ } else {
	414	+ if (buf[i] < '0' \|\| buf[i] > '9')
	415	+ continue;
	416	+ cha[0] = buf[i];
	417	+ cha[1] = '\0';
	418	+ ret = kstrtoint(cha, 0, &temp);
	419	+ if (!ret) {
	420	+ if (j)
	421	+ val[index] *= 10;
	422	+ val[index] += temp;
	423	+ j++;
	424	+ }
	425	+ }
	426	+ }
	427	+ if (val[0] > 255 \|\| val[1] > 255 \|\| val[2] > 255 \|\| val[3] > 255)
	428	+ return -EINVAL;
	429	+
	430	+ cif_dev->scale_vdev[2].blc.pattern00 = val[0];
	431	+ cif_dev->scale_vdev[2].blc.pattern01 = val[1];
	432	+ cif_dev->scale_vdev[2].blc.pattern02 = val[2];
	433	+ cif_dev->scale_vdev[2].blc.pattern03 = val[3];
	434	+
	435	+ dev_info(cif_dev->dev,
	436	+ "set ch2 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	437	+ cif_dev->scale_vdev[2].blc.pattern00,
	438	+ cif_dev->scale_vdev[2].blc.pattern01,
	439	+ cif_dev->scale_vdev[2].blc.pattern02,
	440	+ cif_dev->scale_vdev[2].blc.pattern03);
	441	+ }
	442	+
	443	+ return len;
	444	+}
	445	+static DEVICE_ATTR(scale_ch2_blc, S_IWUSR \| S_IRUSR,
	446	+ rkcif_show_scale_ch2_blc, rkcif_store_scale_ch2_blc);
	447	+
	448	+static ssize_t rkcif_show_scale_ch3_blc(struct device *dev,
	449	+ struct device_attribute *attr,
	450	+ char *buf)
	451	+{
	452	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	453	+ int ret;
	454	+
	455	+ ret = snprintf(buf, PAGE_SIZE, "ch3 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	456	+ cif_dev->scale_vdev[3].blc.pattern00,
	457	+ cif_dev->scale_vdev[3].blc.pattern01,
	458	+ cif_dev->scale_vdev[3].blc.pattern02,
	459	+ cif_dev->scale_vdev[3].blc.pattern03);
	460	+ return ret;
	461	+}
	462	+
	463	+static ssize_t rkcif_store_scale_ch3_blc(struct device *dev,
	464	+ struct device_attribute *attr,
	465	+ const char *buf, size_t len)
	466	+{
	467	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	468	+ int i = 0, index = 0;
	469	+ unsigned int val[4] = {0};
	470	+ unsigned int temp = 0;
	471	+ int ret = 0;
	472	+ int j = 0;
	473	+ char cha[2] = {0};
	474	+
	475	+ if (buf) {
	476	+ index = 0;
	477	+ for (i = 0; i < len; i++) {
	478	+ if (((buf[i] == ' ') \|\| (buf[i] == '\n')) && j) {
	479	+ index++;
	480	+ j = 0;
	481	+ if (index == 4)
	482	+ break;
	483	+ continue;
	484	+ } else {
	485	+ if (buf[i] < '0' \|\| buf[i] > '9')
	486	+ continue;
	487	+ cha[0] = buf[i];
	488	+ cha[1] = '\0';
	489	+ ret = kstrtoint(cha, 0, &temp);
	490	+ if (!ret) {
	491	+ if (j)
	492	+ val[index] *= 10;
	493	+ val[index] += temp;
	494	+ j++;
	495	+ }
	496	+ }
	497	+ }
	498	+ if (val[0] > 255 \|\| val[1] > 255 \|\| val[2] > 255 \|\| val[3] > 255)
	499	+ return -EINVAL;
	500	+
	501	+ cif_dev->scale_vdev[3].blc.pattern00 = val[0];
	502	+ cif_dev->scale_vdev[3].blc.pattern01 = val[1];
	503	+ cif_dev->scale_vdev[3].blc.pattern02 = val[2];
	504	+ cif_dev->scale_vdev[3].blc.pattern03 = val[3];
	505	+
	506	+ dev_info(cif_dev->dev,
	507	+ "set ch3 pattern00: %d, pattern01: %d, pattern02: %d, pattern03: %d\n",
	508	+ cif_dev->scale_vdev[3].blc.pattern00,
	509	+ cif_dev->scale_vdev[3].blc.pattern01,
	510	+ cif_dev->scale_vdev[3].blc.pattern02,
	511	+ cif_dev->scale_vdev[3].blc.pattern03);
	512	+ }
	513	+
	514	+ return len;
	515	+}
	516	+
	517	+static DEVICE_ATTR(scale_ch3_blc, S_IWUSR \| S_IRUSR,
	518	+ rkcif_show_scale_ch3_blc, rkcif_store_scale_ch3_blc);
	519	+
	520	+static ssize_t rkcif_store_capture_fps(struct device *dev,
	521	+ struct device_attribute *attr,
	522	+ const char *buf, size_t len)
	523	+{
	524	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	525	+ struct rkcif_stream *stream = NULL;
	526	+ int i = 0, index = 0;
	527	+ unsigned int val[4] = {0};
	528	+ unsigned int temp = 0;
	529	+ int ret = 0;
	530	+ int j = 0;
	531	+ char cha[2] = {0};
	532	+ struct rkcif_fps fps = {0};
	533	+
	534	+ if (buf) {
	535	+ index = 0;
	536	+ for (i = 0; i < len; i++) {
	537	+ if (((buf[i] == ' ') \|\| (buf[i] == '\n')) && j) {
	538	+ index++;
	539	+ j = 0;
	540	+ if (index == 4)
	541	+ break;
	542	+ continue;
	543	+ } else {
	544	+ if (buf[i] < '0' \|\| buf[i] > '9')
	545	+ continue;
	546	+ cha[0] = buf[i];
	547	+ cha[1] = '\0';
	548	+ ret = kstrtoint(cha, 0, &temp);
	549	+ if (!ret) {
	550	+ if (j)
	551	+ val[index] *= 10;
	552	+ val[index] += temp;
	553	+ j++;
	554	+ }
	555	+ }
	556	+ }
	557	+
	558	+ for (i = 0; i < index; i++) {
	559	+ if ((val[i] - '0' != 0) && cif_dev->chip_id >= CHIP_RV1106_CIF) {
	560	+ stream = &cif_dev->stream[i];
	561	+ fps.fps = val[i];
	562	+ rkcif_set_fps(stream, &fps);
	563	+ }
	564	+ }
	565	+ dev_info(cif_dev->dev,
	566	+ "set fps id0: %d, id1: %d, id2: %d, id3: %d\n",
	567	+ val[0], val[1], val[2], val[3]);
	568	+ }
	569	+
	570	+ return len;
	571	+}
	572	+static DEVICE_ATTR(fps, 0200, NULL, rkcif_store_capture_fps);
	573	+
	574	+static ssize_t rkcif_show_rdbk_debug(struct device *dev,
	575	+ struct device_attribute *attr,
	576	+ char *buf)
	577	+{
	578	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	579	+ int ret;
	580	+
	581	+ ret = snprintf(buf, PAGE_SIZE, "%d\n",
	582	+ cif_dev->rdbk_debug);
	583	+ return ret;
	584	+}
	585	+
	586	+static ssize_t rkcif_store_rdbk_debug(struct device *dev,
	587	+ struct device_attribute *attr,
	588	+ const char *buf, size_t len)
	589	+{
	590	+ struct rkcif_device cif_dev = (struct rkcif_device )dev_get_drvdata(dev);
	591	+ int val = 0;
	592	+ int ret = 0;
	593	+
	594	+ ret = kstrtoint(buf, 0, &val);
	595	+ if (!ret)
	596	+ cif_dev->rdbk_debug = val;
	597	+ else
	598	+ dev_info(cif_dev->dev, "set rdbk debug failed\n");
	599	+ return len;
	600	+}
	601	+static DEVICE_ATTR(rdbk_debug, 0200, rkcif_show_rdbk_debug, rkcif_store_rdbk_debug);
225	602
226	603	static struct attribute *dev_attrs[] = {
227	604	&dev_attr_compact_test.attr,
228	605	&dev_attr_wait_line.attr,
229	606	&dev_attr_is_use_dummybuf.attr,
230	607	&dev_attr_is_high_align.attr,
	608	+ &dev_attr_scale_ch0_blc.attr,
	609	+ &dev_attr_scale_ch1_blc.attr,
	610	+ &dev_attr_scale_ch2_blc.attr,
	611	+ &dev_attr_scale_ch3_blc.attr,
	612	+ &dev_attr_fps.attr,
	613	+ &dev_attr_rdbk_debug.attr,
231	614	NULL,
232	615	};
233	616
..	..	@@ -244,15 +627,33 @@
244	627	{
245	628	void __iomem *base = dev->hw_dev->base_addr;
246	629	const struct cif_reg *reg = &dev->hw_dev->cif_regs[index];
	630	+ int csi_offset = 0;
247	631
	632	+ if (dev->inf_id == RKCIF_MIPI_LVDS &&
	633	+ index >= CIF_REG_MIPI_LVDS_ID0_CTRL0 &&
	634	+ index <= CIF_REG_MIPI_ON_PAD) {
	635	+ if (dev->chip_id == CHIP_RK3588_CIF) {
	636	+ csi_offset = dev->csi_host_idx * 0x100;
	637	+ } else if (dev->chip_id == CHIP_RV1106_CIF) {
	638	+ csi_offset = dev->csi_host_idx * 0x200;
	639	+ } else if (dev->chip_id == CHIP_RK3562_CIF) {
	640	+ if (dev->csi_host_idx < 3)
	641	+ csi_offset = dev->csi_host_idx * 0x200;
	642	+ else
	643	+ csi_offset = 0x500;
	644	+ }
	645	+ }
248	646	if (index < CIF_REG_INDEX_MAX) {
249		- if (index == CIF_REG_DVP_CTRL \|\|
250		- (index != CIF_REG_DVP_CTRL && reg->offset != 0x0))
251		- write_cif_reg(base, reg->offset, val);
252		- else
	647	+ if (index == CIF_REG_DVP_CTRL \|\| reg->offset != 0x0) {
	648	+ write_cif_reg(base, reg->offset + csi_offset, val);
	649	+ v4l2_dbg(4, rkcif_debug, &dev->v4l2_dev,
	650	+ "write reg[0x%x]:0x%x!!!\n",
	651	+ reg->offset + csi_offset, val);
	652	+ } else {
253	653	v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev,
254	654	"write reg[%d]:0x%x failed, maybe useless!!!\n",
255	655	index, val);
	656	+ }
256	657	}
257	658	}
258	659
..	..	@@ -262,13 +663,31 @@
262	663	unsigned int reg_val = 0x0;
263	664	void __iomem *base = dev->hw_dev->base_addr;
264	665	const struct cif_reg *reg = &dev->hw_dev->cif_regs[index];
	666	+ int csi_offset = 0;
	667	+
	668	+ if (dev->inf_id == RKCIF_MIPI_LVDS &&
	669	+ index >= CIF_REG_MIPI_LVDS_ID0_CTRL0 &&
	670	+ index <= CIF_REG_MIPI_ON_PAD) {
	671	+ if (dev->chip_id == CHIP_RK3588_CIF) {
	672	+ csi_offset = dev->csi_host_idx * 0x100;
	673	+ } else if (dev->chip_id == CHIP_RV1106_CIF) {
	674	+ csi_offset = dev->csi_host_idx * 0x200;
	675	+ } else if (dev->chip_id == CHIP_RK3562_CIF) {
	676	+ if (dev->csi_host_idx < 3)
	677	+ csi_offset = dev->csi_host_idx * 0x200;
	678	+ else
	679	+ csi_offset = 0x500;
	680	+ }
	681	+ }
265	682
266	683	if (index < CIF_REG_INDEX_MAX) {
267		- if (index == CIF_REG_DVP_CTRL \|\|
268		- (index != CIF_REG_DVP_CTRL && reg->offset != 0x0)) {
269		- reg_val = read_cif_reg(base, reg->offset);
	684	+ if (index == CIF_REG_DVP_CTRL \|\| reg->offset != 0x0) {
	685	+ reg_val = read_cif_reg(base, reg->offset + csi_offset);
270	686	reg_val \|= val;
271		- write_cif_reg(base, reg->offset, reg_val);
	687	+ write_cif_reg(base, reg->offset + csi_offset, reg_val);
	688	+ v4l2_dbg(4, rkcif_debug, &dev->v4l2_dev,
	689	+ "write or reg[0x%x]:0x%x!!!\n",
	690	+ reg->offset + csi_offset, val);
272	691	} else {
273	692	v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev,
274	693	"write reg[%d]:0x%x with OR failed, maybe useless!!!\n",
..	..	@@ -283,13 +702,31 @@
283	702	unsigned int reg_val = 0x0;
284	703	void __iomem *base = dev->hw_dev->base_addr;
285	704	const struct cif_reg *reg = &dev->hw_dev->cif_regs[index];
	705	+ int csi_offset = 0;
	706	+
	707	+ if (dev->inf_id == RKCIF_MIPI_LVDS &&
	708	+ index >= CIF_REG_MIPI_LVDS_ID0_CTRL0 &&
	709	+ index <= CIF_REG_MIPI_ON_PAD) {
	710	+ if (dev->chip_id == CHIP_RK3588_CIF) {
	711	+ csi_offset = dev->csi_host_idx * 0x100;
	712	+ } else if (dev->chip_id == CHIP_RV1106_CIF) {
	713	+ csi_offset = dev->csi_host_idx * 0x200;
	714	+ } else if (dev->chip_id == CHIP_RK3562_CIF) {
	715	+ if (dev->csi_host_idx < 3)
	716	+ csi_offset = dev->csi_host_idx * 0x200;
	717	+ else
	718	+ csi_offset = 0x500;
	719	+ }
	720	+ }
286	721
287	722	if (index < CIF_REG_INDEX_MAX) {
288		- if (index == CIF_REG_DVP_CTRL \|\|
289		- (index != CIF_REG_DVP_CTRL && reg->offset != 0x0)) {
290		- reg_val = read_cif_reg(base, reg->offset);
	723	+ if (index == CIF_REG_DVP_CTRL \|\| reg->offset != 0x0) {
	724	+ reg_val = read_cif_reg(base, reg->offset + csi_offset);
291	725	reg_val &= val;
292		- write_cif_reg(base, reg->offset, reg_val);
	726	+ write_cif_reg(base, reg->offset + csi_offset, reg_val);
	727	+ v4l2_dbg(4, rkcif_debug, &dev->v4l2_dev,
	728	+ "write and reg[0x%x]:0x%x!!!\n",
	729	+ reg->offset + csi_offset, val);
293	730	} else {
294	731	v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev,
295	732	"write reg[%d]:0x%x with OR failed, maybe useless!!!\n",
..	..	@@ -304,11 +741,26 @@
304	741	unsigned int val = 0x0;
305	742	void __iomem *base = dev->hw_dev->base_addr;
306	743	const struct cif_reg *reg = &dev->hw_dev->cif_regs[index];
	744	+ int csi_offset = 0;
	745	+
	746	+ if (dev->inf_id == RKCIF_MIPI_LVDS &&
	747	+ index >= CIF_REG_MIPI_LVDS_ID0_CTRL0 &&
	748	+ index <= CIF_REG_MIPI_ON_PAD) {
	749	+ if (dev->chip_id == CHIP_RK3588_CIF) {
	750	+ csi_offset = dev->csi_host_idx * 0x100;
	751	+ } else if (dev->chip_id == CHIP_RV1106_CIF) {
	752	+ csi_offset = dev->csi_host_idx * 0x200;
	753	+ } else if (dev->chip_id == CHIP_RK3562_CIF) {
	754	+ if (dev->csi_host_idx < 3)
	755	+ csi_offset = dev->csi_host_idx * 0x200;
	756	+ else
	757	+ csi_offset = 0x500;
	758	+ }
	759	+ }
307	760
308	761	if (index < CIF_REG_INDEX_MAX) {
309		- if (index == CIF_REG_DVP_CTRL \|\|
310		- (index != CIF_REG_DVP_CTRL && reg->offset != 0x0))
311		- val = read_cif_reg(base, reg->offset);
	762	+ if (index == CIF_REG_DVP_CTRL \|\| reg->offset != 0x0)
	763	+ val = read_cif_reg(base, reg->offset + csi_offset);
312	764	else
313	765	v4l2_dbg(1, rkcif_debug, &dev->v4l2_dev,
314	766	"read reg[%d] failed, maybe useless!!!\n",
..	..	@@ -375,6 +827,18 @@
375	827	else
376	828	val = CIF_SAMPLING_EDGE_SINGLE;
377	829	rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, val);
	830	+ } else if (dev->chip_id == CHIP_RK3588_CIF) {
	831	+ if (on)
	832	+ val = RK3588_CIF_PCLK_DUAL_EDGE;
	833	+ else
	834	+ val = RK3588_CIF_PCLK_SINGLE_EDGE;
	835	+ rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, val);
	836	+ } else if (dev->chip_id == CHIP_RV1106_CIF) {
	837	+ if (on)
	838	+ val = RV1106_CIF_PCLK_DUAL_EDGE;
	839	+ else
	840	+ val = RV1106_CIF_PCLK_SINGLE_EDGE;
	841	+ rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, val);
378	842	}
379	843	}
380	844
..	..	@@ -402,7 +866,42 @@
402	866	else
403	867	val = RK3568_CIF_PCLK_SAMPLING_EDGE_FALLING;
404	868	}
	869	+
	870	+ if (dev->chip_id == CHIP_RK3588_CIF) {
	871	+ if (edge == RKCIF_CLK_RISING)
	872	+ val = RK3588_CIF_PCLK_SAMPLING_EDGE_RISING;
	873	+ else
	874	+ val = RK3588_CIF_PCLK_SAMPLING_EDGE_FALLING;
	875	+ }
	876	+ if (dev->chip_id == CHIP_RV1106_CIF) {
	877	+ if (dev->dphy_hw) {
	878	+ if (edge == RKCIF_CLK_RISING)
	879	+ val = RV1106_CIF_PCLK_EDGE_RISING_M0;
	880	+ else
	881	+ val = RV1106_CIF_PCLK_EDGE_FALLING_M0;
	882	+ } else {
	883	+ if (edge == RKCIF_CLK_RISING)
	884	+ val = RV1106_CIF_PCLK_EDGE_RISING_M1;
	885	+ else
	886	+ val = RV1106_CIF_PCLK_EDGE_FALLING_M1;
	887	+ rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_VENC, val);
	888	+ return;
	889	+ }
	890	+ }
405	891	rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, val);
	892	+ }
	893	+}
	894	+
	895	+void rkcif_config_dvp_pin(struct rkcif_device *dev, bool on)
	896	+{
	897	+ if (dev->dphy_hw && dev->dphy_hw->ttl_mode_enable && dev->dphy_hw->ttl_mode_disable) {
	898	+ rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, RV1106_CIF_GRF_SEL_M0);
	899	+ if (on)
	900	+ dev->dphy_hw->ttl_mode_enable(dev->dphy_hw);
	901	+ else
	902	+ dev->dphy_hw->ttl_mode_disable(dev->dphy_hw);
	903	+ } else {
	904	+ rkcif_write_grf_reg(dev, CIF_REG_GRF_CIFIO_CON, RV1106_CIF_GRF_SEL_M1);
406	905	}
407	906	}
408	907
..	..	@@ -480,6 +979,119 @@
480	979	return 0;
481	980	}
482	981
	982	+static void rkcif_set_sensor_streamon_in_sync_mode(struct rkcif_device *cif_dev)
	983	+{
	984	+ struct rkcif_hw *hw = cif_dev->hw_dev;
	985	+ struct rkcif_device *dev = NULL;
	986	+ int i = 0, j = 0;
	987	+ int on = 1;
	988	+ int ret = 0;
	989	+ bool is_streaming = false;
	990	+ struct rkcif_multi_sync_config *sync_config;
	991	+
	992	+ if (!cif_dev->sync_cfg.type)
	993	+ return;
	994	+
	995	+ mutex_lock(&hw->dev_lock);
	996	+ sync_config = &hw->sync_config[cif_dev->sync_cfg.group];
	997	+ sync_config->streaming_cnt++;
	998	+ if (sync_config->streaming_cnt < sync_config->dev_cnt) {
	999	+ mutex_unlock(&hw->dev_lock);
	1000	+ return;
	1001	+ }
	1002	+
	1003	+ if (sync_config->mode == RKCIF_MASTER_MASTER \|\|
	1004	+ sync_config->mode == RKCIF_MASTER_SLAVE) {
	1005	+ for (i = 0; i < sync_config->slave.count; i++) {
	1006	+ dev = sync_config->slave.cif_dev[i];
	1007	+ is_streaming = sync_config->slave.is_streaming[i];
	1008	+ if (!is_streaming) {
	1009	+ if (dev->sditf_cnt == 1) {
	1010	+ ret = v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl,
	1011	+ RKMODULE_SET_QUICK_STREAM, &on);
	1012	+ if (ret)
	1013	+ dev_info(dev->dev,
	1014	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1015	+ } else {
	1016	+ for (j = 0; j < dev->sditf_cnt; j++)
	1017	+ ret \|= v4l2_subdev_call(dev->sditf[j]->sensor_sd,
	1018	+ core,
	1019	+ ioctl,
	1020	+ RKMODULE_SET_QUICK_STREAM,
	1021	+ &on);
	1022	+ if (ret)
	1023	+ dev_info(dev->dev,
	1024	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1025	+ }
	1026	+ sync_config->slave.is_streaming[i] = true;
	1027	+ }
	1028	+ v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev,
	1029	+ "quick stream in sync mode, slave_dev[%d]\n", i);
	1030	+
	1031	+ }
	1032	+ for (i = 0; i < sync_config->ext_master.count; i++) {
	1033	+ dev = sync_config->ext_master.cif_dev[i];
	1034	+ is_streaming = sync_config->ext_master.is_streaming[i];
	1035	+ if (!is_streaming) {
	1036	+ if (dev->sditf_cnt == 1) {
	1037	+ ret = v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl,
	1038	+ RKMODULE_SET_QUICK_STREAM, &on);
	1039	+ if (ret)
	1040	+ dev_info(dev->dev,
	1041	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1042	+ } else {
	1043	+ for (j = 0; j < dev->sditf_cnt; j++)
	1044	+ ret \|= v4l2_subdev_call(dev->sditf[j]->sensor_sd,
	1045	+ core,
	1046	+ ioctl,
	1047	+ RKMODULE_SET_QUICK_STREAM,
	1048	+ &on);
	1049	+ if (ret)
	1050	+ dev_info(dev->dev,
	1051	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1052	+ }
	1053	+ sync_config->ext_master.is_streaming[i] = true;
	1054	+ }
	1055	+ v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev,
	1056	+ "quick stream in sync mode, ext_master_dev[%d]\n", i);
	1057	+ }
	1058	+ for (i = 0; i < sync_config->int_master.count; i++) {
	1059	+ dev = sync_config->int_master.cif_dev[i];
	1060	+ is_streaming = sync_config->int_master.is_streaming[i];
	1061	+ if (!is_streaming) {
	1062	+ if (dev->sditf_cnt == 1) {
	1063	+ ret = v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl,
	1064	+ RKMODULE_SET_QUICK_STREAM, &on);
	1065	+ if (ret)
	1066	+ dev_info(hw->dev,
	1067	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1068	+ } else {
	1069	+ for (j = 0; j < dev->sditf_cnt; j++)
	1070	+ ret \|= v4l2_subdev_call(dev->sditf[j]->sensor_sd,
	1071	+ core,
	1072	+ ioctl,
	1073	+ RKMODULE_SET_QUICK_STREAM,
	1074	+ &on);
	1075	+ if (ret)
	1076	+ dev_info(dev->dev,
	1077	+ "set RKMODULE_SET_QUICK_STREAM failed\n");
	1078	+ }
	1079	+ sync_config->int_master.is_streaming[i] = true;
	1080	+ }
	1081	+ v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev,
	1082	+ "quick stream in sync mode, int_master_dev[%d]\n", i);
	1083	+ }
	1084	+ }
	1085	+ mutex_unlock(&hw->dev_lock);
	1086	+}
	1087	+
	1088	+static void rkcif_sensor_streaming_cb(void *data)
	1089	+{
	1090	+ struct v4l2_subdev subdevs = (struct v4l2_subdev )data;
	1091	+
	1092	+ v4l2_subdev_call(subdevs, video, s_stream, 1);
	1093	+}
	1094	+
483	1095	/*
484	1096	* stream-on order: isp_subdev, mipi dphy, sensor
485	1097	* stream-off order: mipi dphy, sensor, isp_subdev
..	..	@@ -487,11 +1099,10 @@
487	1099	static int rkcif_pipeline_set_stream(struct rkcif_pipeline *p, bool on)
488	1100	{
489	1101	struct rkcif_device *cif_dev = container_of(p, struct rkcif_device, pipe);
490		- struct rkcif_stream *stream = NULL;
491	1102	bool can_be_set = false;
492		- int i, ret;
	1103	+ int i, ret = 0;
493	1104
494		- if (cif_dev->hdr.mode == NO_HDR) {
	1105	+ if (cif_dev->hdr.hdr_mode == NO_HDR \|\| cif_dev->hdr.hdr_mode == HDR_COMPR) {
495	1106	if ((on && atomic_inc_return(&p->stream_cnt) > 1) \|\|
496	1107	(!on && atomic_dec_return(&p->stream_cnt) > 0))
497	1108	return 0;
..	..	@@ -505,34 +1116,72 @@
505	1116	cif_dev->irq_stats.dvp_overflow_cnt = 0;
506	1117	cif_dev->irq_stats.dvp_pix_err_cnt = 0;
507	1118	cif_dev->irq_stats.all_err_cnt = 0;
508		- cif_dev->irq_stats.all_frm_end_cnt = 0;
	1119	+ cif_dev->irq_stats.csi_size_err_cnt = 0;
	1120	+ cif_dev->irq_stats.dvp_size_err_cnt = 0;
	1121	+ cif_dev->irq_stats.dvp_bwidth_lack_cnt = 0;
	1122	+ cif_dev->irq_stats.frm_end_cnt[0] = 0;
	1123	+ cif_dev->irq_stats.frm_end_cnt[1] = 0;
	1124	+ cif_dev->irq_stats.frm_end_cnt[2] = 0;
	1125	+ cif_dev->irq_stats.frm_end_cnt[3] = 0;
	1126	+ cif_dev->irq_stats.not_active_buf_cnt[0] = 0;
	1127	+ cif_dev->irq_stats.not_active_buf_cnt[1] = 0;
	1128	+ cif_dev->irq_stats.not_active_buf_cnt[2] = 0;
	1129	+ cif_dev->irq_stats.not_active_buf_cnt[3] = 0;
	1130	+ cif_dev->irq_stats.trig_simult_cnt[0] = 0;
	1131	+ cif_dev->irq_stats.trig_simult_cnt[1] = 0;
	1132	+ cif_dev->irq_stats.trig_simult_cnt[2] = 0;
	1133	+ cif_dev->irq_stats.trig_simult_cnt[3] = 0;
509	1134	cif_dev->reset_watchdog_timer.is_triggered = false;
	1135	+ cif_dev->reset_watchdog_timer.is_running = false;
	1136	+ cif_dev->err_state_work.last_timestamp = 0;
510	1137	for (i = 0; i < cif_dev->num_channels; i++)
511	1138	cif_dev->reset_watchdog_timer.last_buf_wakeup_cnt[i] = 0;
	1139	+ cif_dev->reset_watchdog_timer.run_cnt = 0;
512	1140	}
513	1141
514	1142	/* phy -> sensor */
515	1143	for (i = 0; i < p->num_subdevs; i++) {
516		- ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
	1144	+ if (p->subdevs[i] == cif_dev->terminal_sensor.sd &&
	1145	+ on &&
	1146	+ cif_dev->is_thunderboot &&
	1147	+ !rk_tb_mcu_is_done()) {
	1148	+ cif_dev->tb_client.data = p->subdevs[i];
	1149	+ cif_dev->tb_client.cb = rkcif_sensor_streaming_cb;
	1150	+ rk_tb_client_register_cb(&cif_dev->tb_client);
	1151	+ } else {
	1152	+ ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
	1153	+ }
517	1154	if (on && ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
518	1155	goto err_stream_off;
519	1156	}
	1157	+
	1158	+ if (cif_dev->sditf_cnt > 1) {
	1159	+ for (i = 0; i < cif_dev->sditf_cnt; i++) {
	1160	+ ret = v4l2_subdev_call(cif_dev->sditf[i]->sensor_sd,
	1161	+ video,
	1162	+ s_stream,
	1163	+ on);
	1164	+ if (on && ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
	1165	+ goto err_stream_off;
	1166	+ }
	1167	+ }
	1168	+
520	1169	if (on)
521		- rkcif_monitor_reset_event(cif_dev->hw_dev);
	1170	+ rkcif_set_sensor_streamon_in_sync_mode(cif_dev);
522	1171	} else {
523	1172	if (!on && atomic_dec_return(&p->stream_cnt) > 0)
524	1173	return 0;
525	1174
526	1175	if (on) {
527	1176	atomic_inc(&p->stream_cnt);
528		- if (cif_dev->hdr.mode == HDR_X2) {
	1177	+ if (cif_dev->hdr.hdr_mode == HDR_X2) {
529	1178	if (atomic_read(&p->stream_cnt) == 1) {
530	1179	rockchip_set_system_status(SYS_STATUS_CIF0);
531	1180	can_be_set = false;
532	1181	} else if (atomic_read(&p->stream_cnt) == 2) {
533	1182	can_be_set = true;
534	1183	}
535		- } else if (cif_dev->hdr.mode == HDR_X3) {
	1184	+ } else if (cif_dev->hdr.hdr_mode == HDR_X3) {
536	1185	if (atomic_read(&p->stream_cnt) == 1) {
537	1186	rockchip_set_system_status(SYS_STATUS_CIF0);
538	1187	can_be_set = false;
..	..	@@ -550,28 +1199,58 @@
550	1199	cif_dev->irq_stats.dvp_line_err_cnt = 0;
551	1200	cif_dev->irq_stats.dvp_overflow_cnt = 0;
552	1201	cif_dev->irq_stats.dvp_pix_err_cnt = 0;
	1202	+ cif_dev->irq_stats.dvp_bwidth_lack_cnt = 0;
553	1203	cif_dev->irq_stats.all_err_cnt = 0;
554		- cif_dev->irq_stats.all_frm_end_cnt = 0;
	1204	+ cif_dev->irq_stats.csi_size_err_cnt = 0;
	1205	+ cif_dev->irq_stats.dvp_size_err_cnt = 0;
	1206	+ cif_dev->irq_stats.frm_end_cnt[0] = 0;
	1207	+ cif_dev->irq_stats.frm_end_cnt[1] = 0;
	1208	+ cif_dev->irq_stats.frm_end_cnt[2] = 0;
	1209	+ cif_dev->irq_stats.frm_end_cnt[3] = 0;
	1210	+ cif_dev->irq_stats.not_active_buf_cnt[0] = 0;
	1211	+ cif_dev->irq_stats.not_active_buf_cnt[1] = 0;
	1212	+ cif_dev->irq_stats.not_active_buf_cnt[2] = 0;
	1213	+ cif_dev->irq_stats.not_active_buf_cnt[3] = 0;
	1214	+ cif_dev->irq_stats.trig_simult_cnt[0] = 0;
	1215	+ cif_dev->irq_stats.trig_simult_cnt[1] = 0;
	1216	+ cif_dev->irq_stats.trig_simult_cnt[2] = 0;
	1217	+ cif_dev->irq_stats.trig_simult_cnt[3] = 0;
555	1218	cif_dev->is_start_hdr = true;
556	1219	cif_dev->reset_watchdog_timer.is_triggered = false;
	1220	+ cif_dev->reset_watchdog_timer.is_running = false;
557	1221	for (i = 0; i < cif_dev->num_channels; i++)
558	1222	cif_dev->reset_watchdog_timer.last_buf_wakeup_cnt[i] = 0;
	1223	+ cif_dev->reset_watchdog_timer.run_cnt = 0;
559	1224	}
560	1225
561	1226	/* phy -> sensor */
562	1227	for (i = 0; i < p->num_subdevs; i++) {
563		- ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
564		-
	1228	+ if (p->subdevs[i] == cif_dev->terminal_sensor.sd &&
	1229	+ on &&
	1230	+ cif_dev->is_thunderboot &&
	1231	+ !rk_tb_mcu_is_done()) {
	1232	+ cif_dev->tb_client.data = p->subdevs[i];
	1233	+ cif_dev->tb_client.cb = rkcif_sensor_streaming_cb;
	1234	+ rk_tb_client_register_cb(&cif_dev->tb_client);
	1235	+ } else {
	1236	+ ret = v4l2_subdev_call(p->subdevs[i], video, s_stream, on);
	1237	+ }
565	1238	if (on && ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
566	1239	goto err_stream_off;
567	1240	}
568		- if (on) {
569		- rkcif_monitor_reset_event(cif_dev->hw_dev);
570		- for (i = 0; i < atomic_read(&p->stream_cnt); i++) {
571		- stream = &cif_dev->stream[i];
572		- stream->streamon_timestamp = ktime_get_ns();
	1241	+ if (cif_dev->sditf_cnt > 1) {
	1242	+ for (i = 0; i < cif_dev->sditf_cnt; i++) {
	1243	+ ret = v4l2_subdev_call(cif_dev->sditf[i]->sensor_sd,
	1244	+ video,
	1245	+ s_stream,
	1246	+ on);
	1247	+ if (on && ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
	1248	+ goto err_stream_off;
573	1249	}
574	1250	}
	1251	+
	1252	+ if (on)
	1253	+ rkcif_set_sensor_streamon_in_sync_mode(cif_dev);
575	1254	}
576	1255	}
577	1256
..	..	@@ -587,98 +1266,131 @@
587	1266	return ret;
588	1267	}
589	1268
590		-/*************************** media controller *****************************/
591		-static int rkcif_create_links(struct rkcif_device *dev)
	1269	+static int rkcif_create_link(struct rkcif_device *dev,
	1270	+ struct rkcif_sensor_info *sensor,
	1271	+ u32 stream_num,
	1272	+ bool *mipi_lvds_linked)
592	1273	{
593		- int ret;
594		- u32 flags;
595		- unsigned int s, pad, id, stream_num = 0;
596		- bool mipi_lvds_linked = false;
	1274	+ struct rkcif_sensor_info linked_sensor;
	1275	+ struct media_entity source_entity, sink_entity;
	1276	+ int ret = 0;
	1277	+ u32 flags, pad, id;
	1278	+ int pad_offset = 0;
597	1279
598		- if (dev->chip_id < CHIP_RV1126_CIF) {
599		- if (dev->inf_id == RKCIF_MIPI_LVDS)
600		- stream_num = RKCIF_MAX_STREAM_MIPI;
601		- else
602		- stream_num = RKCIF_SINGLE_STREAM;
	1280	+ if (dev->chip_id >= CHIP_RK3588_CIF)
	1281	+ pad_offset = 4;
	1282	+
	1283	+ linked_sensor.lanes = sensor->lanes;
	1284	+
	1285	+ if (sensor->mbus.type == V4L2_MBUS_CCP2) {
	1286	+ linked_sensor.sd = &dev->lvds_subdev.sd;
	1287	+ dev->lvds_subdev.sensor_self.sd = &dev->lvds_subdev.sd;
	1288	+ dev->lvds_subdev.sensor_self.lanes = sensor->lanes;
	1289	+ memcpy(&dev->lvds_subdev.sensor_self.mbus, &sensor->mbus,
	1290	+ sizeof(struct v4l2_mbus_config));
603	1291	} else {
604		- stream_num = RKCIF_MAX_STREAM_MIPI;
	1292	+ linked_sensor.sd = sensor->sd;
605	1293	}
606	1294
607		- /* sensor links(or mipi-phy) */
608		- for (s = 0; s < dev->num_sensors; ++s) {
609		- struct rkcif_sensor_info *sensor = &dev->sensors[s];
610		- struct rkcif_sensor_info linked_sensor;
611		- struct media_entity source_entity, sink_entity;
	1295	+ memcpy(&linked_sensor.mbus, &sensor->mbus,
	1296	+ sizeof(struct v4l2_mbus_config));
612	1297
613		- linked_sensor.lanes = sensor->lanes;
	1298	+ for (pad = 0; pad < linked_sensor.sd->entity.num_pads; pad++) {
	1299	+ if (linked_sensor.sd->entity.pads[pad].flags &
	1300	+ MEDIA_PAD_FL_SOURCE) {
	1301	+ if (pad == linked_sensor.sd->entity.num_pads) {
	1302	+ dev_err(dev->dev,
	1303	+ "failed to find src pad for %s\n",
	1304	+ linked_sensor.sd->name);
614	1305
615		- if (sensor->mbus.type == V4L2_MBUS_CCP2) {
616		- linked_sensor.sd = &dev->lvds_subdev.sd;
617		- dev->lvds_subdev.sensor_self.sd = &dev->lvds_subdev.sd;
618		- dev->lvds_subdev.sensor_self.lanes = sensor->lanes;
619		- memcpy(&dev->lvds_subdev.sensor_self.mbus, &sensor->mbus,
620		- sizeof(struct v4l2_mbus_config));
621		- } else {
622		- linked_sensor.sd = sensor->sd;
623		- }
	1306	+ break;
	1307	+ }
624	1308
625		- memcpy(&linked_sensor.mbus, &sensor->mbus,
626		- sizeof(struct v4l2_mbus_config));
	1309	+ if ((linked_sensor.mbus.type == V4L2_MBUS_BT656 \|\|
	1310	+ linked_sensor.mbus.type == V4L2_MBUS_PARALLEL) &&
	1311	+ (dev->chip_id == CHIP_RK1808_CIF)) {
	1312	+ source_entity = &linked_sensor.sd->entity;
	1313	+ sink_entity = &dev->stream[RKCIF_STREAM_CIF].vnode.vdev.entity;
627	1314
628		- for (pad = 0; pad < linked_sensor.sd->entity.num_pads; pad++) {
629		- if (linked_sensor.sd->entity.pads[pad].flags &
630		- MEDIA_PAD_FL_SOURCE) {
631		- if (pad == linked_sensor.sd->entity.num_pads) {
632		- dev_err(dev->dev,
633		- "failed to find src pad for %s\n",
	1315	+ ret = media_create_pad_link(source_entity,
	1316	+ pad,
	1317	+ sink_entity,
	1318	+ 0,
	1319	+ MEDIA_LNK_FL_ENABLED);
	1320	+ if (ret)
	1321	+ dev_err(dev->dev, "failed to create link for %s\n",
634	1322	linked_sensor.sd->name);
	1323	+ break;
	1324	+ }
635	1325
	1326	+ if ((linked_sensor.mbus.type == V4L2_MBUS_BT656 \|\|
	1327	+ linked_sensor.mbus.type == V4L2_MBUS_PARALLEL) &&
	1328	+ (dev->chip_id >= CHIP_RV1126_CIF)) {
	1329	+ source_entity = &linked_sensor.sd->entity;
	1330	+ sink_entity = &dev->stream[pad].vnode.vdev.entity;
	1331	+
	1332	+ ret = media_create_pad_link(source_entity,
	1333	+ pad,
	1334	+ sink_entity,
	1335	+ 0,
	1336	+ MEDIA_LNK_FL_ENABLED);
	1337	+ if (ret)
	1338	+ dev_err(dev->dev, "failed to create link for %s pad[%d]\n",
	1339	+ linked_sensor.sd->name, pad);
	1340	+ continue;
	1341	+ }
	1342	+
	1343	+ for (id = 0; id < stream_num; id++) {
	1344	+ source_entity = &linked_sensor.sd->entity;
	1345	+ sink_entity = &dev->stream[id].vnode.vdev.entity;
	1346	+
	1347	+ if ((dev->chip_id < CHIP_RK1808_CIF) \|\|
	1348	+ (id == pad - 1 && !(*mipi_lvds_linked)))
	1349	+ flags = MEDIA_LNK_FL_ENABLED;
	1350	+ else
	1351	+ flags = 0;
	1352	+
	1353	+ ret = media_create_pad_link(source_entity,
	1354	+ pad,
	1355	+ sink_entity,
	1356	+ 0,
	1357	+ flags);
	1358	+ if (ret) {
	1359	+ dev_err(dev->dev,
	1360	+ "failed to create link for %s\n",
	1361	+ linked_sensor.sd->name);
636	1362	break;
637	1363	}
638		-
639		- if ((linked_sensor.mbus.type == V4L2_MBUS_BT656 \|\|
640		- linked_sensor.mbus.type == V4L2_MBUS_PARALLEL) &&
641		- (dev->chip_id == CHIP_RK1808_CIF)) {
642		- source_entity = &linked_sensor.sd->entity;
643		- sink_entity = &dev->stream[RKCIF_STREAM_CIF].vnode.vdev.entity;
644		-
645		- ret = media_create_pad_link(source_entity,
646		- pad,
647		- sink_entity,
648		- 0,
649		- MEDIA_LNK_FL_ENABLED);
650		- if (ret)
651		- dev_err(dev->dev, "failed to create link for %s\n",
652		- linked_sensor.sd->name);
653		- break;
654		- }
655		-
656		- if ((linked_sensor.mbus.type == V4L2_MBUS_BT656 \|\|
657		- linked_sensor.mbus.type == V4L2_MBUS_PARALLEL) &&
658		- (dev->chip_id >= CHIP_RV1126_CIF)) {
659		- source_entity = &linked_sensor.sd->entity;
660		- sink_entity = &dev->stream[pad].vnode.vdev.entity;
661		-
662		- ret = media_create_pad_link(source_entity,
663		- pad,
664		- sink_entity,
665		- 0,
666		- MEDIA_LNK_FL_ENABLED);
667		- if (ret)
668		- dev_err(dev->dev, "failed to create link for %s pad[%d]\n",
669		- linked_sensor.sd->name, pad);
670		- continue;
671		- }
672		-
	1364	+ }
	1365	+ if (dev->chip_id >= CHIP_RK3588_CIF) {
673	1366	for (id = 0; id < stream_num; id++) {
674	1367	source_entity = &linked_sensor.sd->entity;
675		- sink_entity = &dev->stream[id].vnode.vdev.entity;
	1368	+ sink_entity = &dev->scale_vdev[id].vnode.vdev.entity;
676	1369
677		- if ((dev->chip_id != CHIP_RK1808_CIF &&
678		- dev->chip_id != CHIP_RV1126_CIF &&
679		- dev->chip_id != CHIP_RV1126_CIF_LITE &&
680		- dev->chip_id != CHIP_RK3568_CIF) \|\|
681		- (id == pad - 1 && !mipi_lvds_linked))
	1370	+ if ((id + stream_num) == pad - 1 && !(*mipi_lvds_linked))
	1371	+ flags = MEDIA_LNK_FL_ENABLED;
	1372	+ else
	1373	+ flags = 0;
	1374	+
	1375	+ ret = media_create_pad_link(source_entity,
	1376	+ pad,
	1377	+ sink_entity,
	1378	+ 0,
	1379	+ flags);
	1380	+ if (ret) {
	1381	+ dev_err(dev->dev,
	1382	+ "failed to create link for %s\n",
	1383	+ linked_sensor.sd->name);
	1384	+ break;
	1385	+ }
	1386	+ }
	1387	+ }
	1388	+ if (dev->chip_id > CHIP_RK1808_CIF) {
	1389	+ for (id = 0; id < RKCIF_MAX_TOOLS_CH; id++) {
	1390	+ source_entity = &linked_sensor.sd->entity;
	1391	+ sink_entity = &dev->tools_vdev[id].vnode.vdev.entity;
	1392	+
	1393	+ if ((id + stream_num + pad_offset) == pad - 1 && !(*mipi_lvds_linked))
682	1394	flags = MEDIA_LNK_FL_ENABLED;
683	1395	else
684	1396	flags = 0;
..	..	@@ -697,24 +1409,49 @@
697	1409	}
698	1410	}
699	1411	}
	1412	+ }
700	1413
701		- if (sensor->mbus.type == V4L2_MBUS_CCP2) {
702		- source_entity = &sensor->sd->entity;
703		- sink_entity = &linked_sensor.sd->entity;
704		- ret = media_create_pad_link(source_entity,
705		- 1,
706		- sink_entity,
707		- 0,
708		- MEDIA_LNK_FL_ENABLED);
709		- if (ret)
710		- dev_err(dev->dev, "failed to create link between %s and %s\n",
711		- linked_sensor.sd->name,
712		- sensor->sd->name);
713		- }
	1414	+ if (sensor->mbus.type == V4L2_MBUS_CCP2) {
	1415	+ source_entity = &sensor->sd->entity;
	1416	+ sink_entity = &linked_sensor.sd->entity;
	1417	+ ret = media_create_pad_link(source_entity,
	1418	+ 1,
	1419	+ sink_entity,
	1420	+ 0,
	1421	+ MEDIA_LNK_FL_ENABLED);
	1422	+ if (ret)
	1423	+ dev_err(dev->dev, "failed to create link between %s and %s\n",
	1424	+ linked_sensor.sd->name,
	1425	+ sensor->sd->name);
	1426	+ }
714	1427
715		- if (linked_sensor.mbus.type != V4L2_MBUS_BT656 &&
716		- linked_sensor.mbus.type != V4L2_MBUS_PARALLEL)
717		- mipi_lvds_linked = true;
	1428	+ if (linked_sensor.mbus.type != V4L2_MBUS_BT656 &&
	1429	+ linked_sensor.mbus.type != V4L2_MBUS_PARALLEL)
	1430	+ *mipi_lvds_linked = true;
	1431	+ return ret;
	1432	+}
	1433	+
	1434	+/*************************** media controller *****************************/
	1435	+static int rkcif_create_links(struct rkcif_device *dev)
	1436	+{
	1437	+ u32 s = 0;
	1438	+ u32 stream_num = 0;
	1439	+ bool mipi_lvds_linked = false;
	1440	+
	1441	+ if (dev->chip_id < CHIP_RV1126_CIF) {
	1442	+ if (dev->inf_id == RKCIF_MIPI_LVDS)
	1443	+ stream_num = RKCIF_MAX_STREAM_MIPI;
	1444	+ else
	1445	+ stream_num = RKCIF_SINGLE_STREAM;
	1446	+ } else {
	1447	+ stream_num = RKCIF_MAX_STREAM_MIPI;
	1448	+ }
	1449	+
	1450	+ /* sensor links(or mipi-phy) */
	1451	+ for (s = 0; s < dev->num_sensors; ++s) {
	1452	+ struct rkcif_sensor_info *sensor = &dev->sensors[s];
	1453	+
	1454	+ rkcif_create_link(dev, sensor, stream_num, &mipi_lvds_linked);
718	1455	}
719	1456
720	1457	return 0;
..	..	@@ -728,11 +1465,20 @@
728	1465
729	1466	static int subdev_asyn_register_itf(struct rkcif_device *dev)
730	1467	{
731		- struct sditf_priv *sditf = dev->sditf;
	1468	+ struct sditf_priv *sditf = NULL;
732	1469	int ret = 0;
733	1470
734		- if (sditf)
	1471	+ ret = rkcif_update_sensor_info(&dev->stream[0]);
	1472	+ if (ret) {
	1473	+ v4l2_err(&dev->v4l2_dev,
	1474	+ "There is not terminal subdev, not synchronized with ISP\n");
	1475	+ return 0;
	1476	+ }
	1477	+ sditf = dev->sditf[0];
	1478	+ if (sditf && (!sditf->is_combine_mode) && (!dev->is_notifier_isp)) {
735	1479	ret = v4l2_async_register_subdev_sensor_common(&sditf->sd);
	1480	+ dev->is_notifier_isp = true;
	1481	+ }
736	1482
737	1483	return ret;
738	1484	}
..	..	@@ -756,8 +1502,9 @@
756	1502	if (sd->ops) {
757	1503	if (sd == sensor->sd) {
758	1504	ret = v4l2_subdev_call(sd,
759		- video,
760		- g_mbus_config,
	1505	+ pad,
	1506	+ get_mbus_config,
	1507	+ 0,
761	1508	&sensor->mbus);
762	1509	if (ret)
763	1510	v4l2_err(v4l2_dev,
..	..	@@ -767,7 +1514,8 @@
767	1514	}
768	1515
769	1516	if (sensor->mbus.type == V4L2_MBUS_CCP2 \|\|
770		- sensor->mbus.type == V4L2_MBUS_CSI2) {
	1517	+ sensor->mbus.type == V4L2_MBUS_CSI2_DPHY \|\|
	1518	+ sensor->mbus.type == V4L2_MBUS_CSI2_CPHY) {
771	1519
772	1520	switch (sensor->mbus.flags & V4L2_MBUS_CSI2_LANES) {
773	1521	case V4L2_MBUS_CSI2_1_LANE:
..	..	@@ -821,6 +1569,8 @@
821	1569	if (ret < 0)
822	1570	goto unregister_lvds;
823	1571
	1572	+ if (!completion_done(&dev->cmpl_ntf))
	1573	+ complete(&dev->cmpl_ntf);
824	1574	v4l2_info(&dev->v4l2_dev, "Async subdev notifier completed\n");
825	1575
826	1576	return ret;
..	..	@@ -874,13 +1624,15 @@
874	1624
875	1625	if (vep->bus_type != V4L2_MBUS_BT656 &&
876	1626	vep->bus_type != V4L2_MBUS_PARALLEL &&
877		- vep->bus_type != V4L2_MBUS_CSI2 &&
	1627	+ vep->bus_type != V4L2_MBUS_CSI2_DPHY &&
	1628	+ vep->bus_type != V4L2_MBUS_CSI2_CPHY &&
878	1629	vep->bus_type != V4L2_MBUS_CCP2)
879	1630	return 0;
880	1631
881	1632	rk_asd->mbus.type = vep->bus_type;
882	1633
883		- if (vep->bus_type == V4L2_MBUS_CSI2) {
	1634	+ if (vep->bus_type == V4L2_MBUS_CSI2_DPHY \|\|
	1635	+ vep->bus_type == V4L2_MBUS_CSI2_CPHY) {
884	1636	rk_asd->mbus.flags = vep->bus.mipi_csi2.flags;
885	1637	rk_asd->lanes = vep->bus.mipi_csi2.num_data_lanes;
886	1638	} else if (vep->bus_type == V4L2_MBUS_CCP2) {
..	..	@@ -903,6 +1655,8 @@
903	1655	struct device *dev = cif_dev->dev;
904	1656	int ret;
905	1657
	1658	+ v4l2_async_notifier_init(ntf);
	1659	+
906	1660	ret = v4l2_async_notifier_parse_fwnode_endpoints(
907	1661	dev, ntf, sizeof(struct rkcif_async_subdev), rkcif_fwnode_parse);
908	1662
..	..	@@ -912,17 +1666,25 @@
912	1666	return ret;
913	1667	}
914	1668
915		- if (!ntf->num_subdevs) {
916		- v4l2_warn(&cif_dev->v4l2_dev,
917		- "%s: no subdev be found!\n", __func__);
918		- return -ENODEV; /* no endpoint */
919		- }
920		-
921	1669	ntf->ops = &subdev_notifier_ops;
922	1670
923	1671	ret = v4l2_async_notifier_register(&cif_dev->v4l2_dev, ntf);
924	1672
925	1673	return ret;
	1674	+}
	1675	+
	1676	+static int notifier_isp_thread(void *data)
	1677	+{
	1678	+ struct rkcif_device *dev = data;
	1679	+ int ret = 0;
	1680	+
	1681	+ ret = wait_for_completion_timeout(&dev->cmpl_ntf, msecs_to_jiffies(5000));
	1682	+ if (ret) {
	1683	+ mutex_lock(&rkcif_dev_mutex);
	1684	+ subdev_asyn_register_itf(dev);
	1685	+ mutex_unlock(&rkcif_dev_mutex);
	1686	+ }
	1687	+ return 0;
926	1688	}
927	1689
928	1690	/*************************** platform deive *****************************/
..	..	@@ -945,12 +1707,35 @@
945	1707	stream_num = RKCIF_MAX_STREAM_MIPI;
946	1708	ret = rkcif_register_stream_vdevs(cif_dev, stream_num, true);
947	1709	}
948		- cif_dev->num_channels = stream_num;
	1710	+
949	1711	if (ret < 0) {
950	1712	dev_err(cif_dev->dev, "cif register stream[%d] failed!\n", stream_num);
951	1713	return -EINVAL;
952	1714	}
953	1715
	1716	+ if (cif_dev->chip_id == CHIP_RK3588_CIF \|\|
	1717	+ cif_dev->chip_id == CHIP_RV1106_CIF \|\|
	1718	+ cif_dev->chip_id == CHIP_RK3562_CIF) {
	1719	+ ret = rkcif_register_scale_vdevs(cif_dev, RKCIF_MAX_SCALE_CH, true);
	1720	+
	1721	+ if (ret < 0) {
	1722	+ dev_err(cif_dev->dev, "cif register scale_vdev[%d] failed!\n", stream_num);
	1723	+ goto err_unreg_stream_vdev;
	1724	+ }
	1725	+ }
	1726	+ if (cif_dev->chip_id > CHIP_RK1808_CIF) {
	1727	+ ret = rkcif_register_tools_vdevs(cif_dev, RKCIF_MAX_TOOLS_CH, true);
	1728	+
	1729	+ if (ret < 0) {
	1730	+ dev_err(cif_dev->dev, "cif register tools_vdev[%d] failed!\n", RKCIF_MAX_TOOLS_CH);
	1731	+ goto err_unreg_stream_vdev;
	1732	+ }
	1733	+ cif_dev->is_support_tools = true;
	1734	+ } else {
	1735	+ cif_dev->is_support_tools = false;
	1736	+ }
	1737	+ init_completion(&cif_dev->cmpl_ntf);
	1738	+ kthread_run(notifier_isp_thread, cif_dev, "notifier isp");
954	1739	ret = cif_subdev_notifier(cif_dev);
955	1740	if (ret < 0) {
956	1741	v4l2_err(&cif_dev->v4l2_dev,
..	..	@@ -961,17 +1746,27 @@
961	1746	return 0;
962	1747	err_unreg_stream_vdev:
963	1748	rkcif_unregister_stream_vdevs(cif_dev, stream_num);
	1749	+ if (cif_dev->chip_id == CHIP_RK3588_CIF \|\|
	1750	+ cif_dev->chip_id == CHIP_RV1106_CIF \|\|
	1751	+ cif_dev->chip_id == CHIP_RK3562_CIF)
	1752	+ rkcif_unregister_scale_vdevs(cif_dev, RKCIF_MAX_SCALE_CH);
	1753	+
	1754	+ if (cif_dev->chip_id > CHIP_RK1808_CIF)
	1755	+ rkcif_unregister_tools_vdevs(cif_dev, RKCIF_MAX_TOOLS_CH);
964	1756
965	1757	return ret;
966	1758	}
967	1759
968	1760	static irqreturn_t rkcif_irq_handler(int irq, struct rkcif_device *cif_dev)
969	1761	{
970		- if (cif_dev->workmode == RKCIF_WORKMODE_PINGPONG)
971		- rkcif_irq_pingpong(cif_dev);
972		- else
	1762	+ if (cif_dev->workmode == RKCIF_WORKMODE_PINGPONG) {
	1763	+ if (cif_dev->chip_id < CHIP_RK3588_CIF)
	1764	+ rkcif_irq_pingpong(cif_dev);
	1765	+ else
	1766	+ rkcif_irq_pingpong_v1(cif_dev);
	1767	+ } else {
973	1768	rkcif_irq_oneframe(cif_dev);
974		-
	1769	+ }
975	1770	return IRQ_HANDLED;
976	1771	}
977	1772
..	..	@@ -982,23 +1777,35 @@
982	1777	return IRQ_HANDLED;
983	1778	}
984	1779
985		-void rkcif_soft_reset(struct rkcif_device *cif_dev, bool is_rst_iommu)
	1780	+static void rkcif_attach_dphy_hw(struct rkcif_device *cif_dev)
986	1781	{
987		- struct rkcif_hw *hw_dev = cif_dev->hw_dev;
988		- bool can_reset = true;
989		- int i;
	1782	+ struct platform_device *plat_dev;
	1783	+ struct device *dev = cif_dev->dev;
	1784	+ struct device_node *np;
	1785	+ struct csi2_dphy_hw *dphy_hw;
990	1786
991		- if (!cif_dev->hw_dev)
	1787	+ np = of_parse_phandle(dev->of_node, "rockchip,dphy_hw", 0);
	1788	+ if (!np \|\| !of_device_is_available(np)) {
	1789	+ dev_err(dev,
	1790	+ "failed to get dphy hw node\n");
992	1791	return;
	1792	+ }
993	1793
994		- for (i = 0; i < hw_dev->dev_num; i++)
995		- if (atomic_read(&hw_dev->cif_dev[i]->pipe.stream_cnt) != 0) {
996		- can_reset = false;
997		- break;
998		- }
	1794	+ plat_dev = of_find_device_by_node(np);
	1795	+ of_node_put(np);
	1796	+ if (!plat_dev) {
	1797	+ dev_err(dev,
	1798	+ "failed to get dphy hw from node\n");
	1799	+ return;
	1800	+ }
999	1801
1000		- if (can_reset)
1001		- rkcif_hw_soft_reset(cif_dev->hw_dev, is_rst_iommu);
	1802	+ dphy_hw = platform_get_drvdata(plat_dev);
	1803	+ if (!dphy_hw) {
	1804	+ dev_err(dev,
	1805	+ "failed attach dphy hw\n");
	1806	+ return;
	1807	+ }
	1808	+ cif_dev->dphy_hw = dphy_hw;
1002	1809	}
1003	1810
1004	1811	int rkcif_attach_hw(struct rkcif_device *cif_dev)
..	..	@@ -1035,6 +1842,8 @@
1035	1842	cif_dev->hw_dev = hw;
1036	1843	cif_dev->chip_id = hw->chip_id;
1037	1844	dev_info(cif_dev->dev, "attach to cif hw node\n");
	1845	+ if (IS_ENABLED(CONFIG_CPU_RV1106))
	1846	+ rkcif_attach_dphy_hw(cif_dev);
1038	1847
1039	1848	return 0;
1040	1849	}
..	..	@@ -1065,8 +1874,26 @@
1065	1874	static void rkcif_init_reset_monitor(struct rkcif_device *dev)
1066	1875	{
1067	1876	struct rkcif_timer *timer = &dev->reset_watchdog_timer;
1068		- struct notifier_block *notifier = &dev->reset_notifier;
1069	1877
	1878	+#if defined(CONFIG_ROCKCHIP_CIF_USE_MONITOR)
	1879	+ timer->monitor_mode = CONFIG_ROCKCHIP_CIF_MONITOR_MODE;
	1880	+ timer->err_time_interval = CONFIG_ROCKCHIP_CIF_MONITOR_KEEP_TIME;
	1881	+ timer->frm_num_of_monitor_cycle = CONFIG_ROCKCHIP_CIF_MONITOR_CYCLE;
	1882	+ timer->triggered_frame_num = CONFIG_ROCKCHIP_CIF_MONITOR_START_FRAME;
	1883	+ timer->csi2_err_ref_cnt = CONFIG_ROCKCHIP_CIF_MONITOR_ERR_CNT;
	1884	+ #if defined(CONFIG_ROCKCHIP_CIF_RESET_BY_USER)
	1885	+ timer->is_ctrl_by_user = true;
	1886	+ #else
	1887	+ timer->is_ctrl_by_user = false;
	1888	+ #endif
	1889	+#else
	1890	+ timer->monitor_mode = RKCIF_MONITOR_MODE_IDLE;
	1891	+ timer->err_time_interval = 0xffffffff;
	1892	+ timer->frm_num_of_monitor_cycle = 0xffffffff;
	1893	+ timer->triggered_frame_num = 0xffffffff;
	1894	+ timer->csi2_err_ref_cnt = 0xffffffff;
	1895	+#endif
	1896	+ timer->is_running = false;
1070	1897	timer->is_triggered = false;
1071	1898	timer->is_buf_stop_update = false;
1072	1899	timer->csi2_err_cnt_even = 0;
..	..	@@ -1076,11 +1903,8 @@
1076	1903	timer->csi2_err_triggered_cnt = 0;
1077	1904	timer->csi2_first_err_timestamp = 0;
1078	1905
1079		- if (dev->inf_id == RKCIF_MIPI_LVDS) {
1080		- notifier->priority = 1;
1081		- notifier->notifier_call = rkcif_reset_notifier;
1082		- rkcif_csi2_register_notifier(notifier);
1083		- }
	1906	+ timer_setup(&timer->timer, rkcif_reset_watchdog_timer_handler, 0);
	1907	+
1084	1908	INIT_WORK(&dev->reset_work.work, rkcif_reset_work);
1085	1909	}
1086	1910
..	..	@@ -1090,22 +1914,37 @@
1090	1914	struct v4l2_device *v4l2_dev;
1091	1915	int ret;
1092	1916
1093		- cif_dev->hdr.mode = NO_HDR;
	1917	+ cif_dev->hdr.hdr_mode = NO_HDR;
1094	1918	cif_dev->inf_id = inf_id;
1095	1919
1096	1920	mutex_init(&cif_dev->stream_lock);
	1921	+ mutex_init(&cif_dev->scale_lock);
	1922	+ mutex_init(&cif_dev->tools_lock);
1097	1923	spin_lock_init(&cif_dev->hdr_lock);
	1924	+ spin_lock_init(&cif_dev->buffree_lock);
	1925	+ spin_lock_init(&cif_dev->reset_watchdog_timer.timer_lock);
1098	1926	spin_lock_init(&cif_dev->reset_watchdog_timer.csi2_err_lock);
1099	1927	atomic_set(&cif_dev->pipe.power_cnt, 0);
1100	1928	atomic_set(&cif_dev->pipe.stream_cnt, 0);
1101		- atomic_set(&cif_dev->fh_cnt, 0);
	1929	+ atomic_set(&cif_dev->power_cnt, 0);
1102	1930	cif_dev->is_start_hdr = false;
1103	1931	cif_dev->pipe.open = rkcif_pipeline_open;
1104	1932	cif_dev->pipe.close = rkcif_pipeline_close;
1105	1933	cif_dev->pipe.set_stream = rkcif_pipeline_set_stream;
1106	1934	cif_dev->isr_hdl = rkcif_irq_handler;
	1935	+ cif_dev->id_use_cnt = 0;
	1936	+ memset(&cif_dev->sync_cfg, 0, sizeof(cif_dev->sync_cfg));
	1937	+ cif_dev->sditf_cnt = 0;
	1938	+ cif_dev->is_notifier_isp = false;
	1939	+ cif_dev->sensor_linetime = 0;
	1940	+ cif_dev->early_line = 0;
	1941	+ cif_dev->is_thunderboot = false;
	1942	+ cif_dev->rdbk_debug = 0;
	1943	+ memset(&cif_dev->channels[0].capture_info, 0, sizeof(cif_dev->channels[0].capture_info));
1107	1944	if (cif_dev->chip_id == CHIP_RV1126_CIF_LITE)
1108	1945	cif_dev->isr_hdl = rkcif_irq_lite_handler;
	1946	+
	1947	+ INIT_WORK(&cif_dev->err_state_work.work, rkcif_err_print_work);
1109	1948
1110	1949	if (cif_dev->chip_id < CHIP_RV1126_CIF) {
1111	1950	if (cif_dev->inf_id == RKCIF_MIPI_LVDS) {
..	..	@@ -1124,6 +1963,20 @@
1124	1963	rkcif_stream_init(cif_dev, RKCIF_STREAM_MIPI_ID3);
1125	1964	}
1126	1965
	1966	+ if (cif_dev->chip_id == CHIP_RK3588_CIF \|\|
	1967	+ cif_dev->chip_id == CHIP_RV1106_CIF \|\|
	1968	+ cif_dev->chip_id == CHIP_RK3562_CIF) {
	1969	+ rkcif_init_scale_vdev(cif_dev, RKCIF_SCALE_CH0);
	1970	+ rkcif_init_scale_vdev(cif_dev, RKCIF_SCALE_CH1);
	1971	+ rkcif_init_scale_vdev(cif_dev, RKCIF_SCALE_CH2);
	1972	+ rkcif_init_scale_vdev(cif_dev, RKCIF_SCALE_CH3);
	1973	+ }
	1974	+
	1975	+ if (cif_dev->chip_id > CHIP_RK1808_CIF) {
	1976	+ rkcif_init_tools_vdev(cif_dev, RKCIF_TOOLS_CH0);
	1977	+ rkcif_init_tools_vdev(cif_dev, RKCIF_TOOLS_CH1);
	1978	+ rkcif_init_tools_vdev(cif_dev, RKCIF_TOOLS_CH2);
	1979	+ }
1127	1980	#if defined(CONFIG_ROCKCHIP_CIF_WORKMODE_PINGPONG)
1128	1981	cif_dev->workmode = RKCIF_WORKMODE_PINGPONG;
1129	1982	#elif defined(CONFIG_ROCKCHIP_CIF_WORKMODE_ONEFRAME)
..	..	@@ -1137,9 +1990,25 @@
1137	1990	#else
1138	1991	cif_dev->is_use_dummybuf = false;
1139	1992	#endif
	1993	+ if (cif_dev->chip_id == CHIP_RV1106_CIF)
	1994	+ cif_dev->is_use_dummybuf = false;
1140	1995
1141	1996	strlcpy(cif_dev->media_dev.model, dev_name(dev),
1142	1997	sizeof(cif_dev->media_dev.model));
	1998	+ cif_dev->csi_host_idx = of_alias_get_id(node, "rkcif_mipi_lvds");
	1999	+ if (cif_dev->csi_host_idx < 0 \|\| cif_dev->csi_host_idx > 5)
	2000	+ cif_dev->csi_host_idx = 0;
	2001	+ if (cif_dev->hw_dev->is_rk3588s2) {
	2002	+ if (cif_dev->csi_host_idx == 0)
	2003	+ cif_dev->csi_host_idx = 2;
	2004	+ else if (cif_dev->csi_host_idx == 2)
	2005	+ cif_dev->csi_host_idx = 4;
	2006	+ else if (cif_dev->csi_host_idx == 3)
	2007	+ cif_dev->csi_host_idx = 5;
	2008	+ v4l2_info(&cif_dev->v4l2_dev, "rk3588s2 attach to mipi%d\n",
	2009	+ cif_dev->csi_host_idx);
	2010	+ }
	2011	+ cif_dev->csi_host_idx_def = cif_dev->csi_host_idx;
1143	2012	cif_dev->media_dev.dev = dev;
1144	2013	v4l2_dev = &cif_dev->v4l2_dev;
1145	2014	v4l2_dev->mdev = &cif_dev->media_dev;
..	..	@@ -1204,6 +2073,8 @@
1204	2073	}
1205	2074	rkcif_unregister_stream_vdevs(cif_dev, stream_num);
1206	2075
	2076	+ if (cif_dev->chip_id == CHIP_RV1106_CIF)
	2077	+ rkcif_rockit_dev_deinit();
1207	2078	return 0;
1208	2079	}
1209	2080
..	..	@@ -1240,6 +2111,35 @@
1240	2111	dev_info(cif_dev->dev, "rkcif wait line %d\n", cif_dev->wait_line);
1241	2112	}
1242	2113
	2114	+static int rkcif_get_reserved_mem(struct rkcif_device *cif_dev)
	2115	+{
	2116	+ struct device *dev = cif_dev->dev;
	2117	+ struct device_node *np;
	2118	+ struct resource r;
	2119	+ int ret;
	2120	+
	2121	+ /* Get reserved memory region from Device-tree */
	2122	+ np = of_parse_phandle(dev->of_node, "memory-region-thunderboot", 0);
	2123	+ if (!np) {
	2124	+ dev_info(dev, "No memory-region-thunderboot specified\n");
	2125	+ return 0;
	2126	+ }
	2127	+
	2128	+ ret = of_address_to_resource(np, 0, &r);
	2129	+ if (ret) {
	2130	+ dev_err(dev, "No memory address assigned to the region\n");
	2131	+ return ret;
	2132	+ }
	2133	+
	2134	+ cif_dev->resmem_pa = r.start;
	2135	+ cif_dev->resmem_size = resource_size(&r);
	2136	+ cif_dev->is_thunderboot = true;
	2137	+ dev_info(dev, "Allocated reserved memory, paddr: 0x%x, size 0x%x\n",
	2138	+ (u32)cif_dev->resmem_pa,
	2139	+ (u32)cif_dev->resmem_size);
	2140	+ return ret;
	2141	+}
	2142	+
1243	2143	static int rkcif_plat_probe(struct platform_device *pdev)
1244	2144	{
1245	2145	const struct of_device_id *match;
..	..	@@ -1268,7 +2168,12 @@
1268	2168	dev_set_drvdata(dev, cif_dev);
1269	2169	cif_dev->dev = dev;
1270	2170
1271		- rkcif_attach_hw(cif_dev);
	2171	+ if (sysfs_create_group(&pdev->dev.kobj, &dev_attr_grp))
	2172	+ return -ENODEV;
	2173	+
	2174	+ ret = rkcif_attach_hw(cif_dev);
	2175	+ if (ret)
	2176	+ return ret;
1272	2177
1273	2178	rkcif_parse_dts(cif_dev);
1274	2179
..	..	@@ -1278,14 +2183,16 @@
1278	2183	return ret;
1279	2184	}
1280	2185
1281		- if (sysfs_create_group(&pdev->dev.kobj, &dev_attr_grp))
1282		- return -ENODEV;
	2186	+ ret = rkcif_get_reserved_mem(cif_dev);
	2187	+ if (ret)
	2188	+ return ret;
1283	2189
1284	2190	if (rkcif_proc_init(cif_dev))
1285	2191	dev_warn(dev, "dev:%s create proc failed\n", dev_name(dev));
1286	2192
1287	2193	rkcif_init_reset_monitor(cif_dev);
1288		- rkcif_soft_reset(cif_dev, false);
	2194	+ if (cif_dev->chip_id == CHIP_RV1106_CIF)
	2195	+ rkcif_rockit_dev_init(cif_dev);
1289	2196	pm_runtime_enable(&pdev->dev);
1290	2197
1291	2198	return 0;
..	..	@@ -1298,8 +2205,8 @@
1298	2205	rkcif_plat_uninit(cif_dev);
1299	2206	rkcif_detach_hw(cif_dev);
1300	2207	rkcif_proc_cleanup(cif_dev);
1301		- rkcif_csi2_unregister_notifier(&cif_dev->reset_notifier);
1302	2208	sysfs_remove_group(&pdev->dev.kobj, &dev_attr_grp);
	2209	+ del_timer_sync(&cif_dev->reset_watchdog_timer.timer);
1303	2210
1304	2211	return 0;
1305	2212	}
..	..	@@ -1309,7 +2216,7 @@
1309	2216	struct rkcif_device *cif_dev = dev_get_drvdata(dev);
1310	2217	int ret = 0;
1311	2218
1312		- if (atomic_dec_return(&cif_dev->hw_dev->power_cnt))
	2219	+ if (atomic_dec_return(&cif_dev->power_cnt))
1313	2220	return 0;
1314	2221
1315	2222	mutex_lock(&cif_dev->hw_dev->dev_lock);
..	..	@@ -1323,11 +2230,13 @@
1323	2230	struct rkcif_device *cif_dev = dev_get_drvdata(dev);
1324	2231	int ret = 0;
1325	2232
1326		- if (atomic_inc_return(&cif_dev->hw_dev->power_cnt) > 1)
	2233	+ if (atomic_inc_return(&cif_dev->power_cnt) > 1)
1327	2234	return 0;
	2235	+
1328	2236	mutex_lock(&cif_dev->hw_dev->dev_lock);
1329		- ret = pm_runtime_get_sync(cif_dev->hw_dev->dev);
	2237	+ ret = pm_runtime_resume_and_get(cif_dev->hw_dev->dev);
1330	2238	mutex_unlock(&cif_dev->hw_dev->dev_lock);
	2239	+ rkcif_do_soft_reset(cif_dev);
1331	2240	return (ret > 0) ? 0 : ret;
1332	2241	}
1333	2242
..	..	@@ -1360,14 +2269,16 @@
1360	2269	MODULE_PARM_DESC(clr_unready_dev, "clear unready devices");
1361	2270
1362	2271	#ifndef MODULE
1363		-static int __init rkcif_clr_unready_dev(void)
	2272	+int rkcif_clr_unready_dev(void)
1364	2273	{
1365	2274	__rkcif_clr_unready_dev();
1366	2275
1367	2276	return 0;
1368	2277	}
	2278	+#ifndef CONFIG_VIDEO_REVERSE_IMAGE
1369	2279	late_initcall(rkcif_clr_unready_dev);
1370	2280	#endif
	2281	+#endif
1371	2282
1372	2283	static const struct dev_pm_ops rkcif_plat_pm_ops = {
1373	2284	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,