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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * drxd_firm.c : DRXD firmware tables |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2006-2007 Micronas |
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| 5 | | - * |
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| 6 | | - * This program is free software; you can redistribute it and/or |
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| 7 | | - * modify it under the terms of the GNU General Public License |
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| 8 | | - * version 2 only, as published by the Free Software Foundation. |
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| 9 | | - * |
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| 10 | | - * |
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| 11 | | - * This program is distributed in the hope that it will be useful, |
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| 12 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 14 | | - * GNU General Public License for more details. |
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| 15 | | - * |
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| 16 | | - * To obtain the license, point your browser to |
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| 17 | | - * http://www.gnu.org/copyleft/gpl.html |
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| 18 | 6 | */ |
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| 19 | 7 | |
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| 20 | 8 | /* TODO: generate this file with a script from a settings file */ |
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| .. | .. |
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| 890 | 878 | /* End demod, combining RF in and diversity in, MPEG TS out */ |
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| 891 | 879 | WR16(B_FE_CF_REG_IMP_VAL__A, 0x0), /* disable impulse noise cruncher */ |
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| 892 | 880 | WR16(B_FE_AD_REG_INVEXT__A, 0x0), /* clock inversion (for sohard board) */ |
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| 893 | | - WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apperently no mb delay matching is best */ |
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| 881 | + WR16(B_CP_REG_BR_STR_DEL__A, 10), /* apparently no mb delay matching is best */ |
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| 894 | 882 | |
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| 895 | 883 | WR16(B_EQ_REG_RC_SEL_CAR__A, B_EQ_REG_RC_SEL_CAR_DIV_ON | /* org = 0x81 combining enabled */ |
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| 896 | 884 | B_EQ_REG_RC_SEL_CAR_MEAS_A_CC | |
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