| .. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | menuconfig MAILBOX |
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| 2 | 3 | bool "Mailbox Hardware Support" |
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| 3 | 4 | help |
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| .. | .. |
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| 41 | 42 | Management Engine, primarily for cpufreq. Say Y here if you want |
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| 42 | 43 | to use the PL320 IPCM support. |
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| 43 | 44 | |
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| 45 | +config ARMADA_37XX_RWTM_MBOX |
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| 46 | + tristate "Armada 37xx rWTM BIU Mailbox" |
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| 47 | + depends on ARCH_MVEBU || COMPILE_TEST |
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| 48 | + depends on OF |
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| 49 | + help |
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| 50 | + Mailbox implementation for communication with the the firmware |
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| 51 | + running on the Cortex-M3 rWTM secure processor of the Armada 37xx |
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| 52 | + SOC. Say Y here if you are building for such a device (for example |
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| 53 | + the Turris Mox router). |
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| 54 | + |
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| 44 | 55 | config OMAP2PLUS_MBOX |
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| 45 | 56 | tristate "OMAP2+ Mailbox framework support" |
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| 46 | | - depends on ARCH_OMAP2PLUS |
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| 57 | + depends on ARCH_OMAP2PLUS || ARCH_K3 |
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| 47 | 58 | help |
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| 48 | 59 | Mailbox implementation for OMAP family chips with hardware for |
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| 49 | 60 | interprocessor communication involving DSP, IVA1.0 and IVA2 in |
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| .. | .. |
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| 67 | 78 | between CPU cores and MCU processor on Some Rockchip SOCs. |
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| 68 | 79 | Please check it that the Soc you use have Mailbox hardware. |
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| 69 | 80 | Say Y here if you want to use the Rockchip Mailbox support. |
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| 81 | + |
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| 82 | +config ROCKCHIP_MBOX_DEMO |
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| 83 | + tristate "Rockchip MBOX Demo" |
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| 84 | + depends on ROCKCHIP_MBOX |
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| 85 | + help |
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| 86 | + Say y here to enable Rockchip MBOX Demo. |
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| 70 | 87 | |
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| 71 | 88 | config PCC |
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| 72 | 89 | bool "Platform Communication Channel Driver" |
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| .. | .. |
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| 105 | 122 | |
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| 106 | 123 | config TI_MESSAGE_MANAGER |
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| 107 | 124 | tristate "Texas Instruments Message Manager Driver" |
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| 108 | | - depends on ARCH_KEYSTONE |
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| 125 | + depends on ARCH_KEYSTONE || ARCH_K3 |
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| 109 | 126 | help |
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| 110 | 127 | An implementation of Message Manager slave driver for Keystone |
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| 111 | | - architecture SoCs from Texas Instruments. Message Manager is a |
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| 112 | | - communication entity found on few of Texas Instrument's keystone |
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| 113 | | - architecture SoCs. These may be used for communication between |
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| 128 | + and K3 architecture SoCs from Texas Instruments. Message Manager |
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| 129 | + is a communication entity found on few of Texas Instrument's keystone |
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| 130 | + and K3 architecture SoCs. These may be used for communication between |
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| 114 | 131 | multiple processors within the SoC. Select this driver if your |
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| 115 | 132 | platform has support for the hardware block. |
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| 116 | 133 | |
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| .. | .. |
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| 206 | 223 | critical time limitation, such as updating display configuration |
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| 207 | 224 | during the vblank. |
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| 208 | 225 | |
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| 209 | | -config RK3368_MBOX |
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| 210 | | - bool "RK3368 SoC Integrated Mailbox Support" |
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| 211 | | - depends on ARCH_ROCKCHIP |
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| 226 | +config ZYNQMP_IPI_MBOX |
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| 227 | + bool "Xilinx ZynqMP IPI Mailbox" |
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| 228 | + depends on ARCH_ZYNQMP && OF |
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| 212 | 229 | help |
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| 213 | | - This driver provides support for inter-processor communication |
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| 214 | | - between CPU cores and MCU processor on RK3368 SoC. |
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| 215 | | - Please check it that the Soc you use have Mailbox hardware. |
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| 216 | | - Say Y here if you want to use the Rockchip Mailbox support. |
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| 230 | + Say yes here to add support for Xilinx IPI mailbox driver. |
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| 231 | + This mailbox driver is used to send notification or short message |
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| 232 | + between processors with Xilinx ZynqMP IPI. It will place the |
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| 233 | + message to the IPI buffer and will access the IPI control |
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| 234 | + registers to kick the other processor or enquire status. |
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| 217 | 235 | |
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| 218 | | -config RK3368_SCPI_PROTOCOL |
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| 219 | | - bool "RK3368 SCPI Message Protocol Support" |
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| 220 | | - depends on RK3368_MBOX |
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| 236 | +config SUN6I_MSGBOX |
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| 237 | + tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" |
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| 238 | + depends on ARCH_SUNXI || COMPILE_TEST |
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| 239 | + default ARCH_SUNXI |
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| 221 | 240 | help |
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| 222 | | - System Control and Power Interface (SCPI) Message Protocol is |
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| 223 | | - defined for the purpose of communication between the Application |
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| 224 | | - Cores(AP) and the System Control Processor(SCP). The mailbox |
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| 225 | | - provides a mechanism for inter-processor communication between SCP |
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| 226 | | - and AP. |
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| 241 | + Mailbox implementation for the hardware message box present in |
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| 242 | + various Allwinner SoCs. This mailbox is used for communication |
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| 243 | + between the application CPUs and the power management coprocessor. |
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| 227 | 244 | |
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| 228 | | - This protocol library provides interface for all the client drivers |
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| 229 | | - making use of the features offered by the SCP. |
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| 245 | +config SPRD_MBOX |
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| 246 | + tristate "Spreadtrum Mailbox" |
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| 247 | + depends on ARCH_SPRD || COMPILE_TEST |
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| 248 | + help |
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| 249 | + Mailbox driver implementation for the Spreadtrum platform. It is used |
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| 250 | + to send message between application processors and MCU. Say Y here if |
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| 251 | + you want to build the Spreatrum mailbox controller driver. |
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| 252 | + |
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| 253 | +config QCOM_IPCC |
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| 254 | + bool "Qualcomm Technologies, Inc. IPCC driver" |
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| 255 | + depends on ARCH_QCOM || COMPILE_TEST |
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| 256 | + help |
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| 257 | + Qualcomm Technologies, Inc. Inter-Processor Communication Controller |
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| 258 | + (IPCC) driver for MSM devices. The driver provides mailbox support for |
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| 259 | + sending interrupts to the clients. On the other hand, the driver also |
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| 260 | + acts as an interrupt controller for receiving interrupts from clients. |
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| 261 | + Say Y here if you want to build this driver. |
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| 262 | + |
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| 230 | 263 | endif |
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