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hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/irqchip/irq-gic-v3-mbi.c
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@@ -84,6 +84,7 @@
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 static int mbi_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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 				   unsigned int nr_irqs, void *args)
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 {
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+	msi_alloc_info_t *info = args;
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 	struct mbi_range *mbi = NULL;
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 	int hwirq, offset, i, err = 0;
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@@ -103,6 +104,11 @@
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 		return -ENOSPC;
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 	hwirq = mbi->spi_start + offset;
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+
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+	err = iommu_dma_prepare_msi(info->desc,
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+				    mbi_phys_base + GICD_SETSPI_NSR);
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+	if (err)
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+		return err;
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 	for (i = 0; i < nr_irqs; i++) {
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 		err = mbi_irq_gic_domain_alloc(domain, virq + i, hwirq + i);
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@@ -142,7 +148,7 @@
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 	msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR);
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 	msg[0].data = data->parent_data->hwirq;
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-	iommu_dma_map_msi_msg(data->irq, msg);
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+	iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg);
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 }
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 #ifdef CONFIG_PCI_MSI
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@@ -202,7 +208,7 @@
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 	msg[1].address_lo = lower_32_bits(mbi_phys_base + GICD_CLRSPI_NSR);
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 	msg[1].data = data->parent_data->hwirq;
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-	iommu_dma_map_msi_msg(data->irq, &msg[1]);
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+	iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), &msg[1]);
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 }
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 /* Platform-MSI specific irqchip */