mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/iio/adc/ad7923.c
..
..
@@ -1,10 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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- * AD7904/AD7914/AD7923/AD7924 SPI ADC driver
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+ * AD7904/AD7914/AD7923/AD7924/AD7908/AD7918/AD7928 SPI ADC driver
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  *
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  * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
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  * Copyright 2012 CS Systemes d'Information
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- *
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- * Licensed under the GPL-2.
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  */
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8
 
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 #include <linux/device.h>
..
..
@@ -24,32 +23,27 @@
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 #include <linux/iio/trigger_consumer.h>
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 #include <linux/iio/triggered_buffer.h>
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25
 
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-#define AD7923_WRITE_CR		(1 << 11)	/* write control register */
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-#define AD7923_RANGE		(1 << 1)	/* range to REFin */
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-#define AD7923_CODING		(1 << 0)	/* coding is straight binary */
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+#define AD7923_WRITE_CR		BIT(11)		/* write control register */
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+#define AD7923_RANGE		BIT(1)		/* range to REFin */
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+#define AD7923_CODING		BIT(0)		/* coding is straight binary */
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 #define AD7923_PM_MODE_AS	(1)		/* auto shutdown */
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 #define AD7923_PM_MODE_FS	(2)		/* full shutdown */
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 #define AD7923_PM_MODE_OPS	(3)		/* normal operation */
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-#define AD7923_CHANNEL_0	(0)		/* analog input 0 */
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-#define AD7923_CHANNEL_1	(1)		/* analog input 1 */
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-#define AD7923_CHANNEL_2	(2)		/* analog input 2 */
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-#define AD7923_CHANNEL_3	(3)		/* analog input 3 */
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 #define AD7923_SEQUENCE_OFF	(0)		/* no sequence fonction */
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 #define AD7923_SEQUENCE_PROTECT	(2)		/* no interrupt write cycle */
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 #define AD7923_SEQUENCE_ON	(3)		/* continuous sequence */
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35
 
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-#define AD7923_MAX_CHAN		4
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-#define AD7923_PM_MODE_WRITE(mode)	(mode << 4)	/* write mode */
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-#define AD7923_CHANNEL_WRITE(channel)	(channel << 6)	/* write channel */
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-#define AD7923_SEQUENCE_WRITE(sequence)	(((sequence & 1) << 3) \
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-					+ ((sequence & 2) << 9))
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+#define AD7923_PM_MODE_WRITE(mode)	((mode) << 4)	 /* write mode */
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+#define AD7923_CHANNEL_WRITE(channel)	((channel) << 6) /* write channel */
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+#define AD7923_SEQUENCE_WRITE(sequence)	((((sequence) & 1) << 3) \
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+					+ (((sequence) & 2) << 9))
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 						/* write sequence fonction */
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 /* left shift for CR : bit 11 transmit in first */
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 #define AD7923_SHIFT_REGISTER	4
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44
 
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 /* val = value, dec = left shift, bits = number of bits of the mask */
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-#define EXTRACT(val, dec, bits)		((val >> dec) & ((1 << bits) - 1))
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+#define EXTRACT(val, dec, bits)		(((val) >> (dec)) & ((1 << (bits)) - 1))
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47
 
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 struct ad7923_state {
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49
 	struct spi_device		*spi;
..
..
@@ -65,8 +59,10 @@
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 	/*
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 	 * DMA (thus cache coherency maintenance) requires the
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 	 * transfer buffers to live in their own cache lines.
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+	 * Ensure rx_buf can be directly used in iio_push_to_buffers_with_timetamp
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+	 * Length = 8 channels + 4 extra for 8 byte timestamp
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 	 */
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-	__be16				rx_buf[4] ____cacheline_aligned;
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+	__be16				rx_buf[12] ____cacheline_aligned;
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 	__be16				tx_buf[4];
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 };
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68
 
..
..
@@ -79,6 +75,9 @@
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 	AD7904,
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 	AD7914,
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 	AD7924,
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+	AD7908,
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+	AD7918,
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+	AD7928
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 };
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 #define AD7923_V_CHAN(index, bits)					\
..
..
@@ -94,6 +93,7 @@
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 			.sign = 'u',					\
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 			.realbits = (bits),				\
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 			.storagebits = 16,				\
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+			.shift = 12 - (bits),				\
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 			.endianness = IIO_BE,				\
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 		},							\
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 	}
..
..
@@ -107,9 +107,25 @@
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 	IIO_CHAN_SOFT_TIMESTAMP(4), \
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 }
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+#define DECLARE_AD7908_CHANNELS(name, bits) \
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+const struct iio_chan_spec name ## _channels[] = { \
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+	AD7923_V_CHAN(0, bits), \
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+	AD7923_V_CHAN(1, bits), \
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+	AD7923_V_CHAN(2, bits), \
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+	AD7923_V_CHAN(3, bits), \
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+	AD7923_V_CHAN(4, bits), \
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+	AD7923_V_CHAN(5, bits), \
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+	AD7923_V_CHAN(6, bits), \
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+	AD7923_V_CHAN(7, bits), \
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+	IIO_CHAN_SOFT_TIMESTAMP(8), \
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+}
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+
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 static DECLARE_AD7923_CHANNELS(ad7904, 8);
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 static DECLARE_AD7923_CHANNELS(ad7914, 10);
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 static DECLARE_AD7923_CHANNELS(ad7924, 12);
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+static DECLARE_AD7908_CHANNELS(ad7908, 8);
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+static DECLARE_AD7908_CHANNELS(ad7918, 10);
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+static DECLARE_AD7908_CHANNELS(ad7928, 12);
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129
 
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 static const struct ad7923_chip_info ad7923_chip_info[] = {
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131
 	[AD7904] = {
..
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@@ -124,19 +140,35 @@
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 		.channels = ad7924_channels,
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 		.num_channels = ARRAY_SIZE(ad7924_channels),
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 	},
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+	[AD7908] = {
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+		.channels = ad7908_channels,
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+		.num_channels = ARRAY_SIZE(ad7908_channels),
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+	},
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+	[AD7918] = {
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+		.channels = ad7918_channels,
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+		.num_channels = ARRAY_SIZE(ad7918_channels),
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+	},
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+	[AD7928] = {
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+		.channels = ad7928_channels,
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+		.num_channels = ARRAY_SIZE(ad7928_channels),
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+	},
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 };
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156
 
129
-/**
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+/*
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  * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
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- **/
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+ */
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 static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
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-	const unsigned long *active_scan_mask)
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+				   const unsigned long *active_scan_mask)
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162
 {
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 	struct ad7923_state *st = iio_priv(indio_dev);
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 	int i, cmd, len;
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 	len = 0;
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-	for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
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+	/*
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+	 * For this driver the last channel is always the software timestamp so
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+	 * skip that one.
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+	 */
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+	for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) {
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 		cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
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 			AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
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 			st->settings;
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@@ -163,12 +195,12 @@
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 	return 0;
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 }
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197
 
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-/**
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+/*
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  * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
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  *
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  * Currently there is no option in this driver to disable the saving of
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  * timestamps within the ring.
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- **/
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+ */
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 static irqreturn_t ad7923_trigger_handler(int irq, void *p)
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 {
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206
 	struct iio_poll_func *pf = p;
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@@ -181,7 +213,7 @@
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 		goto done;
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214
 
183
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 	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
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-		iio_get_time_ns(indio_dev));
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+					   iio_get_time_ns(indio_dev));
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217
 
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 done:
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 	iio_trigger_notify_done(indio_dev->trig);
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..
@@ -189,7 +221,7 @@
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 	return IRQ_HANDLED;
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 }
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223
 
192
-static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
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+static int ad7923_scan_direct(struct ad7923_state *st, unsigned int ch)
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 {
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 	int ret, cmd;
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@@ -243,7 +275,8 @@
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 			return ret;
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276
 
245
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 		if (chan->address == EXTRACT(ret, 12, 4))
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-			*val = EXTRACT(ret, 0, 12);
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+			*val = EXTRACT(ret, chan->scan_type.shift,
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+				       chan->scan_type.realbits);
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 		else
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 			return -EIO;
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282
 
..
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@@ -272,7 +305,7 @@
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 	int ret;
273
306
 
274
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 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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-	if (indio_dev == NULL)
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+	if (!indio_dev)
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 		return -ENOMEM;
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 	st = iio_priv(indio_dev);
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@@ -286,8 +319,6 @@
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 	info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
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320
 
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 	indio_dev->name = spi_get_device_id(spi)->name;
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-	indio_dev->dev.parent = &spi->dev;
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-	indio_dev->dev.of_node = spi->dev.of_node;
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 	indio_dev->modes = INDIO_DIRECT_MODE;
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 	indio_dev->channels = info->channels;
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 	indio_dev->num_channels = info->num_channels;
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@@ -314,7 +345,7 @@
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 		return ret;
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346
 
316
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 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
317
-			&ad7923_trigger_handler, NULL);
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+					 &ad7923_trigger_handler, NULL);
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 	if (ret)
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 		goto error_disable_reg;
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351
 
..
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@@ -349,13 +380,29 @@
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 	{"ad7914", AD7914},
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 	{"ad7923", AD7924},
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 	{"ad7924", AD7924},
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+	{"ad7908", AD7908},
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+	{"ad7918", AD7918},
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+	{"ad7928", AD7928},
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 	{}
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 };
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 MODULE_DEVICE_TABLE(spi, ad7923_id);
355
389
 
390
+static const struct of_device_id ad7923_of_match[] = {
391
+	{ .compatible = "adi,ad7904", },
392
+	{ .compatible = "adi,ad7914", },
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+	{ .compatible = "adi,ad7923", },
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+	{ .compatible = "adi,ad7924", },
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+	{ .compatible = "adi,ad7908", },
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+	{ .compatible = "adi,ad7918", },
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+	{ .compatible = "adi,ad7928", },
398
+	{ },
399
+};
400
+MODULE_DEVICE_TABLE(of, ad7923_of_match);
401
+
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 static struct spi_driver ad7923_driver = {
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 	.driver = {
358
404
 		.name	= "ad7923",
405
+		.of_match_table = ad7923_of_match,
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 	},
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407
 	.probe		= ad7923_probe,
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 	.remove		= ad7923_remove,
..
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@@ -363,7 +410,7 @@
363
410
 };
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 module_spi_driver(ad7923_driver);
365
412
 
366
-MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
413
+MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
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414
 MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
368
-MODULE_DESCRIPTION("Analog Devices AD7904/AD7914/AD7923/AD7924 ADC");
415
+MODULE_DESCRIPTION("Analog Devices AD7923 and similar ADC");
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416
 MODULE_LICENSE("GPL v2");