~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,3 +1,4 @@
	1	+// SPDX-License-Identifier: GPL-2.0-or-later
1	2	/*
2	3	* nct6775 - Driver for the hardware monitoring functionality of
3	4	* Nuvoton NCT677x Super-I/O chips
..	..	@@ -15,25 +16,11 @@
15	16	* Shamelessly ripped from the w83627hf driver
16	17	* Copyright (C) 2003 Mark Studebaker
17	18	*
18		- * This program is free software; you can redistribute it and/or modify
19		- * it under the terms of the GNU General Public License as published by
20		- * the Free Software Foundation; either version 2 of the License, or
21		- * (at your option) any later version.
22		- *
23		- * This program is distributed in the hope that it will be useful,
24		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
25		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26		- * GNU General Public License for more details.
27		- *
28		- * You should have received a copy of the GNU General Public License
29		- * along with this program; if not, write to the Free Software
30		- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31		- *
32		- *
33	19	* Supports the following chips:
34	20	*
35	21	* Chip #vin #fan #pwm #temp chip IDs man ID
36	22	* nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
	23	+ * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
37	24	* nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
38	25	* nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
39	26	* nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
..	..	@@ -42,6 +29,10 @@
42	29	* nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
43	30	* nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
44	31	* nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
	32	+ * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
	33	+ * (0xd451)
	34	+ * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
	35	+ * (0xd429)
45	36	*
46	37	* #temp lists the number of monitored temperature sources (first value) plus
47	38	* the number of directly connectable temperature sensors (second value).
..	..	@@ -68,12 +59,13 @@
68	59
69	60	#define USE_ALTERNATE
70	61
71		-enum kinds { nct6106, nct6775, nct6776, nct6779, nct6791, nct6792, nct6793,
72		- nct6795, nct6796 };
	62	+enum kinds { nct6106, nct6116, nct6775, nct6776, nct6779, nct6791, nct6792,
	63	+ nct6793, nct6795, nct6796, nct6797, nct6798 };
73	64
74	65	/* used to set data->name = nct6775_device_names[data->sio_kind] */
75	66	static const char * const nct6775_device_names[] = {
76	67	"nct6106",
	68	+ "nct6116",
77	69	"nct6775",
78	70	"nct6776",
79	71	"nct6779",
..	..	@@ -82,10 +74,13 @@
82	74	"nct6793",
83	75	"nct6795",
84	76	"nct6796",
	77	+ "nct6797",
	78	+ "nct6798",
85	79	};
86	80
87	81	static const char * const nct6775_sio_names[] __initconst = {
88	82	"NCT6106D",
	83	+ "NCT6116D",
89	84	"NCT6775F",
90	85	"NCT6776D/F",
91	86	"NCT6779D",
..	..	@@ -94,6 +89,8 @@
94	89	"NCT6793D",
95	90	"NCT6795D",
96	91	"NCT6796D",
	92	+ "NCT6797D",
	93	+ "NCT6798D",
97	94	};
98	95
99	96	static unsigned short force_id;
..	..	@@ -121,6 +118,7 @@
121	118	#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
122	119
123	120	#define SIO_NCT6106_ID 0xc450
	121	+#define SIO_NCT6116_ID 0xd280
124	122	#define SIO_NCT6775_ID 0xb470
125	123	#define SIO_NCT6776_ID 0xc330
126	124	#define SIO_NCT6779_ID 0xc560
..	..	@@ -129,7 +127,9 @@
129	127	#define SIO_NCT6793_ID 0xd120
130	128	#define SIO_NCT6795_ID 0xd350
131	129	#define SIO_NCT6796_ID 0xd420
132		-#define SIO_ID_MASK 0xFFF0
	130	+#define SIO_NCT6797_ID 0xd450
	131	+#define SIO_NCT6798_ID 0xd428
	132	+#define SIO_ID_MASK 0xFFF8
133	133
134	134	enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
135	135
..	..	@@ -504,7 +504,7 @@
504	504	static const u16 NCT6779_REG_FAN[] = {
505	505	0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
506	506	static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
507		- 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
	507	+ 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
508	508
509	509	static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
510	510	0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
..	..	@@ -757,6 +757,44 @@
757	757	#define NCT6796_TEMP_MASK 0xbfff0ffe
758	758	#define NCT6796_VIRT_TEMP_MASK 0x80000c00
759	759
	760	+static const char *const nct6798_temp_label[] = {
	761	+ "",
	762	+ "SYSTIN",
	763	+ "CPUTIN",
	764	+ "AUXTIN0",
	765	+ "AUXTIN1",
	766	+ "AUXTIN2",
	767	+ "AUXTIN3",
	768	+ "AUXTIN4",
	769	+ "SMBUSMASTER 0",
	770	+ "SMBUSMASTER 1",
	771	+ "Virtual_TEMP",
	772	+ "Virtual_TEMP",
	773	+ "",
	774	+ "",
	775	+ "",
	776	+ "",
	777	+ "PECI Agent 0",
	778	+ "PECI Agent 1",
	779	+ "PCH_CHIP_CPU_MAX_TEMP",
	780	+ "PCH_CHIP_TEMP",
	781	+ "PCH_CPU_TEMP",
	782	+ "PCH_MCH_TEMP",
	783	+ "Agent0 Dimm0",
	784	+ "Agent0 Dimm1",
	785	+ "Agent1 Dimm0",
	786	+ "Agent1 Dimm1",
	787	+ "BYTE_TEMP0",
	788	+ "BYTE_TEMP1",
	789	+ "PECI Agent 0 Calibration", /* undocumented */
	790	+ "PECI Agent 1 Calibration", /* undocumented */
	791	+ "",
	792	+ "Virtual_TEMP"
	793	+};
	794	+
	795	+#define NCT6798_TEMP_MASK 0xbfff0ffe
	796	+#define NCT6798_VIRT_TEMP_MASK 0x80000c00
	797	+
760	798	/* NCT6102D/NCT6106D specific data */
761	799
762	800	#define NCT6106_REG_VBAT 0x318
..	..	@@ -791,10 +829,8 @@
791	829
792	830	static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
793	831	static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
794		-static const u16 NCT6106_REG_PWM[] = { 0x119, 0x129, 0x139 };
795	832	static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
796	833	static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
797		-static const u16 NCT6106_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130 };
798	834	static const u16 NCT6106_REG_TEMP_SOURCE[] = {
799	835	0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
800	836
..	..	@@ -860,6 +896,70 @@
860	896	static const u16 NCT6106_REG_TEMP_CRIT[32] = {
861	897	[11] = 0x204,
862	898	[12] = 0x205,
	899	+};
	900	+
	901	+/* NCT6112D/NCT6114D/NCT6116D specific data */
	902	+
	903	+static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
	904	+static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
	905	+static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
	906	+static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
	907	+
	908	+static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
	909	+static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
	910	+static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
	911	+static const u16 NCT6116_REG_TEMP_SOURCE[] = {
	912	+ 0xb0, 0xb1, 0xb2 };
	913	+
	914	+static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
	915	+ 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
	916	+static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
	917	+ 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
	918	+
	919	+static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
	920	+ 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
	921	+static const u16 NCT6116_REG_CRITICAL_PWM[] = {
	922	+ 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
	923	+
	924	+static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
	925	+ 0x114, 0x124, 0x134, 0x194, 0x1a4 };
	926	+static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
	927	+ 0x115, 0x125, 0x135, 0x195, 0x1a5 };
	928	+static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
	929	+ 0x116, 0x126, 0x136, 0x196, 0x1a6 };
	930	+static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
	931	+ 0x117, 0x127, 0x137, 0x197, 0x1a7 };
	932	+static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
	933	+ 0x118, 0x128, 0x138, 0x198, 0x1a8 };
	934	+static const u16 NCT6116_REG_TOLERANCE_H[] = {
	935	+ 0x112, 0x122, 0x132, 0x192, 0x1a2 };
	936	+
	937	+static const u16 NCT6116_REG_TARGET[] = {
	938	+ 0x111, 0x121, 0x131, 0x191, 0x1a1 };
	939	+
	940	+static const u16 NCT6116_REG_AUTO_TEMP[] = {
	941	+ 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
	942	+static const u16 NCT6116_REG_AUTO_PWM[] = {
	943	+ 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
	944	+
	945	+static const s8 NCT6116_ALARM_BITS[] = {
	946	+ 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
	947	+ 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */
	948	+ -1, /* unused */
	949	+ 32, 33, 34, 35, 36, /* fan1..fan5 */
	950	+ -1, -1, -1, /* unused */
	951	+ 16, 17, 18, -1, -1, -1, /* temp1..temp6 */
	952	+ 48, -1 /* intrusion0, intrusion1 */
	953	+};
	954	+
	955	+static const s8 NCT6116_BEEP_BITS[] = {
	956	+ 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
	957	+ 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
	958	+ 32, /* global beep enable */
	959	+ 24, 25, 26, 27, 28, /* fan1..fan5 */
	960	+ -1, -1, -1, /* unused */
	961	+ 16, 17, 18, -1, -1, -1, /* temp1..temp6 */
	962	+ 34, -1 /* intrusion0, intrusion1 */
863	963	};
864	964
865	965	static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
..	..	@@ -1260,6 +1360,11 @@
1260	1360	return reg == 0x20 \|\| reg == 0x22 \|\| reg == 0x24 \|\|
1261	1361	reg == 0xe0 \|\| reg == 0xe2 \|\| reg == 0xe4 \|\|
1262	1362	reg == 0x111 \|\| reg == 0x121 \|\| reg == 0x131;
	1363	+ case nct6116:
	1364	+ return reg == 0x20 \|\| reg == 0x22 \|\| reg == 0x24 \|\|
	1365	+ reg == 0x26 \|\| reg == 0x28 \|\| reg == 0xe0 \|\| reg == 0xe2 \|\|
	1366	+ reg == 0xe4 \|\| reg == 0xe6 \|\| reg == 0xe8 \|\| reg == 0x111 \|\|
	1367	+ reg == 0x121 \|\| reg == 0x131 \|\| reg == 0x191 \|\| reg == 0x1a1;
1263	1368	case nct6775:
1264	1369	return (((reg & 0xff00) == 0x100 \|\|
1265	1370	(reg & 0xff00) == 0x200) &&
..	..	@@ -1288,6 +1393,8 @@
1288	1393	case nct6793:
1289	1394	case nct6795:
1290	1395	case nct6796:
	1396	+ case nct6797:
	1397	+ case nct6798:
1291	1398	return reg == 0x150 \|\| reg == 0x153 \|\| reg == 0x155 \|\|
1292	1399	(reg & 0xfff0) == 0x4c0 \|\|
1293	1400	reg == 0x402 \|\|
..	..	@@ -1637,12 +1744,15 @@
1637	1744	data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1638	1745	break;
1639	1746	case nct6106:
	1747	+ case nct6116:
1640	1748	case nct6779:
1641	1749	case nct6791:
1642	1750	case nct6792:
1643	1751	case nct6793:
1644	1752	case nct6795:
1645	1753	case nct6796:
	1754	+ case nct6797:
	1755	+ case nct6798:
1646	1756	reg = nct6775_read_value(data,
1647	1757	data->REG_CRITICAL_PWM_ENABLE[i]);
1648	1758	if (reg & data->CRITICAL_PWM_ENABLE_MASK)
..	..	@@ -1937,7 +2047,7 @@
1937	2047	static umode_t nct6775_in_is_visible(struct kobject *kobj,
1938	2048	struct attribute *attr, int index)
1939	2049	{
1940		- struct device *dev = container_of(kobj, struct device, kobj);
	2050	+ struct device *dev = kobj_to_dev(kobj);
1941	2051	struct nct6775_data *data = dev_get_drvdata(dev);
1942	2052	int in = index / 5; /* voltage index */
1943	2053
..	..	@@ -2143,7 +2253,7 @@
2143	2253	static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2144	2254	struct attribute *attr, int index)
2145	2255	{
2146		- struct device *dev = container_of(kobj, struct device, kobj);
	2256	+ struct device *dev = kobj_to_dev(kobj);
2147	2257	struct nct6775_data *data = dev_get_drvdata(dev);
2148	2258	int fan = index / 6; /* fan index */
2149	2259	int nr = index % 6; /* attribute index */
..	..	@@ -2330,7 +2440,7 @@
2330	2440	static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2331	2441	struct attribute *attr, int index)
2332	2442	{
2333		- struct device *dev = container_of(kobj, struct device, kobj);
	2443	+ struct device *dev = kobj_to_dev(kobj);
2334	2444	struct nct6775_data *data = dev_get_drvdata(dev);
2335	2445	int temp = index / 10; /* temp index */
2336	2446	int nr = index % 10; /* attribute index */
..	..	@@ -2559,7 +2669,7 @@
2559	2669	case thermal_cruise:
2560	2670	nct6775_write_value(data, data->REG_TARGET[nr],
2561	2671	data->target_temp[nr]);
2562		- /* fall through */
	2672	+ fallthrough;
2563	2673	default:
2564	2674	reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2565	2675	reg = (reg & ~data->tolerance_mask) \|
..	..	@@ -2847,6 +2957,8 @@
2847	2957	* Fan speed tolerance is a tricky beast, since the associated register is
2848	2958	* a tick counter, but the value is reported and configured as rpm.
2849	2959	* Compute resulting low and high rpm values and report the difference.
	2960	+ * A fan speed tolerance only makes sense if a fan target speed has been
	2961	+ * configured, so only display values other than 0 if that is the case.
2850	2962	*/
2851	2963	static ssize_t
2852	2964	show_speed_tolerance(struct device dev, struct device_attribute attr,
..	..	@@ -2855,19 +2967,23 @@
2855	2967	struct nct6775_data *data = nct6775_update_device(dev);
2856	2968	struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2857	2969	int nr = sattr->index;
2858		- int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2859		- int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2860		- int tolerance;
	2970	+ int target = data->target_speed[nr];
	2971	+ int tolerance = 0;
2861	2972
2862		- if (low <= 0)
2863		- low = 1;
2864		- if (high > 0xffff)
2865		- high = 0xffff;
2866		- if (high < low)
2867		- high = low;
	2973	+ if (target) {
	2974	+ int low = target - data->target_speed_tolerance[nr];
	2975	+ int high = target + data->target_speed_tolerance[nr];
2868	2976
2869		- tolerance = (fan_from_reg16(low, data->fan_div[nr])
2870		- - fan_from_reg16(high, data->fan_div[nr])) / 2;
	2977	+ if (low <= 0)
	2978	+ low = 1;
	2979	+ if (high > 0xffff)
	2980	+ high = 0xffff;
	2981	+ if (high < low)
	2982	+ high = low;
	2983	+
	2984	+ tolerance = (fan_from_reg16(low, data->fan_div[nr])
	2985	+ - fan_from_reg16(high, data->fan_div[nr])) / 2;
	2986	+ }
2871	2987
2872	2988	return sprintf(buf, "%d\n", tolerance);
2873	2989	}
..	..	@@ -3065,12 +3181,15 @@
3065	3181	case nct6776:
3066	3182	break; /* always enabled, nothing to do */
3067	3183	case nct6106:
	3184	+ case nct6116:
3068	3185	case nct6779:
3069	3186	case nct6791:
3070	3187	case nct6792:
3071	3188	case nct6793:
3072	3189	case nct6795:
3073	3190	case nct6796:
	3191	+ case nct6797:
	3192	+ case nct6798:
3074	3193	nct6775_write_value(data, data->REG_CRITICAL_PWM[nr],
3075	3194	val);
3076	3195	reg = nct6775_read_value(data,
..	..	@@ -3138,7 +3257,7 @@
3138	3257	static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3139	3258	struct attribute *attr, int index)
3140	3259	{
3141		- struct device *dev = container_of(kobj, struct device, kobj);
	3260	+ struct device *dev = kobj_to_dev(kobj);
3142	3261	struct nct6775_data *data = dev_get_drvdata(dev);
3143	3262	int pwm = index / 36; /* pwm index */
3144	3263	int nr = index % 36; /* attribute index */
..	..	@@ -3340,7 +3459,7 @@
3340	3459	static umode_t nct6775_other_is_visible(struct kobject *kobj,
3341	3460	struct attribute *attr, int index)
3342	3461	{
3343		- struct device *dev = container_of(kobj, struct device, kobj);
	3462	+ struct device *dev = kobj_to_dev(kobj);
3344	3463	struct nct6775_data *data = dev_get_drvdata(dev);
3345	3464
3346	3465	if (index == 0 && !data->have_vid)
..	..	@@ -3430,7 +3549,6 @@
3430	3549	bool pwm3pin = false, pwm4pin = false, pwm5pin = false;
3431	3550	bool pwm6pin = false, pwm7pin = false;
3432	3551	int sioreg = data->sioreg;
3433		- int regval;
3434	3552
3435	3553	/* Store SIO_REG_ENABLE for use during resume */
3436	3554	superio_select(sioreg, NCT6775_LD_HWM);
..	..	@@ -3438,10 +3556,10 @@
3438	3556
3439	3557	/* fan4 and fan5 share some pins with the GPIO and serial flash */
3440	3558	if (data->kind == nct6775) {
3441		- regval = superio_inb(sioreg, 0x2c);
	3559	+ int cr2c = superio_inb(sioreg, 0x2c);
3442	3560
3443		- fan3pin = regval & BIT(6);
3444		- pwm3pin = regval & BIT(7);
	3561	+ fan3pin = cr2c & BIT(6);
	3562	+ pwm3pin = cr2c & BIT(7);
3445	3563
3446	3564	/* On NCT6775, fan4 shares pins with the fdc interface */
3447	3565	fan4pin = !(superio_inb(sioreg, 0x2A) & 0x80);
..	..	@@ -3486,85 +3604,148 @@
3486	3604	fan4min = fan4pin;
3487	3605	pwm3pin = fan3pin;
3488	3606	} else if (data->kind == nct6106) {
3489		- regval = superio_inb(sioreg, 0x24);
3490		- fan3pin = !(regval & 0x80);
3491		- pwm3pin = regval & 0x08;
	3607	+ int cr24 = superio_inb(sioreg, 0x24);
	3608	+
	3609	+ fan3pin = !(cr24 & 0x80);
	3610	+ pwm3pin = cr24 & 0x08;
	3611	+ } else if (data->kind == nct6116) {
	3612	+ int cr1a = superio_inb(sioreg, 0x1a);
	3613	+ int cr1b = superio_inb(sioreg, 0x1b);
	3614	+ int cr24 = superio_inb(sioreg, 0x24);
	3615	+ int cr2a = superio_inb(sioreg, 0x2a);
	3616	+ int cr2b = superio_inb(sioreg, 0x2b);
	3617	+ int cr2f = superio_inb(sioreg, 0x2f);
	3618	+
	3619	+ fan3pin = !(cr2b & 0x10);
	3620	+ fan4pin = (cr2b & 0x80) \|\| // pin 1(2)
	3621	+ (!(cr2f & 0x10) && (cr1a & 0x04)); // pin 65(66)
	3622	+ fan5pin = (cr2b & 0x80) \|\| // pin 126(127)
	3623	+ (!(cr1b & 0x03) && (cr2a & 0x02)); // pin 94(96)
	3624	+
	3625	+ pwm3pin = fan3pin && (cr24 & 0x08);
	3626	+ pwm4pin = fan4pin;
	3627	+ pwm5pin = fan5pin;
3492	3628	} else {
3493		- /* NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D, NCT6796D */
3494		- int regval_1b, regval_2a, regval_2f;
3495		- bool dsw_en;
	3629	+ /*
	3630	+ * NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D, NCT6796D,
	3631	+ * NCT6797D, NCT6798D
	3632	+ */
	3633	+ int cr1a = superio_inb(sioreg, 0x1a);
	3634	+ int cr1b = superio_inb(sioreg, 0x1b);
	3635	+ int cr1c = superio_inb(sioreg, 0x1c);
	3636	+ int cr1d = superio_inb(sioreg, 0x1d);
	3637	+ int cr2a = superio_inb(sioreg, 0x2a);
	3638	+ int cr2b = superio_inb(sioreg, 0x2b);
	3639	+ int cr2d = superio_inb(sioreg, 0x2d);
	3640	+ int cr2f = superio_inb(sioreg, 0x2f);
	3641	+ bool dsw_en = cr2f & BIT(3);
	3642	+ bool ddr4_en = cr2f & BIT(4);
	3643	+ int cre0;
	3644	+ int creb;
	3645	+ int cred;
3496	3646
3497		- regval = superio_inb(sioreg, 0x1c);
	3647	+ superio_select(sioreg, NCT6775_LD_12);
	3648	+ cre0 = superio_inb(sioreg, 0xe0);
	3649	+ creb = superio_inb(sioreg, 0xeb);
	3650	+ cred = superio_inb(sioreg, 0xed);
3498	3651
3499		- fan3pin = !(regval & BIT(5));
3500		- fan4pin = !(regval & BIT(6));
3501		- fan5pin = !(regval & BIT(7));
	3652	+ fan3pin = !(cr1c & BIT(5));
	3653	+ fan4pin = !(cr1c & BIT(6));
	3654	+ fan5pin = !(cr1c & BIT(7));
3502	3655
3503		- pwm3pin = !(regval & BIT(0));
3504		- pwm4pin = !(regval & BIT(1));
3505		- pwm5pin = !(regval & BIT(2));
	3656	+ pwm3pin = !(cr1c & BIT(0));
	3657	+ pwm4pin = !(cr1c & BIT(1));
	3658	+ pwm5pin = !(cr1c & BIT(2));
3506	3659
3507		- regval = superio_inb(sioreg, 0x2d);
3508	3660	switch (data->kind) {
3509	3661	case nct6791:
	3662	+ fan6pin = cr2d & BIT(1);
	3663	+ pwm6pin = cr2d & BIT(0);
	3664	+ break;
3510	3665	case nct6792:
3511		- fan6pin = regval & BIT(1);
3512		- pwm6pin = regval & BIT(0);
	3666	+ fan6pin = !dsw_en && (cr2d & BIT(1));
	3667	+ pwm6pin = !dsw_en && (cr2d & BIT(0));
3513	3668	break;
3514	3669	case nct6793:
	3670	+ fan5pin \|= cr1b & BIT(5);
	3671	+ fan5pin \|= creb & BIT(5);
	3672	+
	3673	+ fan6pin = !dsw_en && (cr2d & BIT(1));
	3674	+ fan6pin \|= creb & BIT(3);
	3675	+
	3676	+ pwm5pin \|= cr2d & BIT(7);
	3677	+ pwm5pin \|= (creb & BIT(4)) && !(cr2a & BIT(0));
	3678	+
	3679	+ pwm6pin = !dsw_en && (cr2d & BIT(0));
	3680	+ pwm6pin \|= creb & BIT(2);
	3681	+ break;
3515	3682	case nct6795:
	3683	+ fan5pin \|= cr1b & BIT(5);
	3684	+ fan5pin \|= creb & BIT(5);
	3685	+
	3686	+ fan6pin = (cr2a & BIT(4)) &&
	3687	+ (!dsw_en \|\| (cred & BIT(4)));
	3688	+ fan6pin \|= creb & BIT(3);
	3689	+
	3690	+ pwm5pin \|= cr2d & BIT(7);
	3691	+ pwm5pin \|= (creb & BIT(4)) && !(cr2a & BIT(0));
	3692	+
	3693	+ pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
	3694	+ pwm6pin \|= creb & BIT(2);
	3695	+ break;
3516	3696	case nct6796:
3517		- regval_1b = superio_inb(sioreg, 0x1b);
3518		- regval_2a = superio_inb(sioreg, 0x2a);
3519		- regval_2f = superio_inb(sioreg, 0x2f);
3520		- dsw_en = regval_2f & BIT(3);
	3697	+ fan5pin \|= cr1b & BIT(5);
	3698	+ fan5pin \|= (cre0 & BIT(3)) && !(cr1b & BIT(0));
	3699	+ fan5pin \|= creb & BIT(5);
3521	3700
3522		- if (!pwm5pin)
3523		- pwm5pin = regval & BIT(7);
	3701	+ fan6pin = (cr2a & BIT(4)) &&
	3702	+ (!dsw_en \|\| (cred & BIT(4)));
	3703	+ fan6pin \|= creb & BIT(3);
3524	3704
3525		- if (!fan5pin)
3526		- fan5pin = regval_1b & BIT(5);
	3705	+ fan7pin = !(cr2b & BIT(2));
3527	3706
3528		- superio_select(sioreg, NCT6775_LD_12);
3529		- if (data->kind != nct6796) {
3530		- int regval_eb = superio_inb(sioreg, 0xeb);
	3707	+ pwm5pin \|= cr2d & BIT(7);
	3708	+ pwm5pin \|= (cre0 & BIT(4)) && !(cr1b & BIT(0));
	3709	+ pwm5pin \|= (creb & BIT(4)) && !(cr2a & BIT(0));
3531	3710
3532		- if (!dsw_en) {
3533		- fan6pin = regval & BIT(1);
3534		- pwm6pin = regval & BIT(0);
3535		- }
	3711	+ pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
	3712	+ pwm6pin \|= creb & BIT(2);
3536	3713
3537		- if (!fan5pin)
3538		- fan5pin = regval_eb & BIT(5);
3539		- if (!pwm5pin)
3540		- pwm5pin = (regval_eb & BIT(4)) &&
3541		- !(regval_2a & BIT(0));
3542		- if (!fan6pin)
3543		- fan6pin = regval_eb & BIT(3);
3544		- if (!pwm6pin)
3545		- pwm6pin = regval_eb & BIT(2);
3546		- }
	3714	+ pwm7pin = !(cr1d & (BIT(2) \| BIT(3)));
	3715	+ break;
	3716	+ case nct6797:
	3717	+ fan5pin \|= !ddr4_en && (cr1b & BIT(5));
	3718	+ fan5pin \|= creb & BIT(5);
3547	3719
3548		- if (data->kind == nct6795 \|\| data->kind == nct6796) {
3549		- int regval_ed = superio_inb(sioreg, 0xed);
	3720	+ fan6pin = cr2a & BIT(4);
	3721	+ fan6pin \|= creb & BIT(3);
3550	3722
3551		- if (!fan6pin)
3552		- fan6pin = (regval_2a & BIT(4)) &&
3553		- (!dsw_en \|\|
3554		- (dsw_en && (regval_ed & BIT(4))));
3555		- if (!pwm6pin)
3556		- pwm6pin = (regval_2a & BIT(3)) &&
3557		- (regval_ed & BIT(2));
3558		- }
	3723	+ fan7pin = cr1a & BIT(1);
3559	3724
3560		- if (data->kind == nct6796) {
3561		- int regval_1d = superio_inb(sioreg, 0x1d);
3562		- int regval_2b = superio_inb(sioreg, 0x2b);
	3725	+ pwm5pin \|= (creb & BIT(4)) && !(cr2a & BIT(0));
	3726	+ pwm5pin \|= !ddr4_en && (cr2d & BIT(7));
3563	3727
3564		- fan7pin = !(regval_2b & BIT(2));
3565		- pwm7pin = !(regval_1d & (BIT(2) \| BIT(3)));
3566		- }
	3728	+ pwm6pin = creb & BIT(2);
	3729	+ pwm6pin \|= cred & BIT(2);
3567	3730
	3731	+ pwm7pin = cr1d & BIT(4);
	3732	+ break;
	3733	+ case nct6798:
	3734	+ fan6pin = !(cr1b & BIT(0)) && (cre0 & BIT(3));
	3735	+ fan6pin \|= cr2a & BIT(4);
	3736	+ fan6pin \|= creb & BIT(5);
	3737	+
	3738	+ fan7pin = cr1b & BIT(5);
	3739	+ fan7pin \|= !(cr2b & BIT(2));
	3740	+ fan7pin \|= creb & BIT(3);
	3741	+
	3742	+ pwm6pin = !(cr1b & BIT(0)) && (cre0 & BIT(4));
	3743	+ pwm6pin \|= !(cred & BIT(2)) && (cr2a & BIT(3));
	3744	+ pwm6pin \|= (creb & BIT(4)) && !(cr2a & BIT(0));
	3745	+
	3746	+ pwm7pin = !(cr1d & (BIT(2) \| BIT(3)));
	3747	+ pwm7pin \|= cr2d & BIT(7);
	3748	+ pwm7pin \|= creb & BIT(2);
3568	3749	break;
3569	3750	default: /* NCT6779D */
3570	3751	break;
..	..	@@ -3674,7 +3855,7 @@
3674	3855	data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3675	3856	data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3676	3857	data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3677		- data->REG_PWM[0] = NCT6106_REG_PWM;
	3858	+ data->REG_PWM[0] = NCT6116_REG_PWM;
3678	3859	data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3679	3860	data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3680	3861	data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
..	..	@@ -3693,7 +3874,7 @@
3693	3874	data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3694	3875	data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3695	3876	data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3696		- data->REG_TEMP_SEL = NCT6106_REG_TEMP_SEL;
	3877	+ data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3697	3878	data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3698	3879	data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3699	3880	data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
..	..	@@ -3702,6 +3883,79 @@
3702	3883	data->ALARM_BITS = NCT6106_ALARM_BITS;
3703	3884	data->REG_BEEP = NCT6106_REG_BEEP;
3704	3885	data->BEEP_BITS = NCT6106_BEEP_BITS;
	3886	+
	3887	+ reg_temp = NCT6106_REG_TEMP;
	3888	+ reg_temp_mon = NCT6106_REG_TEMP_MON;
	3889	+ num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
	3890	+ num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
	3891	+ reg_temp_over = NCT6106_REG_TEMP_OVER;
	3892	+ reg_temp_hyst = NCT6106_REG_TEMP_HYST;
	3893	+ reg_temp_config = NCT6106_REG_TEMP_CONFIG;
	3894	+ reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
	3895	+ reg_temp_crit = NCT6106_REG_TEMP_CRIT;
	3896	+ reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
	3897	+ reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
	3898	+
	3899	+ break;
	3900	+ case nct6116:
	3901	+ data->in_num = 9;
	3902	+ data->pwm_num = 3;
	3903	+ data->auto_pwm_num = 4;
	3904	+ data->temp_fixed_num = 3;
	3905	+ data->num_temp_alarms = 3;
	3906	+ data->num_temp_beeps = 3;
	3907	+
	3908	+ data->fan_from_reg = fan_from_reg13;
	3909	+ data->fan_from_reg_min = fan_from_reg13;
	3910	+
	3911	+ data->temp_label = nct6776_temp_label;
	3912	+ data->temp_mask = NCT6776_TEMP_MASK;
	3913	+ data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
	3914	+
	3915	+ data->REG_VBAT = NCT6106_REG_VBAT;
	3916	+ data->REG_DIODE = NCT6106_REG_DIODE;
	3917	+ data->DIODE_MASK = NCT6106_DIODE_MASK;
	3918	+ data->REG_VIN = NCT6106_REG_IN;
	3919	+ data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
	3920	+ data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
	3921	+ data->REG_TARGET = NCT6116_REG_TARGET;
	3922	+ data->REG_FAN = NCT6116_REG_FAN;
	3923	+ data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
	3924	+ data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
	3925	+ data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
	3926	+ data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
	3927	+ data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
	3928	+ data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
	3929	+ data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
	3930	+ data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
	3931	+ data->REG_PWM[0] = NCT6116_REG_PWM;
	3932	+ data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
	3933	+ data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
	3934	+ data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
	3935	+ data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
	3936	+ data->REG_PWM_READ = NCT6106_REG_PWM_READ;
	3937	+ data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
	3938	+ data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
	3939	+ data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
	3940	+ data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
	3941	+ data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
	3942	+ data->REG_CRITICAL_TEMP_TOLERANCE
	3943	+ = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
	3944	+ data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
	3945	+ data->CRITICAL_PWM_ENABLE_MASK
	3946	+ = NCT6106_CRITICAL_PWM_ENABLE_MASK;
	3947	+ data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
	3948	+ data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
	3949	+ data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
	3950	+ data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
	3951	+ data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
	3952	+ data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
	3953	+ data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
	3954	+ data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
	3955	+ data->REG_ALARM = NCT6106_REG_ALARM;
	3956	+ data->ALARM_BITS = NCT6116_ALARM_BITS;
	3957	+ data->REG_BEEP = NCT6106_REG_BEEP;
	3958	+ data->BEEP_BITS = NCT6116_BEEP_BITS;
3705	3959
3706	3960	reg_temp = NCT6106_REG_TEMP;
3707	3961	reg_temp_mon = NCT6106_REG_TEMP_MON;
..	..	@@ -3944,8 +4198,12 @@
3944	4198	case nct6793:
3945	4199	case nct6795:
3946	4200	case nct6796:
	4201	+ case nct6797:
	4202	+ case nct6798:
3947	4203	data->in_num = 15;
3948		- data->pwm_num = (data->kind == nct6796) ? 7 : 6;
	4204	+ data->pwm_num = (data->kind == nct6796 \|\|
	4205	+ data->kind == nct6797 \|\|
	4206	+ data->kind == nct6798) ? 7 : 6;
3949	4207	data->auto_pwm_num = 4;
3950	4208	data->has_fan_div = false;
3951	4209	data->temp_fixed_num = 6;
..	..	@@ -3979,6 +4237,7 @@
3979	4237	data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3980	4238	break;
3981	4239	case nct6795:
	4240	+ case nct6797:
3982	4241	data->temp_label = nct6795_temp_label;
3983	4242	data->temp_mask = NCT6795_TEMP_MASK;
3984	4243	data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
..	..	@@ -3987,6 +4246,11 @@
3987	4246	data->temp_label = nct6796_temp_label;
3988	4247	data->temp_mask = NCT6796_TEMP_MASK;
3989	4248	data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
	4249	+ break;
	4250	+ case nct6798:
	4251	+ data->temp_label = nct6798_temp_label;
	4252	+ data->temp_mask = NCT6798_TEMP_MASK;
	4253	+ data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
3990	4254	break;
3991	4255	}
3992	4256
..	..	@@ -4251,12 +4515,15 @@
4251	4515	data->have_vid = (cr2a & 0x60) == 0x40;
4252	4516	break;
4253	4517	case nct6106:
	4518	+ case nct6116:
4254	4519	case nct6779:
4255	4520	case nct6791:
4256	4521	case nct6792:
4257	4522	case nct6793:
4258	4523	case nct6795:
4259	4524	case nct6796:
	4525	+ case nct6797:
	4526	+ case nct6798:
4260	4527	break;
4261	4528	}
4262	4529
..	..	@@ -4278,6 +4545,7 @@
4278	4545	NCT6775_REG_CR_FAN_DEBOUNCE);
4279	4546	switch (data->kind) {
4280	4547	case nct6106:
	4548	+ case nct6116:
4281	4549	tmp \|= 0xe0;
4282	4550	break;
4283	4551	case nct6775:
..	..	@@ -4292,6 +4560,8 @@
4292	4560	case nct6793:
4293	4561	case nct6795:
4294	4562	case nct6796:
	4563	+ case nct6797:
	4564	+ case nct6798:
4295	4565	tmp \|= 0x7e;
4296	4566	break;
4297	4567	}
..	..	@@ -4391,7 +4661,8 @@
4391	4661
4392	4662	if (data->kind == nct6791 \|\| data->kind == nct6792 \|\|
4393	4663	data->kind == nct6793 \|\| data->kind == nct6795 \|\|
4394		- data->kind == nct6796)
	4664	+ data->kind == nct6796 \|\| data->kind == nct6797 \|\|
	4665	+ data->kind == nct6798)
4395	4666	nct6791_enable_io_mapping(sioreg);
4396	4667
4397	4668	superio_exit(sioreg);
..	..	@@ -4470,6 +4741,9 @@
4470	4741	case SIO_NCT6106_ID:
4471	4742	sio_data->kind = nct6106;
4472	4743	break;
	4744	+ case SIO_NCT6116_ID:
	4745	+ sio_data->kind = nct6116;
	4746	+ break;
4473	4747	case SIO_NCT6775_ID:
4474	4748	sio_data->kind = nct6775;
4475	4749	break;
..	..	@@ -4493,6 +4767,12 @@
4493	4767	break;
4494	4768	case SIO_NCT6796_ID:
4495	4769	sio_data->kind = nct6796;
	4770	+ break;
	4771	+ case SIO_NCT6797_ID:
	4772	+ sio_data->kind = nct6797;
	4773	+ break;
	4774	+ case SIO_NCT6798_ID:
	4775	+ sio_data->kind = nct6798;
4496	4776	break;
4497	4777	default:
4498	4778	if (val != 0xffff)
..	..	@@ -4521,7 +4801,8 @@
4521	4801
4522	4802	if (sio_data->kind == nct6791 \|\| sio_data->kind == nct6792 \|\|
4523	4803	sio_data->kind == nct6793 \|\| sio_data->kind == nct6795 \|\|
4524		- sio_data->kind == nct6796)
	4804	+ sio_data->kind == nct6796 \|\| sio_data->kind == nct6797 \|\|
	4805	+ sio_data->kind == nct6798)
4525	4806	nct6791_enable_io_mapping(sioaddr);
4526	4807
4527	4808	superio_exit(sioaddr);