| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * INA3221 Triple Current/Voltage Monitor |
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| 3 | 4 | * |
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| 4 | | - * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ |
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| 5 | + * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ |
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| 5 | 6 | * Andrew F. Davis <afd@ti.com> |
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| 6 | | - * |
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| 7 | | - * This program is free software; you can redistribute it and/or modify |
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| 8 | | - * it under the terms of the GNU General Public License version 2 as |
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| 9 | | - * published by the Free Software Foundation. |
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| 10 | | - * |
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| 11 | | - * This program is distributed in the hope that it will be useful, but |
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| 12 | | - * WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | | - * General Public License for more details. |
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| 15 | 7 | */ |
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| 16 | 8 | |
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| 17 | 9 | #include <linux/hwmon.h> |
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| 18 | 10 | #include <linux/hwmon-sysfs.h> |
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| 19 | 11 | #include <linux/i2c.h> |
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| 20 | 12 | #include <linux/module.h> |
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| 13 | +#include <linux/mutex.h> |
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| 21 | 14 | #include <linux/of.h> |
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| 15 | +#include <linux/pm_runtime.h> |
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| 22 | 16 | #include <linux/regmap.h> |
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| 17 | +#include <linux/util_macros.h> |
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| 23 | 18 | |
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| 24 | 19 | #define INA3221_DRIVER_NAME "ina3221" |
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| 25 | 20 | |
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| .. | .. |
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| 36 | 31 | #define INA3221_WARN2 0x0a |
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| 37 | 32 | #define INA3221_CRIT3 0x0b |
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| 38 | 33 | #define INA3221_WARN3 0x0c |
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| 34 | +#define INA3221_SHUNT_SUM 0x0d |
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| 35 | +#define INA3221_CRIT_SUM 0x0e |
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| 39 | 36 | #define INA3221_MASK_ENABLE 0x0f |
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| 40 | 37 | |
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| 38 | +#define INA3221_CONFIG_MODE_MASK GENMASK(2, 0) |
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| 39 | +#define INA3221_CONFIG_MODE_POWERDOWN 0 |
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| 41 | 40 | #define INA3221_CONFIG_MODE_SHUNT BIT(0) |
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| 42 | 41 | #define INA3221_CONFIG_MODE_BUS BIT(1) |
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| 43 | 42 | #define INA3221_CONFIG_MODE_CONTINUOUS BIT(2) |
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| 43 | +#define INA3221_CONFIG_VSH_CT_SHIFT 3 |
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| 44 | +#define INA3221_CONFIG_VSH_CT_MASK GENMASK(5, 3) |
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| 45 | +#define INA3221_CONFIG_VSH_CT(x) (((x) & GENMASK(5, 3)) >> 3) |
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| 46 | +#define INA3221_CONFIG_VBUS_CT_SHIFT 6 |
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| 47 | +#define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6) |
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| 48 | +#define INA3221_CONFIG_VBUS_CT(x) (((x) & GENMASK(8, 6)) >> 6) |
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| 49 | +#define INA3221_CONFIG_AVG_SHIFT 9 |
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| 50 | +#define INA3221_CONFIG_AVG_MASK GENMASK(11, 9) |
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| 51 | +#define INA3221_CONFIG_AVG(x) (((x) & GENMASK(11, 9)) >> 9) |
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| 52 | +#define INA3221_CONFIG_CHs_EN_MASK GENMASK(14, 12) |
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| 53 | +#define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) |
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| 44 | 54 | |
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| 55 | +#define INA3221_MASK_ENABLE_SCC_MASK GENMASK(14, 12) |
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| 56 | + |
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| 57 | +#define INA3221_CONFIG_DEFAULT 0x7127 |
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| 45 | 58 | #define INA3221_RSHUNT_DEFAULT 10000 |
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| 46 | 59 | |
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| 47 | 60 | enum ina3221_fields { |
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| 48 | 61 | /* Configuration */ |
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| 49 | 62 | F_RST, |
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| 50 | 63 | |
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| 51 | | - /* Alert Flags */ |
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| 64 | + /* Status Flags */ |
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| 65 | + F_CVRF, |
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| 66 | + |
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| 67 | + /* Warning Flags */ |
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| 52 | 68 | F_WF3, F_WF2, F_WF1, |
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| 53 | | - F_CF3, F_CF2, F_CF1, |
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| 69 | + |
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| 70 | + /* Alert Flags: SF is the summation-alert flag */ |
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| 71 | + F_SF, F_CF3, F_CF2, F_CF1, |
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| 54 | 72 | |
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| 55 | 73 | /* sentinel */ |
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| 56 | 74 | F_MAX_FIELDS |
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| .. | .. |
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| 59 | 77 | static const struct reg_field ina3221_reg_fields[] = { |
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| 60 | 78 | [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15), |
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| 61 | 79 | |
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| 80 | + [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0), |
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| 62 | 81 | [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3), |
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| 63 | 82 | [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4), |
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| 64 | 83 | [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5), |
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| 84 | + [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6), |
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| 65 | 85 | [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7), |
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| 66 | 86 | [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8), |
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| 67 | 87 | [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9), |
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| .. | .. |
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| 74 | 94 | INA3221_NUM_CHANNELS |
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| 75 | 95 | }; |
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| 76 | 96 | |
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| 77 | | -static const unsigned int register_channel[] = { |
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| 78 | | - [INA3221_SHUNT1] = INA3221_CHANNEL1, |
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| 79 | | - [INA3221_SHUNT2] = INA3221_CHANNEL2, |
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| 80 | | - [INA3221_SHUNT3] = INA3221_CHANNEL3, |
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| 81 | | - [INA3221_CRIT1] = INA3221_CHANNEL1, |
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| 82 | | - [INA3221_CRIT2] = INA3221_CHANNEL2, |
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| 83 | | - [INA3221_CRIT3] = INA3221_CHANNEL3, |
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| 84 | | - [INA3221_WARN1] = INA3221_CHANNEL1, |
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| 85 | | - [INA3221_WARN2] = INA3221_CHANNEL2, |
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| 86 | | - [INA3221_WARN3] = INA3221_CHANNEL3, |
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| 97 | +/** |
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| 98 | + * struct ina3221_input - channel input source specific information |
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| 99 | + * @label: label of channel input source |
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| 100 | + * @shunt_resistor: shunt resistor value of channel input source |
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| 101 | + * @disconnected: connection status of channel input source |
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| 102 | + */ |
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| 103 | +struct ina3221_input { |
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| 104 | + const char *label; |
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| 105 | + int shunt_resistor; |
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| 106 | + bool disconnected; |
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| 87 | 107 | }; |
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| 88 | 108 | |
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| 89 | 109 | /** |
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| 90 | 110 | * struct ina3221_data - device specific information |
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| 111 | + * @pm_dev: Device pointer for pm runtime |
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| 91 | 112 | * @regmap: Register map of the device |
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| 92 | 113 | * @fields: Register fields of the device |
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| 93 | | - * @shunt_resistors: Array of resistor values per channel |
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| 114 | + * @inputs: Array of channel input source specific structures |
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| 115 | + * @lock: mutex lock to serialize sysfs attribute accesses |
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| 116 | + * @reg_config: Register value of INA3221_CONFIG |
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| 117 | + * @summation_shunt_resistor: equivalent shunt resistor value for summation |
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| 118 | + * @single_shot: running in single-shot operating mode |
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| 94 | 119 | */ |
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| 95 | 120 | struct ina3221_data { |
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| 121 | + struct device *pm_dev; |
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| 96 | 122 | struct regmap *regmap; |
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| 97 | 123 | struct regmap_field *fields[F_MAX_FIELDS]; |
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| 98 | | - int shunt_resistors[INA3221_NUM_CHANNELS]; |
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| 124 | + struct ina3221_input inputs[INA3221_NUM_CHANNELS]; |
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| 125 | + struct mutex lock; |
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| 126 | + u32 reg_config; |
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| 127 | + int summation_shunt_resistor; |
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| 128 | + |
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| 129 | + bool single_shot; |
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| 99 | 130 | }; |
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| 131 | + |
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| 132 | +static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel) |
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| 133 | +{ |
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| 134 | + /* Summation channel checks shunt resistor values */ |
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| 135 | + if (channel > INA3221_CHANNEL3) |
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| 136 | + return ina->summation_shunt_resistor != 0; |
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| 137 | + |
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| 138 | + return pm_runtime_active(ina->pm_dev) && |
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| 139 | + (ina->reg_config & INA3221_CONFIG_CHx_EN(channel)); |
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| 140 | +} |
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| 141 | + |
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| 142 | +/** |
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| 143 | + * Helper function to return the resistor value for current summation. |
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| 144 | + * |
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| 145 | + * There is a condition to calculate current summation -- all the shunt |
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| 146 | + * resistor values should be the same, so as to simply fit the formula: |
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| 147 | + * current summation = shunt voltage summation / shunt resistor |
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| 148 | + * |
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| 149 | + * Returns the equivalent shunt resistor value on success or 0 on failure |
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| 150 | + */ |
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| 151 | +static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina) |
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| 152 | +{ |
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| 153 | + struct ina3221_input *input = ina->inputs; |
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| 154 | + int i, shunt_resistor = 0; |
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| 155 | + |
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| 156 | + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
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| 157 | + if (input[i].disconnected || !input[i].shunt_resistor) |
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| 158 | + continue; |
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| 159 | + if (!shunt_resistor) { |
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| 160 | + /* Found the reference shunt resistor value */ |
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| 161 | + shunt_resistor = input[i].shunt_resistor; |
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| 162 | + } else { |
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| 163 | + /* No summation if resistor values are different */ |
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| 164 | + if (shunt_resistor != input[i].shunt_resistor) |
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| 165 | + return 0; |
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| 166 | + } |
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| 167 | + } |
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| 168 | + |
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| 169 | + return shunt_resistor; |
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| 170 | +} |
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| 171 | + |
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| 172 | +/* Lookup table for Bus and Shunt conversion times in usec */ |
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| 173 | +static const u16 ina3221_conv_time[] = { |
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| 174 | + 140, 204, 332, 588, 1100, 2116, 4156, 8244, |
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| 175 | +}; |
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| 176 | + |
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| 177 | +/* Lookup table for number of samples using in averaging mode */ |
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| 178 | +static const int ina3221_avg_samples[] = { |
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| 179 | + 1, 4, 16, 64, 128, 256, 512, 1024, |
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| 180 | +}; |
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| 181 | + |
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| 182 | +/* Converting update_interval in msec to conversion time in usec */ |
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| 183 | +static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval) |
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| 184 | +{ |
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| 185 | + u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); |
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| 186 | + u32 samples_idx = INA3221_CONFIG_AVG(config); |
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| 187 | + u32 samples = ina3221_avg_samples[samples_idx]; |
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| 188 | + |
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| 189 | + /* Bisect the result to Bus and Shunt conversion times */ |
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| 190 | + return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples); |
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| 191 | +} |
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| 192 | + |
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| 193 | +/* Converting CONFIG register value to update_interval in usec */ |
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| 194 | +static inline u32 ina3221_reg_to_interval_us(u16 config) |
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| 195 | +{ |
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| 196 | + u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK); |
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| 197 | + u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config); |
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| 198 | + u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config); |
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| 199 | + u32 samples_idx = INA3221_CONFIG_AVG(config); |
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| 200 | + u32 samples = ina3221_avg_samples[samples_idx]; |
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| 201 | + u32 vbus_ct = ina3221_conv_time[vbus_ct_idx]; |
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| 202 | + u32 vsh_ct = ina3221_conv_time[vsh_ct_idx]; |
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| 203 | + |
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| 204 | + /* Calculate total conversion time */ |
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| 205 | + return channels * (vbus_ct + vsh_ct) * samples; |
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| 206 | +} |
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| 207 | + |
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| 208 | +static inline int ina3221_wait_for_data(struct ina3221_data *ina) |
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| 209 | +{ |
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| 210 | + u32 wait, cvrf; |
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| 211 | + |
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| 212 | + wait = ina3221_reg_to_interval_us(ina->reg_config); |
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| 213 | + |
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| 214 | + /* Polling the CVRF bit to make sure read data is ready */ |
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| 215 | + return regmap_field_read_poll_timeout(ina->fields[F_CVRF], |
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| 216 | + cvrf, cvrf, wait, wait * 2); |
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| 217 | +} |
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| 100 | 218 | |
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| 101 | 219 | static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg, |
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| 102 | 220 | int *val) |
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| .. | .. |
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| 108 | 226 | if (ret) |
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| 109 | 227 | return ret; |
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| 110 | 228 | |
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| 111 | | - *val = sign_extend32(regval >> 3, 12); |
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| 229 | + /* |
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| 230 | + * Shunt Voltage Sum register has 14-bit value with 1-bit shift |
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| 231 | + * Other Shunt Voltage registers have 12 bits with 3-bit shift |
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| 232 | + */ |
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| 233 | + if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM) |
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| 234 | + *val = sign_extend32(regval >> 1, 14); |
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| 235 | + else |
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| 236 | + *val = sign_extend32(regval >> 3, 12); |
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| 112 | 237 | |
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| 113 | 238 | return 0; |
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| 114 | 239 | } |
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| 115 | 240 | |
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| 116 | | -static ssize_t ina3221_show_bus_voltage(struct device *dev, |
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| 117 | | - struct device_attribute *attr, |
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| 118 | | - char *buf) |
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| 241 | +static const u8 ina3221_in_reg[] = { |
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| 242 | + INA3221_BUS1, |
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| 243 | + INA3221_BUS2, |
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| 244 | + INA3221_BUS3, |
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| 245 | + INA3221_SHUNT1, |
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| 246 | + INA3221_SHUNT2, |
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| 247 | + INA3221_SHUNT3, |
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| 248 | + INA3221_SHUNT_SUM, |
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| 249 | +}; |
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| 250 | + |
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| 251 | +static int ina3221_read_chip(struct device *dev, u32 attr, long *val) |
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| 119 | 252 | { |
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| 120 | | - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
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| 121 | 253 | struct ina3221_data *ina = dev_get_drvdata(dev); |
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| 122 | | - unsigned int reg = sd_attr->index; |
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| 123 | | - int val, voltage_mv, ret; |
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| 254 | + int regval; |
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| 124 | 255 | |
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| 125 | | - ret = ina3221_read_value(ina, reg, &val); |
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| 126 | | - if (ret) |
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| 127 | | - return ret; |
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| 128 | | - |
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| 129 | | - voltage_mv = val * 8; |
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| 130 | | - |
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| 131 | | - return snprintf(buf, PAGE_SIZE, "%d\n", voltage_mv); |
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| 256 | + switch (attr) { |
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| 257 | + case hwmon_chip_samples: |
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| 258 | + regval = INA3221_CONFIG_AVG(ina->reg_config); |
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| 259 | + *val = ina3221_avg_samples[regval]; |
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| 260 | + return 0; |
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| 261 | + case hwmon_chip_update_interval: |
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| 262 | + /* Return in msec */ |
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| 263 | + *val = ina3221_reg_to_interval_us(ina->reg_config); |
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| 264 | + *val = DIV_ROUND_CLOSEST(*val, 1000); |
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| 265 | + return 0; |
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| 266 | + default: |
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| 267 | + return -EOPNOTSUPP; |
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| 268 | + } |
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| 132 | 269 | } |
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| 133 | 270 | |
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| 134 | | -static ssize_t ina3221_show_shunt_voltage(struct device *dev, |
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| 135 | | - struct device_attribute *attr, |
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| 136 | | - char *buf) |
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| 271 | +static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val) |
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| 137 | 272 | { |
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| 138 | | - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
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| 273 | + const bool is_shunt = channel > INA3221_CHANNEL3; |
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| 139 | 274 | struct ina3221_data *ina = dev_get_drvdata(dev); |
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| 140 | | - unsigned int reg = sd_attr->index; |
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| 141 | | - int val, voltage_uv, ret; |
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| 275 | + u8 reg = ina3221_in_reg[channel]; |
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| 276 | + int regval, ret; |
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| 142 | 277 | |
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| 143 | | - ret = ina3221_read_value(ina, reg, &val); |
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| 144 | | - if (ret) |
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| 145 | | - return ret; |
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| 146 | | - voltage_uv = val * 40; |
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| 278 | + /* |
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| 279 | + * Translate shunt channel index to sensor channel index except |
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| 280 | + * the 7th channel (6 since being 0-aligned) is for summation. |
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| 281 | + */ |
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| 282 | + if (channel != 6) |
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| 283 | + channel %= INA3221_NUM_CHANNELS; |
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| 147 | 284 | |
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| 148 | | - return snprintf(buf, PAGE_SIZE, "%d\n", voltage_uv); |
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| 285 | + switch (attr) { |
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| 286 | + case hwmon_in_input: |
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| 287 | + if (!ina3221_is_enabled(ina, channel)) |
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| 288 | + return -ENODATA; |
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| 289 | + |
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| 290 | + /* Write CONFIG register to trigger a single-shot measurement */ |
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| 291 | + if (ina->single_shot) |
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| 292 | + regmap_write(ina->regmap, INA3221_CONFIG, |
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| 293 | + ina->reg_config); |
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| 294 | + |
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| 295 | + ret = ina3221_wait_for_data(ina); |
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| 296 | + if (ret) |
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| 297 | + return ret; |
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| 298 | + |
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| 299 | + ret = ina3221_read_value(ina, reg, ®val); |
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| 300 | + if (ret) |
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| 301 | + return ret; |
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| 302 | + |
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| 303 | + /* |
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| 304 | + * Scale of shunt voltage (uV): LSB is 40uV |
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| 305 | + * Scale of bus voltage (mV): LSB is 8mV |
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| 306 | + */ |
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| 307 | + *val = regval * (is_shunt ? 40 : 8); |
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| 308 | + return 0; |
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| 309 | + case hwmon_in_enable: |
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| 310 | + *val = ina3221_is_enabled(ina, channel); |
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| 311 | + return 0; |
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| 312 | + default: |
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| 313 | + return -EOPNOTSUPP; |
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| 314 | + } |
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| 149 | 315 | } |
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| 150 | 316 | |
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| 151 | | -static ssize_t ina3221_show_current(struct device *dev, |
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| 152 | | - struct device_attribute *attr, char *buf) |
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| 317 | +static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = { |
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| 318 | + [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2, |
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| 319 | + INA3221_SHUNT3, INA3221_SHUNT_SUM }, |
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| 320 | + [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 }, |
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| 321 | + [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2, |
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| 322 | + INA3221_CRIT3, INA3221_CRIT_SUM }, |
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| 323 | + [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 }, |
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| 324 | + [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF }, |
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| 325 | +}; |
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| 326 | + |
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| 327 | +static int ina3221_read_curr(struct device *dev, u32 attr, |
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| 328 | + int channel, long *val) |
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| 153 | 329 | { |
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| 154 | | - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
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| 155 | 330 | struct ina3221_data *ina = dev_get_drvdata(dev); |
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| 156 | | - unsigned int reg = sd_attr->index; |
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| 157 | | - unsigned int channel = register_channel[reg]; |
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| 158 | | - int resistance_uo = ina->shunt_resistors[channel]; |
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| 159 | | - int val, current_ma, voltage_nv, ret; |
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| 331 | + struct ina3221_input *input = ina->inputs; |
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| 332 | + u8 reg = ina3221_curr_reg[attr][channel]; |
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| 333 | + int resistance_uo, voltage_nv; |
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| 334 | + int regval, ret; |
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| 160 | 335 | |
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| 161 | | - ret = ina3221_read_value(ina, reg, &val); |
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| 162 | | - if (ret) |
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| 163 | | - return ret; |
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| 164 | | - voltage_nv = val * 40000; |
|---|
| 336 | + if (channel > INA3221_CHANNEL3) |
|---|
| 337 | + resistance_uo = ina->summation_shunt_resistor; |
|---|
| 338 | + else |
|---|
| 339 | + resistance_uo = input[channel].shunt_resistor; |
|---|
| 165 | 340 | |
|---|
| 166 | | - current_ma = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo); |
|---|
| 341 | + switch (attr) { |
|---|
| 342 | + case hwmon_curr_input: |
|---|
| 343 | + if (!ina3221_is_enabled(ina, channel)) |
|---|
| 344 | + return -ENODATA; |
|---|
| 167 | 345 | |
|---|
| 168 | | - return snprintf(buf, PAGE_SIZE, "%d\n", current_ma); |
|---|
| 346 | + /* Write CONFIG register to trigger a single-shot measurement */ |
|---|
| 347 | + if (ina->single_shot) |
|---|
| 348 | + regmap_write(ina->regmap, INA3221_CONFIG, |
|---|
| 349 | + ina->reg_config); |
|---|
| 350 | + |
|---|
| 351 | + ret = ina3221_wait_for_data(ina); |
|---|
| 352 | + if (ret) |
|---|
| 353 | + return ret; |
|---|
| 354 | + |
|---|
| 355 | + fallthrough; |
|---|
| 356 | + case hwmon_curr_crit: |
|---|
| 357 | + case hwmon_curr_max: |
|---|
| 358 | + if (!resistance_uo) |
|---|
| 359 | + return -ENODATA; |
|---|
| 360 | + |
|---|
| 361 | + ret = ina3221_read_value(ina, reg, ®val); |
|---|
| 362 | + if (ret) |
|---|
| 363 | + return ret; |
|---|
| 364 | + |
|---|
| 365 | + /* Scale of shunt voltage: LSB is 40uV (40000nV) */ |
|---|
| 366 | + voltage_nv = regval * 40000; |
|---|
| 367 | + /* Return current in mA */ |
|---|
| 368 | + *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo); |
|---|
| 369 | + return 0; |
|---|
| 370 | + case hwmon_curr_crit_alarm: |
|---|
| 371 | + case hwmon_curr_max_alarm: |
|---|
| 372 | + /* No actual register read if channel is disabled */ |
|---|
| 373 | + if (!ina3221_is_enabled(ina, channel)) { |
|---|
| 374 | + /* Return 0 for alert flags */ |
|---|
| 375 | + *val = 0; |
|---|
| 376 | + return 0; |
|---|
| 377 | + } |
|---|
| 378 | + ret = regmap_field_read(ina->fields[reg], ®val); |
|---|
| 379 | + if (ret) |
|---|
| 380 | + return ret; |
|---|
| 381 | + *val = regval; |
|---|
| 382 | + return 0; |
|---|
| 383 | + default: |
|---|
| 384 | + return -EOPNOTSUPP; |
|---|
| 385 | + } |
|---|
| 169 | 386 | } |
|---|
| 170 | 387 | |
|---|
| 171 | | -static ssize_t ina3221_set_current(struct device *dev, |
|---|
| 172 | | - struct device_attribute *attr, |
|---|
| 173 | | - const char *buf, size_t count) |
|---|
| 388 | +static int ina3221_write_chip(struct device *dev, u32 attr, long val) |
|---|
| 174 | 389 | { |
|---|
| 175 | | - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
|---|
| 176 | 390 | struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 177 | | - unsigned int reg = sd_attr->index; |
|---|
| 178 | | - unsigned int channel = register_channel[reg]; |
|---|
| 179 | | - int resistance_uo = ina->shunt_resistors[channel]; |
|---|
| 180 | | - int val, current_ma, voltage_uv, ret; |
|---|
| 391 | + int ret, idx; |
|---|
| 392 | + u32 tmp; |
|---|
| 181 | 393 | |
|---|
| 182 | | - ret = kstrtoint(buf, 0, ¤t_ma); |
|---|
| 183 | | - if (ret) |
|---|
| 184 | | - return ret; |
|---|
| 394 | + switch (attr) { |
|---|
| 395 | + case hwmon_chip_samples: |
|---|
| 396 | + idx = find_closest(val, ina3221_avg_samples, |
|---|
| 397 | + ARRAY_SIZE(ina3221_avg_samples)); |
|---|
| 398 | + |
|---|
| 399 | + tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) | |
|---|
| 400 | + (idx << INA3221_CONFIG_AVG_SHIFT); |
|---|
| 401 | + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); |
|---|
| 402 | + if (ret) |
|---|
| 403 | + return ret; |
|---|
| 404 | + |
|---|
| 405 | + /* Update reg_config accordingly */ |
|---|
| 406 | + ina->reg_config = tmp; |
|---|
| 407 | + return 0; |
|---|
| 408 | + case hwmon_chip_update_interval: |
|---|
| 409 | + tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val); |
|---|
| 410 | + idx = find_closest(tmp, ina3221_conv_time, |
|---|
| 411 | + ARRAY_SIZE(ina3221_conv_time)); |
|---|
| 412 | + |
|---|
| 413 | + /* Update Bus and Shunt voltage conversion times */ |
|---|
| 414 | + tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK; |
|---|
| 415 | + tmp = (ina->reg_config & ~tmp) | |
|---|
| 416 | + (idx << INA3221_CONFIG_VBUS_CT_SHIFT) | |
|---|
| 417 | + (idx << INA3221_CONFIG_VSH_CT_SHIFT); |
|---|
| 418 | + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); |
|---|
| 419 | + if (ret) |
|---|
| 420 | + return ret; |
|---|
| 421 | + |
|---|
| 422 | + /* Update reg_config accordingly */ |
|---|
| 423 | + ina->reg_config = tmp; |
|---|
| 424 | + return 0; |
|---|
| 425 | + default: |
|---|
| 426 | + return -EOPNOTSUPP; |
|---|
| 427 | + } |
|---|
| 428 | +} |
|---|
| 429 | + |
|---|
| 430 | +static int ina3221_write_curr(struct device *dev, u32 attr, |
|---|
| 431 | + int channel, long val) |
|---|
| 432 | +{ |
|---|
| 433 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 434 | + struct ina3221_input *input = ina->inputs; |
|---|
| 435 | + u8 reg = ina3221_curr_reg[attr][channel]; |
|---|
| 436 | + int resistance_uo, current_ma, voltage_uv; |
|---|
| 437 | + int regval; |
|---|
| 438 | + |
|---|
| 439 | + if (channel > INA3221_CHANNEL3) |
|---|
| 440 | + resistance_uo = ina->summation_shunt_resistor; |
|---|
| 441 | + else |
|---|
| 442 | + resistance_uo = input[channel].shunt_resistor; |
|---|
| 443 | + |
|---|
| 444 | + if (!resistance_uo) |
|---|
| 445 | + return -EOPNOTSUPP; |
|---|
| 185 | 446 | |
|---|
| 186 | 447 | /* clamp current */ |
|---|
| 187 | | - current_ma = clamp_val(current_ma, |
|---|
| 448 | + current_ma = clamp_val(val, |
|---|
| 188 | 449 | INT_MIN / resistance_uo, |
|---|
| 189 | 450 | INT_MAX / resistance_uo); |
|---|
| 190 | 451 | |
|---|
| .. | .. |
|---|
| 193 | 454 | /* clamp voltage */ |
|---|
| 194 | 455 | voltage_uv = clamp_val(voltage_uv, -163800, 163800); |
|---|
| 195 | 456 | |
|---|
| 196 | | - /* 1 / 40uV(scale) << 3(register shift) = 5 */ |
|---|
| 197 | | - val = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8; |
|---|
| 457 | + /* |
|---|
| 458 | + * Formula to convert voltage_uv to register value: |
|---|
| 459 | + * regval = (voltage_uv / scale) << shift |
|---|
| 460 | + * Note: |
|---|
| 461 | + * The scale is 40uV for all shunt voltage registers |
|---|
| 462 | + * Shunt Voltage Sum register left-shifts 1 bit |
|---|
| 463 | + * All other Shunt Voltage registers shift 3 bits |
|---|
| 464 | + * Results: |
|---|
| 465 | + * SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV |
|---|
| 466 | + * SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV |
|---|
| 467 | + */ |
|---|
| 468 | + if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM) |
|---|
| 469 | + regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe; |
|---|
| 470 | + else |
|---|
| 471 | + regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8; |
|---|
| 198 | 472 | |
|---|
| 199 | | - ret = regmap_write(ina->regmap, reg, val); |
|---|
| 200 | | - if (ret) |
|---|
| 201 | | - return ret; |
|---|
| 202 | | - |
|---|
| 203 | | - return count; |
|---|
| 473 | + return regmap_write(ina->regmap, reg, regval); |
|---|
| 204 | 474 | } |
|---|
| 205 | 475 | |
|---|
| 206 | | -static ssize_t ina3221_show_shunt(struct device *dev, |
|---|
| 476 | +static int ina3221_write_enable(struct device *dev, int channel, bool enable) |
|---|
| 477 | +{ |
|---|
| 478 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 479 | + u16 config, mask = INA3221_CONFIG_CHx_EN(channel); |
|---|
| 480 | + u16 config_old = ina->reg_config & mask; |
|---|
| 481 | + u32 tmp; |
|---|
| 482 | + int ret; |
|---|
| 483 | + |
|---|
| 484 | + config = enable ? mask : 0; |
|---|
| 485 | + |
|---|
| 486 | + /* Bypass if enable status is not being changed */ |
|---|
| 487 | + if (config_old == config) |
|---|
| 488 | + return 0; |
|---|
| 489 | + |
|---|
| 490 | + /* For enabling routine, increase refcount and resume() at first */ |
|---|
| 491 | + if (enable) { |
|---|
| 492 | + ret = pm_runtime_resume_and_get(ina->pm_dev); |
|---|
| 493 | + if (ret < 0) { |
|---|
| 494 | + dev_err(dev, "Failed to get PM runtime\n"); |
|---|
| 495 | + return ret; |
|---|
| 496 | + } |
|---|
| 497 | + } |
|---|
| 498 | + |
|---|
| 499 | + /* Enable or disable the channel */ |
|---|
| 500 | + tmp = (ina->reg_config & ~mask) | (config & mask); |
|---|
| 501 | + ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp); |
|---|
| 502 | + if (ret) |
|---|
| 503 | + goto fail; |
|---|
| 504 | + |
|---|
| 505 | + /* Cache the latest config register value */ |
|---|
| 506 | + ina->reg_config = tmp; |
|---|
| 507 | + |
|---|
| 508 | + /* For disabling routine, decrease refcount or suspend() at last */ |
|---|
| 509 | + if (!enable) |
|---|
| 510 | + pm_runtime_put_sync(ina->pm_dev); |
|---|
| 511 | + |
|---|
| 512 | + return 0; |
|---|
| 513 | + |
|---|
| 514 | +fail: |
|---|
| 515 | + if (enable) { |
|---|
| 516 | + dev_err(dev, "Failed to enable channel %d: error %d\n", |
|---|
| 517 | + channel, ret); |
|---|
| 518 | + pm_runtime_put_sync(ina->pm_dev); |
|---|
| 519 | + } |
|---|
| 520 | + |
|---|
| 521 | + return ret; |
|---|
| 522 | +} |
|---|
| 523 | + |
|---|
| 524 | +static int ina3221_read(struct device *dev, enum hwmon_sensor_types type, |
|---|
| 525 | + u32 attr, int channel, long *val) |
|---|
| 526 | +{ |
|---|
| 527 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 528 | + int ret; |
|---|
| 529 | + |
|---|
| 530 | + mutex_lock(&ina->lock); |
|---|
| 531 | + |
|---|
| 532 | + switch (type) { |
|---|
| 533 | + case hwmon_chip: |
|---|
| 534 | + ret = ina3221_read_chip(dev, attr, val); |
|---|
| 535 | + break; |
|---|
| 536 | + case hwmon_in: |
|---|
| 537 | + /* 0-align channel ID */ |
|---|
| 538 | + ret = ina3221_read_in(dev, attr, channel - 1, val); |
|---|
| 539 | + break; |
|---|
| 540 | + case hwmon_curr: |
|---|
| 541 | + ret = ina3221_read_curr(dev, attr, channel, val); |
|---|
| 542 | + break; |
|---|
| 543 | + default: |
|---|
| 544 | + ret = -EOPNOTSUPP; |
|---|
| 545 | + break; |
|---|
| 546 | + } |
|---|
| 547 | + |
|---|
| 548 | + mutex_unlock(&ina->lock); |
|---|
| 549 | + |
|---|
| 550 | + return ret; |
|---|
| 551 | +} |
|---|
| 552 | + |
|---|
| 553 | +static int ina3221_write(struct device *dev, enum hwmon_sensor_types type, |
|---|
| 554 | + u32 attr, int channel, long val) |
|---|
| 555 | +{ |
|---|
| 556 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 557 | + int ret; |
|---|
| 558 | + |
|---|
| 559 | + mutex_lock(&ina->lock); |
|---|
| 560 | + |
|---|
| 561 | + switch (type) { |
|---|
| 562 | + case hwmon_chip: |
|---|
| 563 | + ret = ina3221_write_chip(dev, attr, val); |
|---|
| 564 | + break; |
|---|
| 565 | + case hwmon_in: |
|---|
| 566 | + /* 0-align channel ID */ |
|---|
| 567 | + ret = ina3221_write_enable(dev, channel - 1, val); |
|---|
| 568 | + break; |
|---|
| 569 | + case hwmon_curr: |
|---|
| 570 | + ret = ina3221_write_curr(dev, attr, channel, val); |
|---|
| 571 | + break; |
|---|
| 572 | + default: |
|---|
| 573 | + ret = -EOPNOTSUPP; |
|---|
| 574 | + break; |
|---|
| 575 | + } |
|---|
| 576 | + |
|---|
| 577 | + mutex_unlock(&ina->lock); |
|---|
| 578 | + |
|---|
| 579 | + return ret; |
|---|
| 580 | +} |
|---|
| 581 | + |
|---|
| 582 | +static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type, |
|---|
| 583 | + u32 attr, int channel, const char **str) |
|---|
| 584 | +{ |
|---|
| 585 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 586 | + int index = channel - 1; |
|---|
| 587 | + |
|---|
| 588 | + if (channel == 7) |
|---|
| 589 | + *str = "sum of shunt voltages"; |
|---|
| 590 | + else |
|---|
| 591 | + *str = ina->inputs[index].label; |
|---|
| 592 | + |
|---|
| 593 | + return 0; |
|---|
| 594 | +} |
|---|
| 595 | + |
|---|
| 596 | +static umode_t ina3221_is_visible(const void *drvdata, |
|---|
| 597 | + enum hwmon_sensor_types type, |
|---|
| 598 | + u32 attr, int channel) |
|---|
| 599 | +{ |
|---|
| 600 | + const struct ina3221_data *ina = drvdata; |
|---|
| 601 | + const struct ina3221_input *input = NULL; |
|---|
| 602 | + |
|---|
| 603 | + switch (type) { |
|---|
| 604 | + case hwmon_chip: |
|---|
| 605 | + switch (attr) { |
|---|
| 606 | + case hwmon_chip_samples: |
|---|
| 607 | + case hwmon_chip_update_interval: |
|---|
| 608 | + return 0644; |
|---|
| 609 | + default: |
|---|
| 610 | + return 0; |
|---|
| 611 | + } |
|---|
| 612 | + case hwmon_in: |
|---|
| 613 | + /* Ignore in0_ */ |
|---|
| 614 | + if (channel == 0) |
|---|
| 615 | + return 0; |
|---|
| 616 | + |
|---|
| 617 | + switch (attr) { |
|---|
| 618 | + case hwmon_in_label: |
|---|
| 619 | + if (channel - 1 <= INA3221_CHANNEL3) |
|---|
| 620 | + input = &ina->inputs[channel - 1]; |
|---|
| 621 | + else if (channel == 7) |
|---|
| 622 | + return 0444; |
|---|
| 623 | + /* Hide label node if label is not provided */ |
|---|
| 624 | + return (input && input->label) ? 0444 : 0; |
|---|
| 625 | + case hwmon_in_input: |
|---|
| 626 | + return 0444; |
|---|
| 627 | + case hwmon_in_enable: |
|---|
| 628 | + return 0644; |
|---|
| 629 | + default: |
|---|
| 630 | + return 0; |
|---|
| 631 | + } |
|---|
| 632 | + case hwmon_curr: |
|---|
| 633 | + switch (attr) { |
|---|
| 634 | + case hwmon_curr_input: |
|---|
| 635 | + case hwmon_curr_crit_alarm: |
|---|
| 636 | + case hwmon_curr_max_alarm: |
|---|
| 637 | + return 0444; |
|---|
| 638 | + case hwmon_curr_crit: |
|---|
| 639 | + case hwmon_curr_max: |
|---|
| 640 | + return 0644; |
|---|
| 641 | + default: |
|---|
| 642 | + return 0; |
|---|
| 643 | + } |
|---|
| 644 | + default: |
|---|
| 645 | + return 0; |
|---|
| 646 | + } |
|---|
| 647 | +} |
|---|
| 648 | + |
|---|
| 649 | +#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \ |
|---|
| 650 | + HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \ |
|---|
| 651 | + HWMON_C_MAX | HWMON_C_MAX_ALARM) |
|---|
| 652 | + |
|---|
| 653 | +static const struct hwmon_channel_info *ina3221_info[] = { |
|---|
| 654 | + HWMON_CHANNEL_INFO(chip, |
|---|
| 655 | + HWMON_C_SAMPLES, |
|---|
| 656 | + HWMON_C_UPDATE_INTERVAL), |
|---|
| 657 | + HWMON_CHANNEL_INFO(in, |
|---|
| 658 | + /* 0: dummy, skipped in is_visible */ |
|---|
| 659 | + HWMON_I_INPUT, |
|---|
| 660 | + /* 1-3: input voltage Channels */ |
|---|
| 661 | + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
|---|
| 662 | + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
|---|
| 663 | + HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL, |
|---|
| 664 | + /* 4-6: shunt voltage Channels */ |
|---|
| 665 | + HWMON_I_INPUT, |
|---|
| 666 | + HWMON_I_INPUT, |
|---|
| 667 | + HWMON_I_INPUT, |
|---|
| 668 | + /* 7: summation of shunt voltage channels */ |
|---|
| 669 | + HWMON_I_INPUT | HWMON_I_LABEL), |
|---|
| 670 | + HWMON_CHANNEL_INFO(curr, |
|---|
| 671 | + /* 1-3: current channels*/ |
|---|
| 672 | + INA3221_HWMON_CURR_CONFIG, |
|---|
| 673 | + INA3221_HWMON_CURR_CONFIG, |
|---|
| 674 | + INA3221_HWMON_CURR_CONFIG, |
|---|
| 675 | + /* 4: summation of current channels */ |
|---|
| 676 | + HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM), |
|---|
| 677 | + NULL |
|---|
| 678 | +}; |
|---|
| 679 | + |
|---|
| 680 | +static const struct hwmon_ops ina3221_hwmon_ops = { |
|---|
| 681 | + .is_visible = ina3221_is_visible, |
|---|
| 682 | + .read_string = ina3221_read_string, |
|---|
| 683 | + .read = ina3221_read, |
|---|
| 684 | + .write = ina3221_write, |
|---|
| 685 | +}; |
|---|
| 686 | + |
|---|
| 687 | +static const struct hwmon_chip_info ina3221_chip_info = { |
|---|
| 688 | + .ops = &ina3221_hwmon_ops, |
|---|
| 689 | + .info = ina3221_info, |
|---|
| 690 | +}; |
|---|
| 691 | + |
|---|
| 692 | +/* Extra attribute groups */ |
|---|
| 693 | +static ssize_t ina3221_shunt_show(struct device *dev, |
|---|
| 207 | 694 | struct device_attribute *attr, char *buf) |
|---|
| 208 | 695 | { |
|---|
| 209 | 696 | struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
|---|
| 210 | 697 | struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 211 | 698 | unsigned int channel = sd_attr->index; |
|---|
| 212 | | - unsigned int resistance_uo; |
|---|
| 699 | + struct ina3221_input *input = &ina->inputs[channel]; |
|---|
| 213 | 700 | |
|---|
| 214 | | - resistance_uo = ina->shunt_resistors[channel]; |
|---|
| 215 | | - |
|---|
| 216 | | - return snprintf(buf, PAGE_SIZE, "%d\n", resistance_uo); |
|---|
| 701 | + return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor); |
|---|
| 217 | 702 | } |
|---|
| 218 | 703 | |
|---|
| 219 | | -static ssize_t ina3221_set_shunt(struct device *dev, |
|---|
| 220 | | - struct device_attribute *attr, |
|---|
| 221 | | - const char *buf, size_t count) |
|---|
| 704 | +static ssize_t ina3221_shunt_store(struct device *dev, |
|---|
| 705 | + struct device_attribute *attr, |
|---|
| 706 | + const char *buf, size_t count) |
|---|
| 222 | 707 | { |
|---|
| 223 | 708 | struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
|---|
| 224 | 709 | struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 225 | 710 | unsigned int channel = sd_attr->index; |
|---|
| 711 | + struct ina3221_input *input = &ina->inputs[channel]; |
|---|
| 226 | 712 | int val; |
|---|
| 227 | 713 | int ret; |
|---|
| 228 | 714 | |
|---|
| .. | .. |
|---|
| 232 | 718 | |
|---|
| 233 | 719 | val = clamp_val(val, 1, INT_MAX); |
|---|
| 234 | 720 | |
|---|
| 235 | | - ina->shunt_resistors[channel] = val; |
|---|
| 721 | + input->shunt_resistor = val; |
|---|
| 722 | + |
|---|
| 723 | + /* Update summation_shunt_resistor for summation channel */ |
|---|
| 724 | + ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); |
|---|
| 236 | 725 | |
|---|
| 237 | 726 | return count; |
|---|
| 238 | 727 | } |
|---|
| 239 | 728 | |
|---|
| 240 | | -static ssize_t ina3221_show_alert(struct device *dev, |
|---|
| 241 | | - struct device_attribute *attr, char *buf) |
|---|
| 242 | | -{ |
|---|
| 243 | | - struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr); |
|---|
| 244 | | - struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 245 | | - unsigned int field = sd_attr->index; |
|---|
| 246 | | - unsigned int regval; |
|---|
| 247 | | - int ret; |
|---|
| 248 | | - |
|---|
| 249 | | - ret = regmap_field_read(ina->fields[field], ®val); |
|---|
| 250 | | - if (ret) |
|---|
| 251 | | - return ret; |
|---|
| 252 | | - |
|---|
| 253 | | - return snprintf(buf, PAGE_SIZE, "%d\n", regval); |
|---|
| 254 | | -} |
|---|
| 255 | | - |
|---|
| 256 | | -/* bus voltage */ |
|---|
| 257 | | -static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, |
|---|
| 258 | | - ina3221_show_bus_voltage, NULL, INA3221_BUS1); |
|---|
| 259 | | -static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, |
|---|
| 260 | | - ina3221_show_bus_voltage, NULL, INA3221_BUS2); |
|---|
| 261 | | -static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, |
|---|
| 262 | | - ina3221_show_bus_voltage, NULL, INA3221_BUS3); |
|---|
| 263 | | - |
|---|
| 264 | | -/* calculated current */ |
|---|
| 265 | | -static SENSOR_DEVICE_ATTR(curr1_input, S_IRUGO, |
|---|
| 266 | | - ina3221_show_current, NULL, INA3221_SHUNT1); |
|---|
| 267 | | -static SENSOR_DEVICE_ATTR(curr2_input, S_IRUGO, |
|---|
| 268 | | - ina3221_show_current, NULL, INA3221_SHUNT2); |
|---|
| 269 | | -static SENSOR_DEVICE_ATTR(curr3_input, S_IRUGO, |
|---|
| 270 | | - ina3221_show_current, NULL, INA3221_SHUNT3); |
|---|
| 271 | | - |
|---|
| 272 | 729 | /* shunt resistance */ |
|---|
| 273 | | -static SENSOR_DEVICE_ATTR(shunt1_resistor, S_IRUGO | S_IWUSR, |
|---|
| 274 | | - ina3221_show_shunt, ina3221_set_shunt, INA3221_CHANNEL1); |
|---|
| 275 | | -static SENSOR_DEVICE_ATTR(shunt2_resistor, S_IRUGO | S_IWUSR, |
|---|
| 276 | | - ina3221_show_shunt, ina3221_set_shunt, INA3221_CHANNEL2); |
|---|
| 277 | | -static SENSOR_DEVICE_ATTR(shunt3_resistor, S_IRUGO | S_IWUSR, |
|---|
| 278 | | - ina3221_show_shunt, ina3221_set_shunt, INA3221_CHANNEL3); |
|---|
| 279 | | - |
|---|
| 280 | | -/* critical current */ |
|---|
| 281 | | -static SENSOR_DEVICE_ATTR(curr1_crit, S_IRUGO | S_IWUSR, |
|---|
| 282 | | - ina3221_show_current, ina3221_set_current, INA3221_CRIT1); |
|---|
| 283 | | -static SENSOR_DEVICE_ATTR(curr2_crit, S_IRUGO | S_IWUSR, |
|---|
| 284 | | - ina3221_show_current, ina3221_set_current, INA3221_CRIT2); |
|---|
| 285 | | -static SENSOR_DEVICE_ATTR(curr3_crit, S_IRUGO | S_IWUSR, |
|---|
| 286 | | - ina3221_show_current, ina3221_set_current, INA3221_CRIT3); |
|---|
| 287 | | - |
|---|
| 288 | | -/* critical current alert */ |
|---|
| 289 | | -static SENSOR_DEVICE_ATTR(curr1_crit_alarm, S_IRUGO, |
|---|
| 290 | | - ina3221_show_alert, NULL, F_CF1); |
|---|
| 291 | | -static SENSOR_DEVICE_ATTR(curr2_crit_alarm, S_IRUGO, |
|---|
| 292 | | - ina3221_show_alert, NULL, F_CF2); |
|---|
| 293 | | -static SENSOR_DEVICE_ATTR(curr3_crit_alarm, S_IRUGO, |
|---|
| 294 | | - ina3221_show_alert, NULL, F_CF3); |
|---|
| 295 | | - |
|---|
| 296 | | -/* warning current */ |
|---|
| 297 | | -static SENSOR_DEVICE_ATTR(curr1_max, S_IRUGO | S_IWUSR, |
|---|
| 298 | | - ina3221_show_current, ina3221_set_current, INA3221_WARN1); |
|---|
| 299 | | -static SENSOR_DEVICE_ATTR(curr2_max, S_IRUGO | S_IWUSR, |
|---|
| 300 | | - ina3221_show_current, ina3221_set_current, INA3221_WARN2); |
|---|
| 301 | | -static SENSOR_DEVICE_ATTR(curr3_max, S_IRUGO | S_IWUSR, |
|---|
| 302 | | - ina3221_show_current, ina3221_set_current, INA3221_WARN3); |
|---|
| 303 | | - |
|---|
| 304 | | -/* warning current alert */ |
|---|
| 305 | | -static SENSOR_DEVICE_ATTR(curr1_max_alarm, S_IRUGO, |
|---|
| 306 | | - ina3221_show_alert, NULL, F_WF1); |
|---|
| 307 | | -static SENSOR_DEVICE_ATTR(curr2_max_alarm, S_IRUGO, |
|---|
| 308 | | - ina3221_show_alert, NULL, F_WF2); |
|---|
| 309 | | -static SENSOR_DEVICE_ATTR(curr3_max_alarm, S_IRUGO, |
|---|
| 310 | | - ina3221_show_alert, NULL, F_WF3); |
|---|
| 311 | | - |
|---|
| 312 | | -/* shunt voltage */ |
|---|
| 313 | | -static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, |
|---|
| 314 | | - ina3221_show_shunt_voltage, NULL, INA3221_SHUNT1); |
|---|
| 315 | | -static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, |
|---|
| 316 | | - ina3221_show_shunt_voltage, NULL, INA3221_SHUNT2); |
|---|
| 317 | | -static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, |
|---|
| 318 | | - ina3221_show_shunt_voltage, NULL, INA3221_SHUNT3); |
|---|
| 730 | +static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1); |
|---|
| 731 | +static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2); |
|---|
| 732 | +static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3); |
|---|
| 319 | 733 | |
|---|
| 320 | 734 | static struct attribute *ina3221_attrs[] = { |
|---|
| 321 | | - /* channel 1 */ |
|---|
| 322 | | - &sensor_dev_attr_in1_input.dev_attr.attr, |
|---|
| 323 | | - &sensor_dev_attr_curr1_input.dev_attr.attr, |
|---|
| 324 | 735 | &sensor_dev_attr_shunt1_resistor.dev_attr.attr, |
|---|
| 325 | | - &sensor_dev_attr_curr1_crit.dev_attr.attr, |
|---|
| 326 | | - &sensor_dev_attr_curr1_crit_alarm.dev_attr.attr, |
|---|
| 327 | | - &sensor_dev_attr_curr1_max.dev_attr.attr, |
|---|
| 328 | | - &sensor_dev_attr_curr1_max_alarm.dev_attr.attr, |
|---|
| 329 | | - &sensor_dev_attr_in4_input.dev_attr.attr, |
|---|
| 330 | | - |
|---|
| 331 | | - /* channel 2 */ |
|---|
| 332 | | - &sensor_dev_attr_in2_input.dev_attr.attr, |
|---|
| 333 | | - &sensor_dev_attr_curr2_input.dev_attr.attr, |
|---|
| 334 | 736 | &sensor_dev_attr_shunt2_resistor.dev_attr.attr, |
|---|
| 335 | | - &sensor_dev_attr_curr2_crit.dev_attr.attr, |
|---|
| 336 | | - &sensor_dev_attr_curr2_crit_alarm.dev_attr.attr, |
|---|
| 337 | | - &sensor_dev_attr_curr2_max.dev_attr.attr, |
|---|
| 338 | | - &sensor_dev_attr_curr2_max_alarm.dev_attr.attr, |
|---|
| 339 | | - &sensor_dev_attr_in5_input.dev_attr.attr, |
|---|
| 340 | | - |
|---|
| 341 | | - /* channel 3 */ |
|---|
| 342 | | - &sensor_dev_attr_in3_input.dev_attr.attr, |
|---|
| 343 | | - &sensor_dev_attr_curr3_input.dev_attr.attr, |
|---|
| 344 | 737 | &sensor_dev_attr_shunt3_resistor.dev_attr.attr, |
|---|
| 345 | | - &sensor_dev_attr_curr3_crit.dev_attr.attr, |
|---|
| 346 | | - &sensor_dev_attr_curr3_crit_alarm.dev_attr.attr, |
|---|
| 347 | | - &sensor_dev_attr_curr3_max.dev_attr.attr, |
|---|
| 348 | | - &sensor_dev_attr_curr3_max_alarm.dev_attr.attr, |
|---|
| 349 | | - &sensor_dev_attr_in6_input.dev_attr.attr, |
|---|
| 350 | | - |
|---|
| 351 | 738 | NULL, |
|---|
| 352 | 739 | }; |
|---|
| 353 | 740 | ATTRIBUTE_GROUPS(ina3221); |
|---|
| 354 | 741 | |
|---|
| 355 | 742 | static const struct regmap_range ina3221_yes_ranges[] = { |
|---|
| 356 | | - regmap_reg_range(INA3221_SHUNT1, INA3221_BUS3), |
|---|
| 743 | + regmap_reg_range(INA3221_CONFIG, INA3221_BUS3), |
|---|
| 744 | + regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM), |
|---|
| 357 | 745 | regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE), |
|---|
| 358 | 746 | }; |
|---|
| 359 | 747 | |
|---|
| .. | .. |
|---|
| 370 | 758 | .volatile_table = &ina3221_volatile_table, |
|---|
| 371 | 759 | }; |
|---|
| 372 | 760 | |
|---|
| 373 | | -static int ina3221_probe(struct i2c_client *client, |
|---|
| 374 | | - const struct i2c_device_id *id) |
|---|
| 761 | +static int ina3221_probe_child_from_dt(struct device *dev, |
|---|
| 762 | + struct device_node *child, |
|---|
| 763 | + struct ina3221_data *ina) |
|---|
| 764 | +{ |
|---|
| 765 | + struct ina3221_input *input; |
|---|
| 766 | + u32 val; |
|---|
| 767 | + int ret; |
|---|
| 768 | + |
|---|
| 769 | + ret = of_property_read_u32(child, "reg", &val); |
|---|
| 770 | + if (ret) { |
|---|
| 771 | + dev_err(dev, "missing reg property of %pOFn\n", child); |
|---|
| 772 | + return ret; |
|---|
| 773 | + } else if (val > INA3221_CHANNEL3) { |
|---|
| 774 | + dev_err(dev, "invalid reg %d of %pOFn\n", val, child); |
|---|
| 775 | + return ret; |
|---|
| 776 | + } |
|---|
| 777 | + |
|---|
| 778 | + input = &ina->inputs[val]; |
|---|
| 779 | + |
|---|
| 780 | + /* Log the disconnected channel input */ |
|---|
| 781 | + if (!of_device_is_available(child)) { |
|---|
| 782 | + input->disconnected = true; |
|---|
| 783 | + return 0; |
|---|
| 784 | + } |
|---|
| 785 | + |
|---|
| 786 | + /* Save the connected input label if available */ |
|---|
| 787 | + of_property_read_string(child, "label", &input->label); |
|---|
| 788 | + |
|---|
| 789 | + /* Overwrite default shunt resistor value optionally */ |
|---|
| 790 | + if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) { |
|---|
| 791 | + if (val < 1 || val > INT_MAX) { |
|---|
| 792 | + dev_err(dev, "invalid shunt resistor value %u of %pOFn\n", |
|---|
| 793 | + val, child); |
|---|
| 794 | + return -EINVAL; |
|---|
| 795 | + } |
|---|
| 796 | + input->shunt_resistor = val; |
|---|
| 797 | + } |
|---|
| 798 | + |
|---|
| 799 | + return 0; |
|---|
| 800 | +} |
|---|
| 801 | + |
|---|
| 802 | +static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina) |
|---|
| 803 | +{ |
|---|
| 804 | + const struct device_node *np = dev->of_node; |
|---|
| 805 | + struct device_node *child; |
|---|
| 806 | + int ret; |
|---|
| 807 | + |
|---|
| 808 | + /* Compatible with non-DT platforms */ |
|---|
| 809 | + if (!np) |
|---|
| 810 | + return 0; |
|---|
| 811 | + |
|---|
| 812 | + ina->single_shot = of_property_read_bool(np, "ti,single-shot"); |
|---|
| 813 | + |
|---|
| 814 | + for_each_child_of_node(np, child) { |
|---|
| 815 | + ret = ina3221_probe_child_from_dt(dev, child, ina); |
|---|
| 816 | + if (ret) { |
|---|
| 817 | + of_node_put(child); |
|---|
| 818 | + return ret; |
|---|
| 819 | + } |
|---|
| 820 | + } |
|---|
| 821 | + |
|---|
| 822 | + return 0; |
|---|
| 823 | +} |
|---|
| 824 | + |
|---|
| 825 | +static int ina3221_probe(struct i2c_client *client) |
|---|
| 375 | 826 | { |
|---|
| 376 | 827 | struct device *dev = &client->dev; |
|---|
| 377 | 828 | struct ina3221_data *ina; |
|---|
| .. | .. |
|---|
| 399 | 850 | } |
|---|
| 400 | 851 | |
|---|
| 401 | 852 | for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
|---|
| 402 | | - ina->shunt_resistors[i] = INA3221_RSHUNT_DEFAULT; |
|---|
| 853 | + ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT; |
|---|
| 403 | 854 | |
|---|
| 855 | + ret = ina3221_probe_from_dt(dev, ina); |
|---|
| 856 | + if (ret) { |
|---|
| 857 | + dev_err(dev, "Unable to probe from device tree\n"); |
|---|
| 858 | + return ret; |
|---|
| 859 | + } |
|---|
| 860 | + |
|---|
| 861 | + /* The driver will be reset, so use reset value */ |
|---|
| 862 | + ina->reg_config = INA3221_CONFIG_DEFAULT; |
|---|
| 863 | + |
|---|
| 864 | + /* Clear continuous bit to use single-shot mode */ |
|---|
| 865 | + if (ina->single_shot) |
|---|
| 866 | + ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS; |
|---|
| 867 | + |
|---|
| 868 | + /* Disable channels if their inputs are disconnected */ |
|---|
| 869 | + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
|---|
| 870 | + if (ina->inputs[i].disconnected) |
|---|
| 871 | + ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i); |
|---|
| 872 | + } |
|---|
| 873 | + |
|---|
| 874 | + /* Initialize summation_shunt_resistor for summation channel control */ |
|---|
| 875 | + ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina); |
|---|
| 876 | + |
|---|
| 877 | + ina->pm_dev = dev; |
|---|
| 878 | + mutex_init(&ina->lock); |
|---|
| 879 | + dev_set_drvdata(dev, ina); |
|---|
| 880 | + |
|---|
| 881 | + /* Enable PM runtime -- status is suspended by default */ |
|---|
| 882 | + pm_runtime_enable(ina->pm_dev); |
|---|
| 883 | + |
|---|
| 884 | + /* Initialize (resume) the device */ |
|---|
| 885 | + for (i = 0; i < INA3221_NUM_CHANNELS; i++) { |
|---|
| 886 | + if (ina->inputs[i].disconnected) |
|---|
| 887 | + continue; |
|---|
| 888 | + /* Match the refcount with number of enabled channels */ |
|---|
| 889 | + ret = pm_runtime_get_sync(ina->pm_dev); |
|---|
| 890 | + if (ret < 0) |
|---|
| 891 | + goto fail; |
|---|
| 892 | + } |
|---|
| 893 | + |
|---|
| 894 | + hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina, |
|---|
| 895 | + &ina3221_chip_info, |
|---|
| 896 | + ina3221_groups); |
|---|
| 897 | + if (IS_ERR(hwmon_dev)) { |
|---|
| 898 | + dev_err(dev, "Unable to register hwmon device\n"); |
|---|
| 899 | + ret = PTR_ERR(hwmon_dev); |
|---|
| 900 | + goto fail; |
|---|
| 901 | + } |
|---|
| 902 | + |
|---|
| 903 | + return 0; |
|---|
| 904 | + |
|---|
| 905 | +fail: |
|---|
| 906 | + pm_runtime_disable(ina->pm_dev); |
|---|
| 907 | + pm_runtime_set_suspended(ina->pm_dev); |
|---|
| 908 | + /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ |
|---|
| 909 | + for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
|---|
| 910 | + pm_runtime_put_noidle(ina->pm_dev); |
|---|
| 911 | + mutex_destroy(&ina->lock); |
|---|
| 912 | + |
|---|
| 913 | + return ret; |
|---|
| 914 | +} |
|---|
| 915 | + |
|---|
| 916 | +static int ina3221_remove(struct i2c_client *client) |
|---|
| 917 | +{ |
|---|
| 918 | + struct ina3221_data *ina = dev_get_drvdata(&client->dev); |
|---|
| 919 | + int i; |
|---|
| 920 | + |
|---|
| 921 | + pm_runtime_disable(ina->pm_dev); |
|---|
| 922 | + pm_runtime_set_suspended(ina->pm_dev); |
|---|
| 923 | + |
|---|
| 924 | + /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */ |
|---|
| 925 | + for (i = 0; i < INA3221_NUM_CHANNELS; i++) |
|---|
| 926 | + pm_runtime_put_noidle(ina->pm_dev); |
|---|
| 927 | + |
|---|
| 928 | + mutex_destroy(&ina->lock); |
|---|
| 929 | + |
|---|
| 930 | + return 0; |
|---|
| 931 | +} |
|---|
| 932 | + |
|---|
| 933 | +static int __maybe_unused ina3221_suspend(struct device *dev) |
|---|
| 934 | +{ |
|---|
| 935 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 936 | + int ret; |
|---|
| 937 | + |
|---|
| 938 | + /* Save config register value and enable cache-only */ |
|---|
| 939 | + ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config); |
|---|
| 940 | + if (ret) |
|---|
| 941 | + return ret; |
|---|
| 942 | + |
|---|
| 943 | + /* Set to power-down mode for power saving */ |
|---|
| 944 | + ret = regmap_update_bits(ina->regmap, INA3221_CONFIG, |
|---|
| 945 | + INA3221_CONFIG_MODE_MASK, |
|---|
| 946 | + INA3221_CONFIG_MODE_POWERDOWN); |
|---|
| 947 | + if (ret) |
|---|
| 948 | + return ret; |
|---|
| 949 | + |
|---|
| 950 | + regcache_cache_only(ina->regmap, true); |
|---|
| 951 | + regcache_mark_dirty(ina->regmap); |
|---|
| 952 | + |
|---|
| 953 | + return 0; |
|---|
| 954 | +} |
|---|
| 955 | + |
|---|
| 956 | +static int __maybe_unused ina3221_resume(struct device *dev) |
|---|
| 957 | +{ |
|---|
| 958 | + struct ina3221_data *ina = dev_get_drvdata(dev); |
|---|
| 959 | + int ret; |
|---|
| 960 | + |
|---|
| 961 | + regcache_cache_only(ina->regmap, false); |
|---|
| 962 | + |
|---|
| 963 | + /* Software reset the chip */ |
|---|
| 404 | 964 | ret = regmap_field_write(ina->fields[F_RST], true); |
|---|
| 405 | 965 | if (ret) { |
|---|
| 406 | 966 | dev_err(dev, "Unable to reset device\n"); |
|---|
| 407 | 967 | return ret; |
|---|
| 408 | 968 | } |
|---|
| 409 | 969 | |
|---|
| 410 | | - hwmon_dev = devm_hwmon_device_register_with_groups(dev, |
|---|
| 411 | | - client->name, |
|---|
| 412 | | - ina, ina3221_groups); |
|---|
| 413 | | - if (IS_ERR(hwmon_dev)) { |
|---|
| 414 | | - dev_err(dev, "Unable to register hwmon device\n"); |
|---|
| 415 | | - return PTR_ERR(hwmon_dev); |
|---|
| 970 | + /* Restore cached register values to hardware */ |
|---|
| 971 | + ret = regcache_sync(ina->regmap); |
|---|
| 972 | + if (ret) |
|---|
| 973 | + return ret; |
|---|
| 974 | + |
|---|
| 975 | + /* Restore config register value to hardware */ |
|---|
| 976 | + ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config); |
|---|
| 977 | + if (ret) |
|---|
| 978 | + return ret; |
|---|
| 979 | + |
|---|
| 980 | + /* Initialize summation channel control */ |
|---|
| 981 | + if (ina->summation_shunt_resistor) { |
|---|
| 982 | + /* |
|---|
| 983 | + * Take all three channels into summation by default |
|---|
| 984 | + * Shunt measurements of disconnected channels should |
|---|
| 985 | + * be 0, so it does not matter for summation. |
|---|
| 986 | + */ |
|---|
| 987 | + ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE, |
|---|
| 988 | + INA3221_MASK_ENABLE_SCC_MASK, |
|---|
| 989 | + INA3221_MASK_ENABLE_SCC_MASK); |
|---|
| 990 | + if (ret) { |
|---|
| 991 | + dev_err(dev, "Unable to control summation channel\n"); |
|---|
| 992 | + return ret; |
|---|
| 993 | + } |
|---|
| 416 | 994 | } |
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| 417 | 995 | |
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| 418 | 996 | return 0; |
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| 419 | 997 | } |
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| 998 | + |
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| 999 | +static const struct dev_pm_ops ina3221_pm = { |
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| 1000 | + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
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| 1001 | + pm_runtime_force_resume) |
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| 1002 | + SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL) |
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| 1003 | +}; |
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| 420 | 1004 | |
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| 421 | 1005 | static const struct of_device_id ina3221_of_match_table[] = { |
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| 422 | 1006 | { .compatible = "ti,ina3221", }, |
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| .. | .. |
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| 431 | 1015 | MODULE_DEVICE_TABLE(i2c, ina3221_ids); |
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| 432 | 1016 | |
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| 433 | 1017 | static struct i2c_driver ina3221_i2c_driver = { |
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| 434 | | - .probe = ina3221_probe, |
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| 1018 | + .probe_new = ina3221_probe, |
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| 1019 | + .remove = ina3221_remove, |
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| 435 | 1020 | .driver = { |
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| 436 | 1021 | .name = INA3221_DRIVER_NAME, |
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| 437 | 1022 | .of_match_table = ina3221_of_match_table, |
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| 1023 | + .pm = &ina3221_pm, |
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| 438 | 1024 | }, |
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| 439 | 1025 | .id_table = ina3221_ids, |
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| 440 | 1026 | }; |
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