~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,102 +1,284 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3	4	* Author:Mark Yao <mark.yao@rock-chips.com>
4	5	*
5	6	* based on exynos_drm_drv.c
6		- *
7		- * This software is licensed under the terms of the GNU General Public
8		- * License version 2, as published by the Free Software Foundation, and
9		- * may be copied, distributed, and modified under those terms.
10		- *
11		- * This program is distributed in the hope that it will be useful,
12		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14		- * GNU General Public License for more details.
15	7	*/
16	8
17		-#include <drm/drmP.h>
18		-#include <drm/drm_atomic.h>
19		-#include <drm/drm_crtc_helper.h>
20		-#include <drm/drm_fb_helper.h>
21		-#include <drm/drm_gem_cma_helper.h>
22		-#include <drm/drm_of.h>
23		-#include <linux/devfreq.h>
24		-#include <linux/dma-buf.h>
	9	+#include <linux/dma-buf-cache.h>
25	10	#include <linux/dma-mapping.h>
26	11	#include <linux/dma-iommu.h>
27	12	#include <linux/genalloc.h>
28	13	#include <linux/pm_runtime.h>
29		-#include <linux/memblock.h>
30	14	#include <linux/module.h>
31	15	#include <linux/of_address.h>
32	16	#include <linux/of_graph.h>
	17	+#include <linux/of_platform.h>
33	18	#include <linux/clk.h>
34		-#include <linux/clk-provider.h>
35	19	#include <linux/component.h>
36	20	#include <linux/console.h>
37	21	#include <linux/iommu.h>
38	22	#include <linux/of_reserved_mem.h>
39	23
	24	+#include <drm/drm_debugfs.h>
	25	+#include <drm/drm_drv.h>
	26	+#include <drm/drm_displayid.h>
	27	+#include <drm/drm_fb_helper.h>
	28	+#include <drm/drm_gem_cma_helper.h>
	29	+#include <drm/drm_of.h>
	30	+#include <drm/drm_probe_helper.h>
	31	+#include <drm/drm_vblank.h>
	32	+
40	33	#include "rockchip_drm_drv.h"
41	34	#include "rockchip_drm_fb.h"
42	35	#include "rockchip_drm_fbdev.h"
43	36	#include "rockchip_drm_gem.h"
	37	+#include "rockchip_drm_logo.h"
44	38
45		-#include "../drm_internal.h"
	39	+#include "../drm_crtc_internal.h"
	40	+#include "../drivers/clk/rockchip/clk.h"
46	41
47	42	#define DRIVER_NAME "rockchip"
48	43	#define DRIVER_DESC "RockChip Soc DRM"
49	44	#define DRIVER_DATE "20140818"
50		-#define DRIVER_MAJOR 2
	45	+#define DRIVER_MAJOR 3
51	46	#define DRIVER_MINOR 0
52		-#define DRIVER_PATCH 0
53		-
54		-/***********************************************************************
55		- * Rockchip DRM driver version
56		- *
57		- * v2.0.0 : add basic version for linux 4.19 rockchip drm driver(hjc)
58		- *
59		- **********************************************************************/
60	47
61	48	#if IS_ENABLED(CONFIG_DRM_ROCKCHIP_VVOP)
62	49	static bool is_support_iommu = false;
63	50	#else
64	51	static bool is_support_iommu = true;
65	52	#endif
	53	+static bool iommu_reserve_map;
	54	+
66	55	static struct drm_driver rockchip_drm_driver;
67	56
68		-struct rockchip_drm_mode_set {
69		- struct list_head head;
70		- struct drm_framebuffer *fb;
71		- struct drm_connector *connector;
72		- struct drm_crtc *crtc;
73		- struct drm_display_mode *mode;
74		- int clock;
75		- int hdisplay;
76		- int vdisplay;
77		- int vrefresh;
78		- int flags;
79		- int picture_aspect_ratio;
80		- int crtc_hsync_end;
81		- int crtc_vsync_end;
	57	+static unsigned int drm_debug;
	58	+module_param_named(debug, drm_debug, int, 0600);
82	59
83		- int left_margin;
84		- int right_margin;
85		- int top_margin;
86		- int bottom_margin;
	60	+static inline bool rockchip_drm_debug_enabled(enum rockchip_drm_debug_category category)
	61	+{
	62	+ return unlikely(drm_debug & category);
	63	+}
87	64
88		- unsigned int brightness;
89		- unsigned int contrast;
90		- unsigned int saturation;
91		- unsigned int hue;
	65	+__printf(3, 4)
	66	+void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category,
	67	+ const char *format, ...)
	68	+{
	69	+ struct va_format vaf;
	70	+ va_list args;
92	71
93		- bool mode_changed;
94		- bool force_output;
95		- int ratio;
96		-};
	72	+ if (!rockchip_drm_debug_enabled(category))
	73	+ return;
	74	+
	75	+ va_start(args, format);
	76	+ vaf.fmt = format;
	77	+ vaf.va = &args;
	78	+
	79	+ if (dev)
	80	+ dev_printk(KERN_DEBUG, dev, "%pV", &vaf);
	81	+ else
	82	+ printk(KERN_DEBUG "%pV", &vaf);
	83	+
	84	+ va_end(args);
	85	+}
	86	+
	87	+/**
	88	+ * rockchip_drm_wait_vact_end
	89	+ * @crtc: CRTC to enable line flag
	90	+ * @mstimeout: millisecond for timeout
	91	+ *
	92	+ * Wait for vact_end line flag irq or timeout.
	93	+ *
	94	+ * Returns:
	95	+ * Zero on success, negative errno on failure.
	96	+ */
	97	+int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)
	98	+{
	99	+ struct rockchip_drm_private *priv;
	100	+ int pipe, ret = 0;
	101	+
	102	+ if (!crtc)
	103	+ return -ENODEV;
	104	+
	105	+ if (mstimeout <= 0)
	106	+ return -EINVAL;
	107	+
	108	+ priv = crtc->dev->dev_private;
	109	+ pipe = drm_crtc_index(crtc);
	110	+
	111	+ if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->wait_vact_end)
	112	+ ret = priv->crtc_funcs[pipe]->wait_vact_end(crtc, mstimeout);
	113	+
	114	+ return ret;
	115	+}
	116	+EXPORT_SYMBOL(rockchip_drm_wait_vact_end);
	117	+
	118	+void drm_mode_convert_to_split_mode(struct drm_display_mode *mode)
	119	+{
	120	+ u16 hactive, hfp, hsync, hbp;
	121	+
	122	+ hactive = mode->hdisplay;
	123	+ hfp = mode->hsync_start - mode->hdisplay;
	124	+ hsync = mode->hsync_end - mode->hsync_start;
	125	+ hbp = mode->htotal - mode->hsync_end;
	126	+
	127	+ mode->clock *= 2;
	128	+ mode->crtc_clock *= 2;
	129	+ mode->hdisplay = hactive * 2;
	130	+ mode->hsync_start = mode->hdisplay + hfp * 2;
	131	+ mode->hsync_end = mode->hsync_start + hsync * 2;
	132	+ mode->htotal = mode->hsync_end + hbp * 2;
	133	+ drm_mode_set_name(mode);
	134	+}
	135	+EXPORT_SYMBOL(drm_mode_convert_to_split_mode);
	136	+
	137	+void drm_mode_convert_to_origin_mode(struct drm_display_mode *mode)
	138	+{
	139	+ u16 hactive, hfp, hsync, hbp;
	140	+
	141	+ hactive = mode->hdisplay;
	142	+ hfp = mode->hsync_start - mode->hdisplay;
	143	+ hsync = mode->hsync_end - mode->hsync_start;
	144	+ hbp = mode->htotal - mode->hsync_end;
	145	+
	146	+ mode->clock /= 2;
	147	+ mode->crtc_clock /= 2;
	148	+ mode->hdisplay = hactive / 2;
	149	+ mode->hsync_start = mode->hdisplay + hfp / 2;
	150	+ mode->hsync_end = mode->hsync_start + hsync / 2;
	151	+ mode->htotal = mode->hsync_end + hbp / 2;
	152	+}
	153	+EXPORT_SYMBOL(drm_mode_convert_to_origin_mode);
	154	+
	155	+/**
	156	+ * drm_connector_oob_hotplug_event - Report out-of-band hotplug event to connector
	157	+ * @connector: connector to report the event on
	158	+ *
	159	+ * On some hardware a hotplug event notification may come from outside the display
	160	+ * driver / device. An example of this is some USB Type-C setups where the hardware
	161	+ * muxes the DisplayPort data and aux-lines but does not pass the altmode HPD
	162	+ * status bit to the GPU's DP HPD pin.
	163	+ *
	164	+ * This function can be used to report these out-of-band events after obtaining
	165	+ * a drm_connector reference through calling drm_connector_find_by_fwnode().
	166	+ */
	167	+void drm_connector_oob_hotplug_event(struct fwnode_handle *connector_fwnode)
	168	+{
	169	+ struct rockchip_drm_sub_dev *sub_dev;
	170	+
	171	+ if (!connector_fwnode \|\| !connector_fwnode->dev)
	172	+ return;
	173	+
	174	+ sub_dev = rockchip_drm_get_sub_dev(dev_of_node(connector_fwnode->dev));
	175	+
	176	+ if (sub_dev && sub_dev->connector && sub_dev->oob_hotplug_event)
	177	+ sub_dev->oob_hotplug_event(sub_dev->connector);
	178	+}
	179	+EXPORT_SYMBOL(drm_connector_oob_hotplug_event);
	180	+
	181	+uint32_t rockchip_drm_get_bpp(const struct drm_format_info *info)
	182	+{
	183	+ /* use whatever a driver has set */
	184	+ if (info->cpp[0])
	185	+ return info->cpp[0] * 8;
	186	+
	187	+ switch (info->format) {
	188	+ case DRM_FORMAT_YUV420_8BIT:
	189	+ return 12;
	190	+ case DRM_FORMAT_YUV420_10BIT:
	191	+ return 15;
	192	+ case DRM_FORMAT_VUY101010:
	193	+ return 30;
	194	+ default:
	195	+ break;
	196	+ }
	197	+
	198	+ /* all attempts failed */
	199	+ return 0;
	200	+}
	201	+EXPORT_SYMBOL(rockchip_drm_get_bpp);
	202	+
	203	+uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format)
	204	+{
	205	+ switch (bus_format) {
	206	+ case MEDIA_BUS_FMT_RGB565_1X16:
	207	+ case MEDIA_BUS_FMT_RGB666_1X18:
	208	+ case MEDIA_BUS_FMT_RGB888_1X24:
	209	+ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
	210	+ return 1;
	211	+ case MEDIA_BUS_FMT_RGB565_2X8_LE:
	212	+ case MEDIA_BUS_FMT_BGR565_2X8_LE:
	213	+ return 2;
	214	+ case MEDIA_BUS_FMT_RGB666_3X6:
	215	+ case MEDIA_BUS_FMT_RGB888_3X8:
	216	+ case MEDIA_BUS_FMT_BGR888_3X8:
	217	+ return 3;
	218	+ case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
	219	+ case MEDIA_BUS_FMT_BGR888_DUMMY_4X8:
	220	+ return 4;
	221	+ default:
	222	+ return 1;
	223	+ }
	224	+}
	225	+EXPORT_SYMBOL(rockchip_drm_get_cycles_per_pixel);
	226	+
	227	+/**
	228	+ * rockchip_drm_of_find_possible_crtcs - find the possible CRTCs for an active
	229	+ * encoder port
	230	+ * @dev: DRM device
	231	+ * @port: encoder port to scan for endpoints
	232	+ *
	233	+ * Scan all active endpoints attached to a port, locate their attached CRTCs,
	234	+ * and generate the DRM mask of CRTCs which may be attached to this
	235	+ * encoder.
	236	+ *
	237	+ * See Documentation/devicetree/bindings/graph.txt for the bindings.
	238	+ */
	239	+uint32_t rockchip_drm_of_find_possible_crtcs(struct drm_device *dev,
	240	+ struct device_node *port)
	241	+{
	242	+ struct device_node remote_port, ep;
	243	+ uint32_t possible_crtcs = 0;
	244	+
	245	+ for_each_endpoint_of_node(port, ep) {
	246	+ if (!of_device_is_available(ep))
	247	+ continue;
	248	+
	249	+ remote_port = of_graph_get_remote_port(ep);
	250	+ if (!remote_port) {
	251	+ of_node_put(ep);
	252	+ continue;
	253	+ }
	254	+
	255	+ possible_crtcs \|= drm_of_crtc_port_mask(dev, remote_port);
	256	+
	257	+ of_node_put(remote_port);
	258	+ }
	259	+
	260	+ return possible_crtcs;
	261	+}
	262	+EXPORT_SYMBOL(rockchip_drm_of_find_possible_crtcs);
97	263
98	264	static DEFINE_MUTEX(rockchip_drm_sub_dev_lock);
99	265	static LIST_HEAD(rockchip_drm_sub_dev_list);
	266	+
	267	+void rockchip_connector_update_vfp_for_vrr(struct drm_crtc crtc, struct drm_display_mode mode,
	268	+ int vfp)
	269	+{
	270	+ struct rockchip_drm_sub_dev *sub_dev;
	271	+
	272	+ mutex_lock(&rockchip_drm_sub_dev_lock);
	273	+ list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
	274	+ if (sub_dev->connector->state->crtc == crtc) {
	275	+ if (sub_dev->update_vfp_for_vrr)
	276	+ sub_dev->update_vfp_for_vrr(sub_dev->connector, mode, vfp);
	277	+ }
	278	+ }
	279	+ mutex_unlock(&rockchip_drm_sub_dev_lock);
	280	+}
	281	+EXPORT_SYMBOL(rockchip_connector_update_vfp_for_vrr);
100	282
101	283	void rockchip_drm_register_sub_dev(struct rockchip_drm_sub_dev *sub_dev)
102	284	{
..	..	@@ -150,6 +332,26 @@
150	332	}
151	333	EXPORT_SYMBOL(rockchip_drm_get_sub_dev_type);
152	334
	335	+u32 rockchip_drm_get_scan_line_time_ns(void)
	336	+{
	337	+ struct rockchip_drm_sub_dev *sub_dev = NULL;
	338	+ struct drm_display_mode *mode;
	339	+ int linedur_ns = 0;
	340	+
	341	+ mutex_lock(&rockchip_drm_sub_dev_lock);
	342	+ list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
	343	+ if (sub_dev->connector->encoder && sub_dev->connector->state->crtc) {
	344	+ mode = &sub_dev->connector->state->crtc->state->adjusted_mode;
	345	+ linedur_ns = div_u64((u64) mode->crtc_htotal * 1000000, mode->crtc_clock);
	346	+ break;
	347	+ }
	348	+ }
	349	+ mutex_unlock(&rockchip_drm_sub_dev_lock);
	350	+
	351	+ return linedur_ns;
	352	+}
	353	+EXPORT_SYMBOL(rockchip_drm_get_scan_line_time_ns);
	354	+
153	355	void rockchip_drm_te_handle(struct drm_crtc *crtc)
154	356	{
155	357	struct rockchip_drm_private *priv = crtc->dev->dev_private;
..	..	@@ -165,22 +367,22 @@
165	367	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
166	368	1430, 1650, 0, 720, 725, 730, 750, 0,
167	369	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
168		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	370	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
169	371	/* 16 - 1920x1080@60Hz 16:9 */
170	372	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
171	373	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
172	374	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
173		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	375	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
174	376	/* 31 - 1920x1080@50Hz 16:9 */
175	377	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
176	378	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
177	379	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
178		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	380	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
179	381	/* 19 - 1280x720@50Hz 16:9 */
180	382	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
181	383	1760, 1980, 0, 720, 725, 730, 750, 0,
182	384	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
183		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	385	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
184	386	/* 0x10 - 1024x768@60Hz */
185	387	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
186	388	1184, 1344, 0, 768, 771, 777, 806, 0,
..	..	@@ -189,12 +391,12 @@
189	391	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
190	392	796, 864, 0, 576, 581, 586, 625, 0,
191	393	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
192		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	394	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
193	395	/* 2 - 720x480@60Hz 4:3 */
194	396	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
195	397	798, 858, 0, 480, 489, 495, 525, 0,
196	398	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
197		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	399	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
198	400	};
199	401
200	402	int rockchip_drm_add_modes_noedid(struct drm_connector *connector)
..	..	@@ -223,1013 +425,638 @@
223	425	}
224	426	EXPORT_SYMBOL(rockchip_drm_add_modes_noedid);
225	427
226		-#ifdef CONFIG_ARCH_ROCKCHIP
227		-struct drm_prime_callback_data {
228		- struct drm_gem_object *obj;
229		- struct sg_table *sgt;
	428	+static const struct rockchip_drm_width_dclk {
	429	+ int width;
	430	+ u32 dclk_khz;
	431	+} rockchip_drm_dclk[] = {
	432	+ {1920, 148500},
	433	+ {2048, 200000},
	434	+ {2560, 280000},
	435	+ {3840, 594000},
	436	+ {4096, 594000},
	437	+ {7680, 2376000},
230	438	};
231		-#endif
232	439
233		-#ifndef MODULE
234		-static struct drm_crtc find_crtc_by_node(struct drm_device drm_dev, struct device_node *node)
	440	+u32 rockchip_drm_get_dclk_by_width(int width)
235	441	{
236		- struct device_node *np_crtc;
237		- struct drm_crtc *crtc;
	442	+ int i = 0;
	443	+ u32 dclk_khz;
238	444
239		- np_crtc = of_get_parent(node);
240		- if (!np_crtc \|\| !of_device_is_available(np_crtc))
	445	+ for (i = 0; i < ARRAY_SIZE(rockchip_drm_dclk); i++) {
	446	+ if (width == rockchip_drm_dclk[i].width) {
	447	+ dclk_khz = rockchip_drm_dclk[i].dclk_khz;
	448	+ break;
	449	+ }
	450	+ }
	451	+
	452	+ if (i == ARRAY_SIZE(rockchip_drm_dclk)) {
	453	+ DRM_ERROR("Can't not find %d width solution and use 148500 khz as max dclk\n", width);
	454	+
	455	+ dclk_khz = 148500;
	456	+ }
	457	+
	458	+ return dclk_khz;
	459	+}
	460	+EXPORT_SYMBOL(rockchip_drm_get_dclk_by_width);
	461	+
	462	+static int
	463	+cea_db_tag(const u8 *db)
	464	+{
	465	+ return db[0] >> 5;
	466	+}
	467	+
	468	+static int
	469	+cea_db_payload_len(const u8 *db)
	470	+{
	471	+ return db[0] & 0x1f;
	472	+}
	473	+
	474	+#define for_each_cea_db(cea, i, start, end) \
	475	+ for ((i) = (start); \
	476	+ (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); \
	477	+ (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
	478	+
	479	+#define HDMI_NEXT_HDR_VSDB_OUI 0xd04601
	480	+
	481	+static bool cea_db_is_hdmi_next_hdr_block(const u8 *db)
	482	+{
	483	+ unsigned int oui;
	484	+
	485	+ if (cea_db_tag(db) != 0x07)
	486	+ return false;
	487	+
	488	+ if (cea_db_payload_len(db) < 11)
	489	+ return false;
	490	+
	491	+ oui = db[3] << 16 \| db[2] << 8 \| db[1];
	492	+
	493	+ return oui == HDMI_NEXT_HDR_VSDB_OUI;
	494	+}
	495	+
	496	+static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
	497	+{
	498	+ unsigned int oui;
	499	+
	500	+ if (cea_db_tag(db) != 0x03)
	501	+ return false;
	502	+
	503	+ if (cea_db_payload_len(db) < 7)
	504	+ return false;
	505	+
	506	+ oui = db[3] << 16 \| db[2] << 8 \| db[1];
	507	+
	508	+ return oui == HDMI_FORUM_IEEE_OUI;
	509	+}
	510	+
	511	+static int
	512	+cea_db_offsets(const u8 cea, int start, int *end)
	513	+{
	514	+ /* DisplayID CTA extension blocks and top-level CEA EDID
	515	+ * block header definitions differ in the following bytes:
	516	+ * 1) Byte 2 of the header specifies length differently,
	517	+ * 2) Byte 3 is only present in the CEA top level block.
	518	+ *
	519	+ * The different definitions for byte 2 follow.
	520	+ *
	521	+ * DisplayID CTA extension block defines byte 2 as:
	522	+ * Number of payload bytes
	523	+ *
	524	+ * CEA EDID block defines byte 2 as:
	525	+ * Byte number (decimal) within this block where the 18-byte
	526	+ * DTDs begin. If no non-DTD data is present in this extension
	527	+ * block, the value should be set to 04h (the byte after next).
	528	+ * If set to 00h, there are no DTDs present in this block and
	529	+ * no non-DTD data.
	530	+ */
	531	+ if (cea[0] == 0x81) {
	532	+ /*
	533	+ * for_each_displayid_db() has already verified
	534	+ * that these stay within expected bounds.
	535	+ */
	536	+ *start = 3;
	537	+ end = start + cea[2];
	538	+ } else if (cea[0] == 0x02) {
	539	+ /* Data block offset in CEA extension block */
	540	+ *start = 4;
	541	+ *end = cea[2];
	542	+ if (*end == 0)
	543	+ *end = 127;
	544	+ if (end < 4 \|\| end > 127)
	545	+ return -ERANGE;
	546	+ } else {
	547	+ return -EOPNOTSUPP;
	548	+ }
	549	+
	550	+ return 0;
	551	+}
	552	+
	553	+static u8 find_edid_extension(const struct edid edid,
	554	+ int ext_id, int *ext_index)
	555	+{
	556	+ u8 *edid_ext = NULL;
	557	+ int i;
	558	+
	559	+ /* No EDID or EDID extensions */
	560	+ if (edid == NULL \|\| edid->extensions == 0)
241	561	return NULL;
242	562
243		- drm_for_each_crtc(crtc, drm_dev) {
244		- if (crtc->port == np_crtc)
245		- return crtc;
	563	+ /* Find CEA extension */
	564	+ for (i = *ext_index; i < edid->extensions; i++) {
	565	+ edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
	566	+ if (edid_ext[0] == ext_id)
	567	+ break;
	568	+ }
	569	+
	570	+ if (i >= edid->extensions)
	571	+ return NULL;
	572	+
	573	+ *ext_index = i + 1;
	574	+
	575	+ return edid_ext;
	576	+}
	577	+
	578	+static int validate_displayid(u8 *displayid, int length, int idx)
	579	+{
	580	+ int i, dispid_length;
	581	+ u8 csum = 0;
	582	+ struct displayid_hdr *base;
	583	+
	584	+ base = (struct displayid_hdr *)&displayid[idx];
	585	+
	586	+ DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
	587	+ base->rev, base->bytes, base->prod_id, base->ext_count);
	588	+
	589	+ /* +1 for DispID checksum */
	590	+ dispid_length = sizeof(*base) + base->bytes + 1;
	591	+ if (dispid_length > length - idx)
	592	+ return -EINVAL;
	593	+
	594	+ for (i = 0; i < dispid_length; i++)
	595	+ csum += displayid[idx + i];
	596	+ if (csum) {
	597	+ DRM_NOTE("DisplayID checksum invalid, remainder is %d\n", csum);
	598	+ return -EINVAL;
	599	+ }
	600	+
	601	+ return 0;
	602	+}
	603	+
	604	+static u8 find_displayid_extension(const struct edid edid,
	605	+ int length, int idx,
	606	+ int *ext_index)
	607	+{
	608	+ u8 *displayid = find_edid_extension(edid, 0x70, ext_index);
	609	+ struct displayid_hdr *base;
	610	+ int ret;
	611	+
	612	+ if (!displayid)
	613	+ return NULL;
	614	+
	615	+ /* EDID extensions block checksum isn't for us */
	616	+ *length = EDID_LENGTH - 1;
	617	+ *idx = 1;
	618	+
	619	+ ret = validate_displayid(displayid, length, idx);
	620	+ if (ret)
	621	+ return NULL;
	622	+
	623	+ base = (struct displayid_hdr )&displayid[idx];
	624	+ length = idx + sizeof(*base) + base->bytes;
	625	+
	626	+ return displayid;
	627	+}
	628	+
	629	+static u8 find_cea_extension(const struct edid edid)
	630	+{
	631	+ int length, idx;
	632	+ struct displayid_block *block;
	633	+ u8 *cea;
	634	+ u8 *displayid;
	635	+ int ext_index;
	636	+
	637	+ /* Look for a top level CEA extension block */
	638	+ /* FIXME: make callers iterate through multiple CEA ext blocks? */
	639	+ ext_index = 0;
	640	+ cea = find_edid_extension(edid, 0x02, &ext_index);
	641	+ if (cea)
	642	+ return cea;
	643	+
	644	+ /* CEA blocks can also be found embedded in a DisplayID block */
	645	+ ext_index = 0;
	646	+ for (;;) {
	647	+ displayid = find_displayid_extension(edid, &length, &idx,
	648	+ &ext_index);
	649	+ if (!displayid)
	650	+ return NULL;
	651	+
	652	+ idx += sizeof(struct displayid_hdr);
	653	+ for_each_displayid_db(displayid, block, idx, length) {
	654	+ if (block->tag == 0x81)
	655	+ return (u8 *)block;
	656	+ }
246	657	}
247	658
248	659	return NULL;
249	660	}
250	661
251		-static struct drm_connector find_connector_by_node(struct drm_device drm_dev,
252		- struct device_node *node)
	662	+#define EDID_CEA_YCRCB422 (1 << 4)
	663	+
	664	+int rockchip_drm_get_yuv422_format(struct drm_connector *connector,
	665	+ struct edid *edid)
253	666	{
254		- struct device_node *np_connector;
255		- struct rockchip_drm_sub_dev *sub_dev;
	667	+ struct drm_display_info *info;
	668	+ const u8 *edid_ext;
256	669
257		- np_connector = of_graph_get_remote_port_parent(node);
258		- if (!np_connector \|\| !of_device_is_available(np_connector))
259		- return NULL;
	670	+ if (!connector \|\| !edid)
	671	+ return -EINVAL;
260	672
261		- sub_dev = rockchip_drm_get_sub_dev(np_connector);
262		- if (!sub_dev)
263		- return NULL;
	673	+ info = &connector->display_info;
264	674
265		- return sub_dev->connector;
266		-}
	675	+ edid_ext = find_cea_extension(edid);
	676	+ if (!edid_ext)
	677	+ return -EINVAL;
267	678
268		-static struct drm_connector find_connector_by_bridge(struct drm_device drm_dev,
269		- struct device_node *node)
270		-{
271		- struct device_node np_encoder, np_connector = NULL;
272		- struct drm_connector *connector = NULL;
273		- struct device_node port, endpoint;
274		- struct rockchip_drm_sub_dev *sub_dev;
275		-
276		- np_encoder = of_graph_get_remote_port_parent(node);
277		- if (!np_encoder \|\| !of_device_is_available(np_encoder))
278		- goto err_put_encoder;
279		-
280		- port = of_graph_get_port_by_id(np_encoder, 1);
281		- if (!port) {
282		- dev_err(drm_dev->dev, "can't found port point!\n");
283		- goto err_put_encoder;
284		- }
285		-
286		- for_each_child_of_node(port, endpoint) {
287		- np_connector = of_graph_get_remote_port_parent(endpoint);
288		- if (!np_connector) {
289		- dev_err(drm_dev->dev,
290		- "can't found connector node, please init!\n");
291		- goto err_put_port;
292		- }
293		- if (!of_device_is_available(np_connector)) {
294		- of_node_put(np_connector);
295		- np_connector = NULL;
296		- continue;
297		- } else {
298		- break;
299		- }
300		- }
301		- if (!np_connector) {
302		- dev_err(drm_dev->dev, "can't found available connector node!\n");
303		- goto err_put_port;
304		- }
305		-
306		- sub_dev = rockchip_drm_get_sub_dev(np_connector);
307		- if (!sub_dev)
308		- goto err_put_port;
309		- connector = sub_dev->connector;
310		-
311		- of_node_put(np_connector);
312		-err_put_port:
313		- of_node_put(port);
314		-err_put_encoder:
315		- of_node_put(np_encoder);
316		-
317		- return connector;
318		-}
319		-
320		-void rockchip_free_loader_memory(struct drm_device *drm)
321		-{
322		- struct rockchip_drm_private *private = drm->dev_private;
323		- struct rockchip_logo *logo;
324		- void start, end;
325		-
326		- if (!private \|\| !private->logo \|\| --private->logo->count)
327		- return;
328		-
329		- logo = private->logo;
330		- start = phys_to_virt(logo->dma_addr);
331		- end = phys_to_virt(logo->dma_addr + logo->size);
332		-
333		- if (private->domain) {
334		- u32 pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
335		-
336		- iommu_unmap(private->domain, logo->dma_addr, ALIGN(logo->size, pg_size));
337		- }
338		-
339		- memblock_free(logo->start, logo->size);
340		- free_reserved_area(start, end, -1, "drm_logo");
341		- kfree(logo);
342		- private->logo = NULL;
343		- private->loader_protect = false;
344		-}
345		-
346		-static int init_loader_memory(struct drm_device *drm_dev)
347		-{
348		- struct rockchip_drm_private *private = drm_dev->dev_private;
349		- struct rockchip_logo *logo;
350		- struct device_node *np = drm_dev->dev->of_node;
351		- struct device_node *node;
352		- phys_addr_t start, size;
353		- u32 pg_size = PAGE_SIZE;
354		- struct resource res;
355		- int ret, idx;
356		-
357		- idx = of_property_match_string(np, "memory-region-names", "drm-logo");
358		- if (idx >= 0)
359		- node = of_parse_phandle(np, "memory-region", idx);
360		- else
361		- node = of_parse_phandle(np, "logo-memory-region", 0);
362		- if (!node)
363		- return -ENOMEM;
364		-
365		- ret = of_address_to_resource(node, 0, &res);
366		- if (ret)
367		- return ret;
368		- if (private->domain)
369		- pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
370		- start = ALIGN_DOWN(res.start, pg_size);
371		- size = resource_size(&res);
372		- if (!size)
373		- return -ENOMEM;
374		-
375		- logo = kmalloc(sizeof(*logo), GFP_KERNEL);
376		- if (!logo)
377		- return -ENOMEM;
378		-
379		- logo->kvaddr = phys_to_virt(start);
380		-
381		- if (private->domain) {
382		- ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
383		- IOMMU_WRITE \| IOMMU_READ);
384		- if (ret) {
385		- dev_err(drm_dev->dev, "failed to create 1v1 mapping\n");
386		- goto err_free_logo;
387		- }
388		- }
389		-
390		- logo->dma_addr = start;
391		- logo->size = size;
392		- logo->count = 1;
393		- private->logo = logo;
394		-
395		- idx = of_property_match_string(np, "memory-region-names", "drm-cubic-lut");
396		- if (idx < 0)
397		- return 0;
398		-
399		- node = of_parse_phandle(np, "memory-region", idx);
400		- if (!node)
401		- return -ENOMEM;
402		-
403		- ret = of_address_to_resource(node, 0, &res);
404		- if (ret)
405		- return ret;
406		- start = ALIGN_DOWN(res.start, pg_size);
407		- size = resource_size(&res);
408		- if (!size)
409		- return 0;
410		-
411		- private->cubic_lut_kvaddr = phys_to_virt(start);
412		- if (private->domain) {
413		- ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
414		- IOMMU_WRITE \| IOMMU_READ);
415		- if (ret) {
416		- dev_err(drm_dev->dev, "failed to create 1v1 mapping for cubic lut\n");
417		- goto err_free_logo;
418		- }
419		- }
420		- private->cubic_lut_dma_addr = start;
	679	+ if (edid_ext[3] & EDID_CEA_YCRCB422)
	680	+ info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
421	681
422	682	return 0;
423		-
424		-err_free_logo:
425		- kfree(logo);
426		-
427		- return ret;
428	683	}
	684	+EXPORT_SYMBOL(rockchip_drm_get_yuv422_format);
429	685
430		-static struct drm_framebuffer *
431		-get_framebuffer_by_node(struct drm_device drm_dev, struct device_node node)
	686	+static
	687	+void get_max_frl_rate(int max_frl_rate, u8 max_lanes, u8 max_rate_per_lane)
432	688	{
433		- struct rockchip_drm_private *private = drm_dev->dev_private;
434		- struct drm_mode_fb_cmd2 mode_cmd = { 0 };
435		- u32 val;
436		- int bpp;
437		-
438		- if (WARN_ON(!private->logo))
439		- return NULL;
440		-
441		- if (of_property_read_u32(node, "logo,offset", &val)) {
442		- pr_err("%s: failed to get logo,offset\n", __func__);
443		- return NULL;
444		- }
445		- mode_cmd.offsets[0] = val;
446		-
447		- if (of_property_read_u32(node, "logo,width", &val)) {
448		- pr_err("%s: failed to get logo,width\n", __func__);
449		- return NULL;
450		- }
451		- mode_cmd.width = val;
452		-
453		- if (of_property_read_u32(node, "logo,height", &val)) {
454		- pr_err("%s: failed to get logo,height\n", __func__);
455		- return NULL;
456		- }
457		- mode_cmd.height = val;
458		-
459		- if (of_property_read_u32(node, "logo,bpp", &val)) {
460		- pr_err("%s: failed to get logo,bpp\n", __func__);
461		- return NULL;
462		- }
463		- bpp = val;
464		-
465		- mode_cmd.pitches[0] = ALIGN(mode_cmd.width * bpp, 32) / 8;
466		-
467		- switch (bpp) {
468		- case 16:
469		- mode_cmd.pixel_format = DRM_FORMAT_RGB565;
	689	+ switch (max_frl_rate) {
	690	+ case 1:
	691	+ *max_lanes = 3;
	692	+ *max_rate_per_lane = 3;
470	693	break;
471		- case 24:
472		- mode_cmd.pixel_format = DRM_FORMAT_RGB888;
	694	+ case 2:
	695	+ *max_lanes = 3;
	696	+ *max_rate_per_lane = 6;
473	697	break;
474		- case 32:
475		- mode_cmd.pixel_format = DRM_FORMAT_XRGB8888;
	698	+ case 3:
	699	+ *max_lanes = 4;
	700	+ *max_rate_per_lane = 6;
476	701	break;
	702	+ case 4:
	703	+ *max_lanes = 4;
	704	+ *max_rate_per_lane = 8;
	705	+ break;
	706	+ case 5:
	707	+ *max_lanes = 4;
	708	+ *max_rate_per_lane = 10;
	709	+ break;
	710	+ case 6:
	711	+ *max_lanes = 4;
	712	+ *max_rate_per_lane = 12;
	713	+ break;
	714	+ case 0:
477	715	default:
478		- pr_err("%s: unsupported to logo bpp %d\n", __func__, bpp);
479		- return NULL;
	716	+ *max_lanes = 0;
	717	+ *max_rate_per_lane = 0;
480	718	}
481		-
482		- return rockchip_fb_alloc(drm_dev, &mode_cmd, NULL, private->logo, 1);
483	719	}
484	720
485		-static struct rockchip_drm_mode_set *
486		-of_parse_display_resource(struct drm_device drm_dev, struct device_node route)
	721	+#define EDID_DSC_10BPC (1 << 0)
	722	+#define EDID_DSC_12BPC (1 << 1)
	723	+#define EDID_DSC_16BPC (1 << 2)
	724	+#define EDID_DSC_ALL_BPP (1 << 3)
	725	+#define EDID_DSC_NATIVE_420 (1 << 6)
	726	+#define EDID_DSC_1P2 (1 << 7)
	727	+#define EDID_DSC_MAX_FRL_RATE_MASK 0xf0
	728	+#define EDID_DSC_MAX_SLICES 0xf
	729	+#define EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f
	730	+#define EDID_MAX_FRL_RATE_MASK 0xf0
	731	+
	732	+static
	733	+void parse_edid_forum_vsdb(struct rockchip_drm_dsc_cap *dsc_cap,
	734	+ u8 max_frl_rate_per_lane, u8 max_lanes, u8 *add_func,
	735	+ const u8 *hf_vsdb)
487	736	{
488		- struct rockchip_drm_private *private = drm_dev->dev_private;
489		- struct rockchip_drm_mode_set *set;
490		- struct device_node *connect;
491		- struct drm_framebuffer *fb;
492		- struct drm_connector *connector;
493		- struct drm_crtc *crtc;
494		- const char *string;
495		- u32 val;
	737	+ u8 max_frl_rate;
	738	+ u8 dsc_max_frl_rate;
	739	+ u8 dsc_max_slices;
496	740
497		- connect = of_parse_phandle(route, "connect", 0);
498		- if (!connect)
499		- return NULL;
500		-
501		- fb = get_framebuffer_by_node(drm_dev, route);
502		- if (IS_ERR_OR_NULL(fb))
503		- return NULL;
504		-
505		- crtc = find_crtc_by_node(drm_dev, connect);
506		- connector = find_connector_by_node(drm_dev, connect);
507		- if (!connector)
508		- connector = find_connector_by_bridge(drm_dev, connect);
509		- if (!crtc \|\| !connector) {
510		- dev_warn(drm_dev->dev,
511		- "No available crtc or connector for display");
512		- drm_framebuffer_put(fb);
513		- return NULL;
514		- }
515		-
516		- set = kzalloc(sizeof(*set), GFP_KERNEL);
517		- if (!set)
518		- return NULL;
519		-
520		- if (!of_property_read_u32(route, "video,clock", &val))
521		- set->clock = val;
522		-
523		- if (!of_property_read_u32(route, "video,hdisplay", &val))
524		- set->hdisplay = val;
525		-
526		- if (!of_property_read_u32(route, "video,vdisplay", &val))
527		- set->vdisplay = val;
528		-
529		- if (!of_property_read_u32(route, "video,crtc_hsync_end", &val))
530		- set->crtc_hsync_end = val;
531		-
532		- if (!of_property_read_u32(route, "video,crtc_vsync_end", &val))
533		- set->crtc_vsync_end = val;
534		-
535		- if (!of_property_read_u32(route, "video,vrefresh", &val))
536		- set->vrefresh = val;
537		-
538		- if (!of_property_read_u32(route, "video,flags", &val))
539		- set->flags = val;
540		-
541		- if (!of_property_read_u32(route, "video,aspect_ratio", &val))
542		- set->picture_aspect_ratio = val;
543		-
544		- if (!of_property_read_u32(route, "overscan,left_margin", &val))
545		- set->left_margin = val;
546		-
547		- if (!of_property_read_u32(route, "overscan,right_margin", &val))
548		- set->right_margin = val;
549		-
550		- if (!of_property_read_u32(route, "overscan,top_margin", &val))
551		- set->top_margin = val;
552		-
553		- if (!of_property_read_u32(route, "overscan,bottom_margin", &val))
554		- set->bottom_margin = val;
555		-
556		- if (!of_property_read_u32(route, "bcsh,brightness", &val))
557		- set->brightness = val;
558		- else
559		- set->brightness = 50;
560		-
561		- if (!of_property_read_u32(route, "bcsh,contrast", &val))
562		- set->contrast = val;
563		- else
564		- set->contrast = 50;
565		-
566		- if (!of_property_read_u32(route, "bcsh,saturation", &val))
567		- set->saturation = val;
568		- else
569		- set->saturation = 50;
570		-
571		- if (!of_property_read_u32(route, "bcsh,hue", &val))
572		- set->hue = val;
573		- else
574		- set->hue = 50;
575		-
576		- set->force_output = of_property_read_bool(route, "force-output");
577		-
578		- if (!of_property_read_u32(route, "cubic_lut,offset", &val)) {
579		- private->cubic_lut[crtc->index].enable = true;
580		- private->cubic_lut[crtc->index].offset = val;
581		- }
582		-
583		- set->ratio = 1;
584		- if (!of_property_read_string(route, "logo,mode", &string) &&
585		- !strcmp(string, "fullscreen"))
586		- set->ratio = 0;
587		-
588		- set->fb = fb;
589		- set->crtc = crtc;
590		- set->connector = connector;
591		-
592		- return set;
593		-}
594		-
595		-static int rockchip_drm_fill_connector_modes(struct drm_connector *connector,
596		- uint32_t maxX, uint32_t maxY,
597		- bool force_output)
598		-{
599		- struct drm_device *dev = connector->dev;
600		- struct drm_display_mode *mode;
601		- const struct drm_connector_helper_funcs *connector_funcs =
602		- connector->helper_private;
603		- int count = 0;
604		- bool verbose_prune = true;
605		- enum drm_connector_status old_status;
606		-
607		- WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
608		-
609		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
610		- connector->name);
611		- /* set all modes to the unverified state */
612		- list_for_each_entry(mode, &connector->modes, head)
613		- mode->status = MODE_STALE;
614		-
615		- if (force_output)
616		- connector->force = DRM_FORCE_ON;
617		- if (connector->force) {
618		- if (connector->force == DRM_FORCE_ON \|\|
619		- connector->force == DRM_FORCE_ON_DIGITAL)
620		- connector->status = connector_status_connected;
621		- else
622		- connector->status = connector_status_disconnected;
623		- if (connector->funcs->force)
624		- connector->funcs->force(connector);
625		- } else {
626		- old_status = connector->status;
627		-
628		- if (connector->funcs->detect)
629		- connector->status = connector->funcs->detect(connector, true);
630		- else
631		- connector->status = connector_status_connected;
632		- /*
633		- * Normally either the driver's hpd code or the poll loop should
634		- * pick up any changes and fire the hotplug event. But if
635		- * userspace sneaks in a probe, we might miss a change. Hence
636		- * check here, and if anything changed start the hotplug code.
637		- */
638		- if (old_status != connector->status) {
639		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n",
640		- connector->base.id,
641		- connector->name,
642		- old_status, connector->status);
643		-
644		- /*
645		- * The hotplug event code might call into the fb
646		- * helpers, and so expects that we do not hold any
647		- * locks. Fire up the poll struct instead, it will
648		- * disable itself again.
649		- */
650		- dev->mode_config.delayed_event = true;
651		- if (dev->mode_config.poll_enabled)
652		- schedule_delayed_work(&dev->mode_config.output_poll_work,
653		- 0);
654		- }
655		- }
656		-
657		- /* Re-enable polling in case the global poll config changed. */
658		- if (!dev->mode_config.poll_running)
659		- drm_kms_helper_poll_enable(dev);
660		-
661		- dev->mode_config.poll_running = true;
662		-
663		- if (connector->status == connector_status_disconnected) {
664		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
665		- connector->base.id, connector->name);
666		- drm_connector_update_edid_property(connector, NULL);
667		- verbose_prune = false;
668		- goto prune;
669		- }
670		-
671		- count = (*connector_funcs->get_modes)(connector);
672		-
673		- if (count == 0 && connector->status == connector_status_connected)
674		- count = drm_add_modes_noedid(connector, 1024, 768);
675		- if (force_output)
676		- count += rockchip_drm_add_modes_noedid(connector);
677		- if (count == 0)
678		- goto prune;
679		-
680		- drm_connector_list_update(connector);
681		-
682		- list_for_each_entry(mode, &connector->modes, head) {
683		- if (mode->status == MODE_OK)
684		- mode->status = drm_mode_validate_driver(dev, mode);
685		-
686		- if (mode->status == MODE_OK)
687		- mode->status = drm_mode_validate_size(mode, maxX, maxY);
688		-
689		- /**
690		- * if (mode->status == MODE_OK)
691		- * mode->status = drm_mode_validate_flag(mode, mode_flags);
692		- */
693		- if (mode->status == MODE_OK && connector_funcs->mode_valid)
694		- mode->status = connector_funcs->mode_valid(connector,
695		- mode);
696		- if (mode->status == MODE_OK)
697		- mode->status = drm_mode_validate_ycbcr420(mode,
698		- connector);
699		- }
700		-
701		-prune:
702		- drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
703		-
704		- if (list_empty(&connector->modes))
705		- return 0;
706		-
707		- list_for_each_entry(mode, &connector->modes, head)
708		- mode->vrefresh = drm_mode_vrefresh(mode);
709		-
710		- drm_mode_sort(&connector->modes);
711		-
712		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
713		- connector->name);
714		- list_for_each_entry(mode, &connector->modes, head) {
715		- drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
716		- drm_mode_debug_printmodeline(mode);
717		- }
718		-
719		- return count;
720		-}
721		-
722		-static int setup_initial_state(struct drm_device *drm_dev,
723		- struct drm_atomic_state *state,
724		- struct rockchip_drm_mode_set *set)
725		-{
726		- struct rockchip_drm_private *priv = drm_dev->dev_private;
727		- struct drm_connector *connector = set->connector;
728		- struct drm_crtc *crtc = set->crtc;
729		- struct drm_crtc_state *crtc_state;
730		- struct drm_connector_state *conn_state;
731		- struct drm_plane_state *primary_state;
732		- struct drm_display_mode *mode = NULL;
733		- const struct drm_connector_helper_funcs *funcs;
734		- const struct drm_encoder_helper_funcs *encoder_funcs;
735		- int pipe = drm_crtc_index(crtc);
736		- bool is_crtc_enabled = true;
737		- int hdisplay, vdisplay;
738		- int fb_width, fb_height;
739		- int found = 0, match = 0;
740		- int num_modes;
741		- int ret = 0;
742		- struct rockchip_crtc_state *s = NULL;
743		-
744		- if (!set->hdisplay \|\| !set->vdisplay \|\| !set->vrefresh)
745		- is_crtc_enabled = false;
746		-
747		- conn_state = drm_atomic_get_connector_state(state, connector);
748		- if (IS_ERR(conn_state))
749		- return PTR_ERR(conn_state);
750		-
751		- funcs = connector->helper_private;
752		-
753		- if (funcs->best_encoder)
754		- conn_state->best_encoder = funcs->best_encoder(connector);
755		- else
756		- conn_state->best_encoder = drm_atomic_helper_best_encoder(connector);
757		-
758		- if (funcs->loader_protect)
759		- funcs->loader_protect(connector, true);
760		- connector->loader_protect = true;
761		- encoder_funcs = conn_state->best_encoder->helper_private;
762		- if (encoder_funcs->loader_protect)
763		- encoder_funcs->loader_protect(conn_state->best_encoder, true);
764		- conn_state->best_encoder->loader_protect = true;
765		- num_modes = rockchip_drm_fill_connector_modes(connector, 4096, 4096, set->force_output);
766		- if (!num_modes) {
767		- dev_err(drm_dev->dev, "connector[%s] can't found any modes\n",
768		- connector->name);
769		- ret = -EINVAL;
770		- goto error_conn;
771		- }
772		-
773		- list_for_each_entry(mode, &connector->modes, head) {
774		- if (mode->clock == set->clock &&
775		- mode->hdisplay == set->hdisplay &&
776		- mode->vdisplay == set->vdisplay &&
777		- mode->crtc_hsync_end == set->crtc_hsync_end &&
778		- mode->crtc_vsync_end == set->crtc_vsync_end &&
779		- drm_mode_vrefresh(mode) == set->vrefresh &&
780		- /* we just need to focus on DRM_MODE_FLAG_ALL flag, so here
781		- * we compare mode->flags with set->flags & DRM_MODE_FLAG_ALL.
782		- */
783		- mode->flags == (set->flags & DRM_MODE_FLAG_ALL) &&
784		- mode->picture_aspect_ratio == set->picture_aspect_ratio) {
785		- found = 1;
786		- match = 1;
787		- break;
788		- }
789		- }
790		-
791		- if (!found) {
792		- ret = -EINVAL;
793		- connector->status = connector_status_disconnected;
794		- goto error_conn;
795		- }
796		-
797		- conn_state->tv.brightness = set->brightness;
798		- conn_state->tv.contrast = set->contrast;
799		- conn_state->tv.saturation = set->saturation;
800		- conn_state->tv.hue = set->hue;
801		- set->mode = mode;
802		- crtc_state = drm_atomic_get_crtc_state(state, crtc);
803		- if (IS_ERR(crtc_state)) {
804		- ret = PTR_ERR(crtc_state);
805		- goto error_conn;
806		- }
807		-
808		- drm_mode_copy(&crtc_state->adjusted_mode, mode);
809		- if (!match \|\| !is_crtc_enabled) {
810		- set->mode_changed = true;
811		- } else {
812		- ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
813		- if (ret)
814		- goto error_conn;
815		-
816		- mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
817		- ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
818		- if (ret)
819		- goto error_conn;
820		-
821		- crtc_state->active = true;
822		-
823		- if (priv->crtc_funcs[pipe] &&
824		- priv->crtc_funcs[pipe]->loader_protect)
825		- priv->crtc_funcs[pipe]->loader_protect(crtc, true);
826		- }
827		-
828		- if (!set->fb) {
829		- ret = 0;
830		- goto error_crtc;
831		- }
832		- primary_state = drm_atomic_get_plane_state(state, crtc->primary);
833		- if (IS_ERR(primary_state)) {
834		- ret = PTR_ERR(primary_state);
835		- goto error_crtc;
836		- }
837		-
838		- hdisplay = mode->hdisplay;
839		- vdisplay = mode->vdisplay;
840		- fb_width = set->fb->width;
841		- fb_height = set->fb->height;
842		-
843		- primary_state->crtc = crtc;
844		- primary_state->src_x = 0;
845		- primary_state->src_y = 0;
846		- primary_state->src_w = fb_width << 16;
847		- primary_state->src_h = fb_height << 16;
848		- if (set->ratio) {
849		- if (set->fb->width >= hdisplay) {
850		- primary_state->crtc_x = 0;
851		- primary_state->crtc_w = hdisplay;
852		- } else {
853		- primary_state->crtc_x = (hdisplay - fb_width) / 2;
854		- primary_state->crtc_w = set->fb->width;
855		- }
856		-
857		- if (set->fb->height >= vdisplay) {
858		- primary_state->crtc_y = 0;
859		- primary_state->crtc_h = vdisplay;
860		- } else {
861		- primary_state->crtc_y = (vdisplay - fb_height) / 2;
862		- primary_state->crtc_h = fb_height;
863		- }
864		- } else {
865		- primary_state->crtc_x = 0;
866		- primary_state->crtc_y = 0;
867		- primary_state->crtc_w = hdisplay;
868		- primary_state->crtc_h = vdisplay;
869		- }
870		- s = to_rockchip_crtc_state(crtc->state);
871		- s->output_type = connector->connector_type;
872		-
873		- return 0;
874		-
875		-error_crtc:
876		- if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->loader_protect)
877		- priv->crtc_funcs[pipe]->loader_protect(crtc, false);
878		-error_conn:
879		- if (funcs->loader_protect)
880		- funcs->loader_protect(connector, false);
881		- connector->loader_protect = false;
882		- if (encoder_funcs->loader_protect)
883		- encoder_funcs->loader_protect(conn_state->best_encoder, false);
884		- conn_state->best_encoder->loader_protect = false;
885		-
886		- return ret;
887		-}
888		-
889		-static int update_state(struct drm_device *drm_dev,
890		- struct drm_atomic_state *state,
891		- struct rockchip_drm_mode_set *set,
892		- unsigned int *plane_mask)
893		-{
894		- struct drm_crtc *crtc = set->crtc;
895		- struct drm_connector *connector = set->connector;
896		- struct drm_display_mode *mode = set->mode;
897		- struct drm_plane_state *primary_state;
898		- struct drm_crtc_state *crtc_state;
899		- struct drm_connector_state *conn_state;
900		- int ret;
901		- struct rockchip_crtc_state *s;
902		-
903		- crtc_state = drm_atomic_get_crtc_state(state, crtc);
904		- if (IS_ERR(crtc_state))
905		- return PTR_ERR(crtc_state);
906		- conn_state = drm_atomic_get_connector_state(state, connector);
907		- if (IS_ERR(conn_state))
908		- return PTR_ERR(conn_state);
909		- s = to_rockchip_crtc_state(crtc_state);
910		- s->left_margin = set->left_margin;
911		- s->right_margin = set->right_margin;
912		- s->top_margin = set->top_margin;
913		- s->bottom_margin = set->bottom_margin;
914		-
915		- if (set->mode_changed) {
916		- ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
917		- if (ret)
918		- return ret;
919		-
920		- ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
921		- if (ret)
922		- return ret;
923		-
924		- crtc_state->active = true;
925		- } else {
926		- const struct drm_encoder_helper_funcs *encoder_helper_funcs;
927		- const struct drm_connector_helper_funcs *connector_helper_funcs;
928		- struct drm_encoder *encoder;
929		-
930		- connector_helper_funcs = connector->helper_private;
931		- if (!connector_helper_funcs)
932		- return -ENXIO;
933		- if (connector_helper_funcs->best_encoder)
934		- encoder = connector_helper_funcs->best_encoder(connector);
935		- else
936		- encoder = drm_atomic_helper_best_encoder(connector);
937		- if (!encoder)
938		- return -ENXIO;
939		- encoder_helper_funcs = encoder->helper_private;
940		- if (!encoder_helper_funcs->atomic_check)
941		- return -ENXIO;
942		- ret = encoder_helper_funcs->atomic_check(encoder, crtc->state,
943		- conn_state);
944		- if (ret)
945		- return ret;
946		-
947		- if (encoder_helper_funcs->atomic_mode_set)
948		- encoder_helper_funcs->atomic_mode_set(encoder,
949		- crtc_state,
950		- conn_state);
951		- else if (encoder_helper_funcs->mode_set)
952		- encoder_helper_funcs->mode_set(encoder, mode, mode);
953		- }
954		-
955		- primary_state = drm_atomic_get_plane_state(state, crtc->primary);
956		- if (IS_ERR(primary_state))
957		- return PTR_ERR(primary_state);
958		-
959		- crtc_state->plane_mask = 1 << drm_plane_index(crtc->primary);
960		- *plane_mask \|= crtc_state->plane_mask;
961		-
962		- drm_atomic_set_fb_for_plane(primary_state, set->fb);
963		- drm_framebuffer_put(set->fb);
964		- ret = drm_atomic_set_crtc_for_plane(primary_state, crtc);
965		-
966		- return ret;
967		-}
968		-
969		-static void show_loader_logo(struct drm_device *drm_dev)
970		-{
971		- struct drm_atomic_state state, old_state;
972		- struct device_node *np = drm_dev->dev->of_node;
973		- struct drm_mode_config *mode_config = &drm_dev->mode_config;
974		- struct rockchip_drm_private *private = drm_dev->dev_private;
975		- struct device_node root, route;
976		- struct rockchip_drm_mode_set set, tmp, *unset;
977		- struct list_head mode_set_list;
978		- struct list_head mode_unset_list;
979		- unsigned int plane_mask = 0;
980		- int ret, i;
981		-
982		- root = of_get_child_by_name(np, "route");
983		- if (!root) {
984		- dev_warn(drm_dev->dev, "failed to parse display resources\n");
	741	+ if (!hf_vsdb[7])
985	742	return;
986		- }
987	743
988		- if (init_loader_memory(drm_dev)) {
989		- dev_warn(drm_dev->dev, "failed to parse loader memory\n");
	744	+ DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
	745	+ max_frl_rate = (hf_vsdb[7] & EDID_MAX_FRL_RATE_MASK) >> 4;
	746	+ get_max_frl_rate(max_frl_rate, max_lanes,
	747	+ max_frl_rate_per_lane);
	748	+
	749	+ *add_func = hf_vsdb[8];
	750	+
	751	+ if (cea_db_payload_len(hf_vsdb) < 13)
990	752	return;
	753	+
	754	+ dsc_cap->v_1p2 = hf_vsdb[11] & EDID_DSC_1P2;
	755	+
	756	+ if (!dsc_cap->v_1p2)
	757	+ return;
	758	+
	759	+ dsc_cap->native_420 = hf_vsdb[11] & EDID_DSC_NATIVE_420;
	760	+ dsc_cap->all_bpp = hf_vsdb[11] & EDID_DSC_ALL_BPP;
	761	+
	762	+ if (hf_vsdb[11] & EDID_DSC_16BPC)
	763	+ dsc_cap->bpc_supported = 16;
	764	+ else if (hf_vsdb[11] & EDID_DSC_12BPC)
	765	+ dsc_cap->bpc_supported = 12;
	766	+ else if (hf_vsdb[11] & EDID_DSC_10BPC)
	767	+ dsc_cap->bpc_supported = 10;
	768	+ else
	769	+ dsc_cap->bpc_supported = 0;
	770	+
	771	+ dsc_max_frl_rate = (hf_vsdb[12] & EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
	772	+ get_max_frl_rate(dsc_max_frl_rate, &dsc_cap->max_lanes,
	773	+ &dsc_cap->max_frl_rate_per_lane);
	774	+ dsc_cap->total_chunk_kbytes = hf_vsdb[13] & EDID_DSC_TOTAL_CHUNK_KBYTES;
	775	+
	776	+ dsc_max_slices = hf_vsdb[12] & EDID_DSC_MAX_SLICES;
	777	+ switch (dsc_max_slices) {
	778	+ case 1:
	779	+ dsc_cap->max_slices = 1;
	780	+ dsc_cap->clk_per_slice = 340;
	781	+ break;
	782	+ case 2:
	783	+ dsc_cap->max_slices = 2;
	784	+ dsc_cap->clk_per_slice = 340;
	785	+ break;
	786	+ case 3:
	787	+ dsc_cap->max_slices = 4;
	788	+ dsc_cap->clk_per_slice = 340;
	789	+ break;
	790	+ case 4:
	791	+ dsc_cap->max_slices = 8;
	792	+ dsc_cap->clk_per_slice = 340;
	793	+ break;
	794	+ case 5:
	795	+ dsc_cap->max_slices = 8;
	796	+ dsc_cap->clk_per_slice = 400;
	797	+ break;
	798	+ case 6:
	799	+ dsc_cap->max_slices = 12;
	800	+ dsc_cap->clk_per_slice = 400;
	801	+ break;
	802	+ case 7:
	803	+ dsc_cap->max_slices = 16;
	804	+ dsc_cap->clk_per_slice = 400;
	805	+ break;
	806	+ case 0:
	807	+ default:
	808	+ dsc_cap->max_slices = 0;
	809	+ dsc_cap->clk_per_slice = 0;
991	810	}
992		-
993		- INIT_LIST_HEAD(&mode_set_list);
994		- INIT_LIST_HEAD(&mode_unset_list);
995		- drm_modeset_lock_all(drm_dev);
996		- state = drm_atomic_state_alloc(drm_dev);
997		- if (!state) {
998		- dev_err(drm_dev->dev, "failed to alloc atomic state\n");
999		- ret = -ENOMEM;
1000		- goto err_unlock;
1001		- }
1002		-
1003		- state->acquire_ctx = mode_config->acquire_ctx;
1004		-
1005		- for_each_child_of_node(root, route) {
1006		- if (!of_device_is_available(route))
1007		- continue;
1008		-
1009		- set = of_parse_display_resource(drm_dev, route);
1010		- if (!set)
1011		- continue;
1012		-
1013		- if (setup_initial_state(drm_dev, state, set)) {
1014		- drm_framebuffer_put(set->fb);
1015		- INIT_LIST_HEAD(&set->head);
1016		- list_add_tail(&set->head, &mode_unset_list);
1017		- continue;
1018		- }
1019		- INIT_LIST_HEAD(&set->head);
1020		- list_add_tail(&set->head, &mode_set_list);
1021		- }
1022		-
1023		- /*
1024		- * the mode_unset_list store the unconnected route, if route's crtc
1025		- * isn't used, we should close it.
1026		- */
1027		- list_for_each_entry_safe(unset, tmp, &mode_unset_list, head) {
1028		- struct rockchip_drm_mode_set *tmp_set;
1029		- int find_used_crtc = 0;
1030		-
1031		- list_for_each_entry_safe(set, tmp_set, &mode_set_list, head) {
1032		- if (set->crtc == unset->crtc) {
1033		- find_used_crtc = 1;
1034		- continue;
1035		- }
1036		- }
1037		-
1038		- if (!find_used_crtc) {
1039		- struct drm_crtc *crtc = unset->crtc;
1040		- int pipe = drm_crtc_index(crtc);
1041		- struct rockchip_drm_private *priv =
1042		- drm_dev->dev_private;
1043		-
1044		- if (unset->hdisplay && unset->vdisplay) {
1045		- if (priv->crtc_funcs[pipe] &&
1046		- priv->crtc_funcs[pipe]->loader_protect)
1047		- priv->crtc_funcs[pipe]->loader_protect(crtc, true);
1048		- priv->crtc_funcs[pipe]->crtc_close(crtc);
1049		- if (priv->crtc_funcs[pipe] &&
1050		- priv->crtc_funcs[pipe]->loader_protect)
1051		- priv->crtc_funcs[pipe]->loader_protect(crtc, false);
1052		- }
1053		- }
1054		-
1055		- list_del(&unset->head);
1056		- kfree(unset);
1057		- }
1058		-
1059		- if (list_empty(&mode_set_list)) {
1060		- dev_warn(drm_dev->dev, "can't not find any loader display\n");
1061		- ret = -ENXIO;
1062		- goto err_free_state;
1063		- }
1064		-
1065		- /*
1066		- * The state save initial devices status, swap the state into
1067		- * drm devices as old state, so if new state come, can compare
1068		- * with this state to judge which status need to update.
1069		- */
1070		- WARN_ON(drm_atomic_helper_swap_state(state, false));
1071		- drm_atomic_state_put(state);
1072		- old_state = drm_atomic_helper_duplicate_state(drm_dev,
1073		- mode_config->acquire_ctx);
1074		- if (IS_ERR(old_state)) {
1075		- dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1076		- ret = PTR_ERR_OR_ZERO(old_state);
1077		- goto err_free_state;
1078		- }
1079		-
1080		- state = drm_atomic_helper_duplicate_state(drm_dev,
1081		- mode_config->acquire_ctx);
1082		- if (IS_ERR(state)) {
1083		- dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1084		- ret = PTR_ERR_OR_ZERO(state);
1085		- goto err_free_old_state;
1086		- }
1087		- state->acquire_ctx = mode_config->acquire_ctx;
1088		- list_for_each_entry(set, &mode_set_list, head)
1089		- /*
1090		- * We don't want to see any fail on update_state.
1091		- */
1092		- WARN_ON(update_state(drm_dev, state, set, &plane_mask));
1093		-
1094		- for (i = 0; i < state->num_connector; i++) {
1095		- if (state->connectors[i].new_state->connector->status !=
1096		- connector_status_connected)
1097		- state->connectors[i].new_state->best_encoder = NULL;
1098		- }
1099		-
1100		- ret = drm_atomic_commit(state);
1101		- /**
1102		- * todo
1103		- * drm_atomic_clean_old_fb(drm_dev, plane_mask, ret);
1104		- */
1105		-
1106		- list_for_each_entry_safe(set, tmp, &mode_set_list, head) {
1107		- if (set->force_output)
1108		- set->connector->force = DRM_FORCE_UNSPECIFIED;
1109		- list_del(&set->head);
1110		- kfree(set);
1111		- }
1112		-
1113		- /*
1114		- * Is possible get deadlock here?
1115		- */
1116		- WARN_ON(ret == -EDEADLK);
1117		-
1118		- if (ret) {
1119		- /*
1120		- * restore display status if atomic commit failed.
1121		- */
1122		- WARN_ON(drm_atomic_helper_swap_state(old_state, false));
1123		- goto err_free_state;
1124		- }
1125		-
1126		- rockchip_free_loader_memory(drm_dev);
1127		- drm_atomic_state_put(old_state);
1128		- drm_atomic_state_put(state);
1129		-
1130		- private->loader_protect = true;
1131		- drm_modeset_unlock_all(drm_dev);
1132		- return;
1133		-err_free_old_state:
1134		- drm_atomic_state_put(old_state);
1135		-err_free_state:
1136		- drm_atomic_state_put(state);
1137		-err_unlock:
1138		- drm_modeset_unlock_all(drm_dev);
1139		- if (ret)
1140		- dev_err(drm_dev->dev, "failed to show loader logo\n");
1141	811	}
1142	812
1143		-static const char *const loader_protect_clocks[] __initconst = {
1144		- "hclk_vio",
1145		- "hclk_vop",
1146		- "hclk_vopb",
1147		- "hclk_vopl",
1148		- "aclk_vio",
1149		- "aclk_vio0",
1150		- "aclk_vio1",
1151		- "aclk_vop",
1152		- "aclk_vopb",
1153		- "aclk_vopl",
1154		- "aclk_vo_pre",
1155		- "aclk_vio_pre",
1156		- "dclk_vop",
1157		- "dclk_vop0",
1158		- "dclk_vop1",
1159		- "dclk_vopb",
1160		- "dclk_vopl",
	813	+enum {
	814	+ VER_26_BYTE_V0,
	815	+ VER_15_BYTE_V1,
	816	+ VER_12_BYTE_V1,
	817	+ VER_12_BYTE_V2,
1161	818	};
1162	819
1163		-static struct clk **loader_clocks __initdata;
1164		-static int __init rockchip_clocks_loader_protect(void)
	820	+static int check_next_hdr_version(const u8 *next_hdr_db)
1165	821	{
1166		- int nclocks = ARRAY_SIZE(loader_protect_clocks);
1167		- struct clk *clk;
1168		- int i;
	822	+ u16 ver;
1169	823
1170		- loader_clocks = kcalloc(nclocks, sizeof(void *), GFP_KERNEL);
1171		- if (!loader_clocks)
1172		- return -ENOMEM;
	824	+ ver = (next_hdr_db[5] & 0xf0) << 8 \| next_hdr_db[0];
1173	825
1174		- for (i = 0; i < nclocks; i++) {
1175		- clk = __clk_lookup(loader_protect_clocks[i]);
1176		-
1177		- if (clk) {
1178		- loader_clocks[i] = clk;
1179		- clk_prepare_enable(clk);
1180		- }
	826	+ switch (ver) {
	827	+ case 0x00f9:
	828	+ return VER_26_BYTE_V0;
	829	+ case 0x20ee:
	830	+ return VER_15_BYTE_V1;
	831	+ case 0x20eb:
	832	+ return VER_12_BYTE_V1;
	833	+ case 0x40eb:
	834	+ return VER_12_BYTE_V2;
	835	+ default:
	836	+ return -ENOENT;
1181	837	}
1182		-
1183		- return 0;
1184	838	}
1185		-arch_initcall_sync(rockchip_clocks_loader_protect);
1186	839
1187		-static int __init rockchip_clocks_loader_unprotect(void)
	840	+static void parse_ver_26_v0_data(struct ver_26_v0 hdr, const u8 data)
1188	841	{
1189		- int i;
	842	+ hdr->yuv422_12bit = data[5] & BIT(0);
	843	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	844	+ hdr->global_dimming = (data[5] & BIT(2)) >> 2;
1190	845
1191		- if (!loader_clocks)
1192		- return -ENODEV;
	846	+ hdr->dm_major_ver = (data[21] & 0xf0) >> 4;
	847	+ hdr->dm_minor_ver = data[21] & 0xf;
1193	848
1194		- for (i = 0; i < ARRAY_SIZE(loader_protect_clocks); i++) {
1195		- struct clk *clk = loader_clocks[i];
	849	+ hdr->t_min_pq = (data[19] << 4) \| ((data[18] & 0xf0) >> 4);
	850	+ hdr->t_max_pq = (data[20] << 4) \| (data[18] & 0xf);
1196	851
1197		- if (clk)
1198		- clk_disable_unprepare(clk);
	852	+ hdr->rx = (data[7] << 4) \| ((data[6] & 0xf0) >> 4);
	853	+ hdr->ry = (data[8] << 4) \| (data[6] & 0xf);
	854	+ hdr->gx = (data[10] << 4) \| ((data[9] & 0xf0) >> 4);
	855	+ hdr->gy = (data[11] << 4) \| (data[9] & 0xf);
	856	+ hdr->bx = (data[13] << 4) \| ((data[12] & 0xf0) >> 4);
	857	+ hdr->by = (data[14] << 4) \| (data[12] & 0xf);
	858	+ hdr->wx = (data[16] << 4) \| ((data[15] & 0xf0) >> 4);
	859	+ hdr->wy = (data[17] << 4) \| (data[15] & 0xf);
	860	+}
	861	+
	862	+static void parse_ver_15_v1_data(struct ver_15_v1 hdr, const u8 data)
	863	+{
	864	+ hdr->yuv422_12bit = data[5] & BIT(0);
	865	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	866	+ hdr->global_dimming = data[6] & BIT(0);
	867	+
	868	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	869	+
	870	+ hdr->colorimetry = data[7] & BIT(0);
	871	+
	872	+ hdr->t_max_lum = (data[6] & 0xfe) >> 1;
	873	+ hdr->t_min_lum = (data[7] & 0xfe) >> 1;
	874	+
	875	+ hdr->rx = data[9];
	876	+ hdr->ry = data[10];
	877	+ hdr->gx = data[11];
	878	+ hdr->gy = data[12];
	879	+ hdr->bx = data[13];
	880	+ hdr->by = data[14];
	881	+}
	882	+
	883	+static void parse_ver_12_v1_data(struct ver_12_v1 hdr, const u8 data)
	884	+{
	885	+ hdr->yuv422_12bit = data[5] & BIT(0);
	886	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	887	+ hdr->global_dimming = data[6] & BIT(0);
	888	+
	889	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	890	+
	891	+ hdr->colorimetry = data[7] & BIT(0);
	892	+
	893	+ hdr->t_max_lum = (data[6] & 0xfe) >> 1;
	894	+ hdr->t_min_lum = (data[7] & 0xfe) >> 1;
	895	+
	896	+ hdr->low_latency = data[8] & 0x3;
	897	+
	898	+ hdr->unique_rx = (data[11] & 0xf8) >> 3;
	899	+ hdr->unique_ry = (data[11] & 0x7) << 2 \| (data[10] & BIT(0)) << 1 \|
	900	+ (data[9] & BIT(0));
	901	+ hdr->unique_gx = (data[9] & 0xfe) >> 1;
	902	+ hdr->unique_gy = (data[10] & 0xfe) >> 1;
	903	+ hdr->unique_bx = (data[8] & 0xe0) >> 5;
	904	+ hdr->unique_by = (data[8] & 0x1c) >> 2;
	905	+}
	906	+
	907	+static void parse_ver_12_v2_data(struct ver_12_v2 hdr, const u8 data)
	908	+{
	909	+ hdr->yuv422_12bit = data[5] & BIT(0);
	910	+ hdr->backlt_ctrl = (data[5] & BIT(1)) >> 1;
	911	+ hdr->global_dimming = (data[6] & BIT(2)) >> 2;
	912	+
	913	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	914	+ hdr->backlt_min_luma = data[6] & 0x3;
	915	+ hdr->interface = data[7] & 0x3;
	916	+ hdr->yuv444_10b_12b = (data[8] & BIT(0)) << 1 \| (data[9] & BIT(0));
	917	+
	918	+ hdr->t_min_pq_v2 = (data[6] & 0xf8) >> 3;
	919	+ hdr->t_max_pq_v2 = (data[7] & 0xf8) >> 3;
	920	+
	921	+ hdr->unique_rx = (data[10] & 0xf8) >> 3;
	922	+ hdr->unique_ry = (data[11] & 0xf8) >> 3;
	923	+ hdr->unique_gx = (data[8] & 0xfe) >> 1;
	924	+ hdr->unique_gy = (data[9] & 0xfe) >> 1;
	925	+ hdr->unique_bx = data[10] & 0x7;
	926	+ hdr->unique_by = data[11] & 0x7;
	927	+}
	928	+
	929	+static
	930	+void parse_next_hdr_block(struct next_hdr_sink_data *sink_data,
	931	+ const u8 *next_hdr_db)
	932	+{
	933	+ int version;
	934	+
	935	+ version = check_next_hdr_version(next_hdr_db);
	936	+ if (version < 0)
	937	+ return;
	938	+
	939	+ sink_data->version = version;
	940	+
	941	+ switch (version) {
	942	+ case VER_26_BYTE_V0:
	943	+ parse_ver_26_v0_data(&sink_data->ver_26_v0, next_hdr_db);
	944	+ break;
	945	+ case VER_15_BYTE_V1:
	946	+ parse_ver_15_v1_data(&sink_data->ver_15_v1, next_hdr_db);
	947	+ break;
	948	+ case VER_12_BYTE_V1:
	949	+ parse_ver_12_v1_data(&sink_data->ver_12_v1, next_hdr_db);
	950	+ break;
	951	+ case VER_12_BYTE_V2:
	952	+ parse_ver_12_v2_data(&sink_data->ver_12_v2, next_hdr_db);
	953	+ break;
	954	+ default:
	955	+ break;
1199	956	}
1200		- kfree(loader_clocks);
1201		-
1202		- return 0;
1203	957	}
1204		-late_initcall_sync(rockchip_clocks_loader_unprotect);
1205		-#endif
1206	958
1207		-int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
1208		- struct device_node *np_crtc,
1209		- u32 type, u32 value)
	959	+int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
	960	+ u8 max_frl_rate_per_lane, u8 max_lanes, u8 *add_func,
	961	+ const struct edid *edid)
1210	962	{
1211		- struct drm_crtc *crtc;
1212		- int pipe = 0;
1213		- struct rockchip_drm_private *priv;
	963	+ const u8 *edid_ext;
	964	+ int i, start, end;
1214	965
1215		- if (!np_crtc \|\| !of_device_is_available(np_crtc))
	966	+ if (!dsc_cap \|\| !max_frl_rate_per_lane \|\| !max_lanes \|\| !edid \|\| !add_func)
1216	967	return -EINVAL;
1217	968
1218		- drm_for_each_crtc(crtc, drm_dev) {
1219		- if (of_get_parent(crtc->port) == np_crtc)
1220		- break;
1221		- }
1222		-
1223		- pipe = drm_crtc_index(crtc);
1224		- if (pipe >= ROCKCHIP_MAX_CRTC)
	969	+ edid_ext = find_cea_extension(edid);
	970	+ if (!edid_ext)
1225	971	return -EINVAL;
1226		- priv = crtc->dev->dev_private;
1227		- if (priv->crtc_funcs[pipe]->crtc_send_mcu_cmd)
1228		- priv->crtc_funcs[pipe]->crtc_send_mcu_cmd(crtc, type, value);
	972	+
	973	+ if (cea_db_offsets(edid_ext, &start, &end))
	974	+ return -EINVAL;
	975	+
	976	+ for_each_cea_db(edid_ext, i, start, end) {
	977	+ const u8 *db = &edid_ext[i];
	978	+
	979	+ if (cea_db_is_hdmi_forum_vsdb(db))
	980	+ parse_edid_forum_vsdb(dsc_cap, max_frl_rate_per_lane,
	981	+ max_lanes, add_func, db);
	982	+ }
1229	983
1230	984	return 0;
1231	985	}
1232		-EXPORT_SYMBOL(rockchip_drm_crtc_send_mcu_cmd);
	986	+EXPORT_SYMBOL(rockchip_drm_parse_cea_ext);
	987	+
	988	+int rockchip_drm_parse_next_hdr(struct next_hdr_sink_data *sink_data,
	989	+ const struct edid *edid)
	990	+{
	991	+ const u8 *edid_ext;
	992	+ int i, start, end;
	993	+
	994	+ if (!sink_data \|\| !edid)
	995	+ return -EINVAL;
	996	+
	997	+ memset(sink_data, 0, sizeof(struct next_hdr_sink_data));
	998	+
	999	+ edid_ext = find_cea_extension(edid);
	1000	+ if (!edid_ext)
	1001	+ return -EINVAL;
	1002	+
	1003	+ if (cea_db_offsets(edid_ext, &start, &end))
	1004	+ return -EINVAL;
	1005	+
	1006	+ for_each_cea_db(edid_ext, i, start, end) {
	1007	+ const u8 *db = &edid_ext[i];
	1008	+
	1009	+ if (cea_db_is_hdmi_next_hdr_block(db))
	1010	+ parse_next_hdr_block(sink_data, db);
	1011	+ }
	1012	+
	1013	+ return 0;
	1014	+}
	1015	+EXPORT_SYMBOL(rockchip_drm_parse_next_hdr);
	1016	+
	1017	+#define COLORIMETRY_DATA_BLOCK 0x5
	1018	+#define USE_EXTENDED_TAG 0x07
	1019	+
	1020	+static bool cea_db_is_hdmi_colorimetry_data_block(const u8 *db)
	1021	+{
	1022	+ if (cea_db_tag(db) != USE_EXTENDED_TAG)
	1023	+ return false;
	1024	+
	1025	+ if (db[1] != COLORIMETRY_DATA_BLOCK)
	1026	+ return false;
	1027	+
	1028	+ return true;
	1029	+}
	1030	+
	1031	+int
	1032	+rockchip_drm_parse_colorimetry_data_block(u8 colorimetry, const struct edid edid)
	1033	+{
	1034	+ const u8 *edid_ext;
	1035	+ int i, start, end;
	1036	+
	1037	+ if (!colorimetry \|\| !edid)
	1038	+ return -EINVAL;
	1039	+
	1040	+ *colorimetry = 0;
	1041	+
	1042	+ edid_ext = find_cea_extension(edid);
	1043	+ if (!edid_ext)
	1044	+ return -EINVAL;
	1045	+
	1046	+ if (cea_db_offsets(edid_ext, &start, &end))
	1047	+ return -EINVAL;
	1048	+
	1049	+ for_each_cea_db(edid_ext, i, start, end) {
	1050	+ const u8 *db = &edid_ext[i];
	1051	+
	1052	+ if (cea_db_is_hdmi_colorimetry_data_block(db))
	1053	+ /* As per CEA 861-G spec */
	1054	+ *colorimetry = ((db[3] & (0x1 << 7)) << 1) \| db[2];
	1055	+ }
	1056	+
	1057	+ return 0;
	1058	+}
	1059	+EXPORT_SYMBOL(rockchip_drm_parse_colorimetry_data_block);
1233	1060
1234	1061	/*
1235	1062	* Attach a (component) device to the shared drm dma mapping from master drm
..	..	@@ -1264,6 +1091,17 @@
1264	1091	return;
1265	1092
1266	1093	iommu_detach_device(domain, dev);
	1094	+}
	1095	+
	1096	+void rockchip_drm_crtc_standby(struct drm_crtc *crtc, bool standby)
	1097	+{
	1098	+ struct rockchip_drm_private *priv = crtc->dev->dev_private;
	1099	+ int pipe = drm_crtc_index(crtc);
	1100	+
	1101	+ if (pipe < ROCKCHIP_MAX_CRTC &&
	1102	+ priv->crtc_funcs[pipe] &&
	1103	+ priv->crtc_funcs[pipe]->crtc_standby)
	1104	+ priv->crtc_funcs[pipe]->crtc_standby(crtc, standby);
1267	1105	}
1268	1106
1269	1107	int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
..	..	@@ -1320,6 +1158,7 @@
1320	1158	struct rockchip_drm_private *private = drm_dev->dev_private;
1321	1159	struct iommu_domain_geometry *geometry;
1322	1160	u64 start, end;
	1161	+ int ret = 0;
1323	1162
1324	1163	if (!is_support_iommu)
1325	1164	return 0;
..	..	@@ -1340,7 +1179,23 @@
1340	1179	iommu_set_fault_handler(private->domain, rockchip_drm_fault_handler,
1341	1180	drm_dev);
1342	1181
1343		- return 0;
	1182	+ if (iommu_reserve_map) {
	1183	+ /*
	1184	+ * At 32 bit platform size_t maximum value is 0xffffffff, SZ_4G(0x100000000) will be
	1185	+ * cliped to 0, so we split into two mapping
	1186	+ */
	1187	+ ret = iommu_map(private->domain, 0, 0, (size_t)SZ_2G,
	1188	+ IOMMU_WRITE \| IOMMU_READ \| IOMMU_PRIV);
	1189	+ if (ret)
	1190	+ dev_err(drm_dev->dev, "failed to create 0-2G pre mapping\n");
	1191	+
	1192	+ ret = iommu_map(private->domain, SZ_2G, SZ_2G, (size_t)SZ_2G,
	1193	+ IOMMU_WRITE \| IOMMU_READ \| IOMMU_PRIV);
	1194	+ if (ret)
	1195	+ dev_err(drm_dev->dev, "failed to create 2G-4G pre mapping\n");
	1196	+ }
	1197	+
	1198	+ return ret;
1344	1199	}
1345	1200
1346	1201	static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
..	..	@@ -1350,6 +1205,10 @@
1350	1205	if (!is_support_iommu)
1351	1206	return;
1352	1207
	1208	+ if (iommu_reserve_map) {
	1209	+ iommu_unmap(private->domain, 0, (size_t)SZ_2G);
	1210	+ iommu_unmap(private->domain, SZ_2G, (size_t)SZ_2G);
	1211	+ }
1353	1212	drm_mm_takedown(&private->mm);
1354	1213	iommu_domain_free(private->domain);
1355	1214	}
..	..	@@ -1361,16 +1220,12 @@
1361	1220	struct drm_minor *minor = node->minor;
1362	1221	struct drm_device *drm_dev = minor->dev;
1363	1222	struct rockchip_drm_private *priv = drm_dev->dev_private;
1364		-
1365	1223	struct drm_printer p = drm_seq_file_printer(s);
1366	1224
1367	1225	if (!priv->domain)
1368	1226	return 0;
1369		-
1370	1227	mutex_lock(&priv->mm_lock);
1371		-
1372	1228	drm_mm_print(&priv->mm, &p);
1373		-
1374	1229	mutex_unlock(&priv->mm_lock);
1375	1230
1376	1231	return 0;
..	..	@@ -1440,21 +1295,15 @@
1440	1295	{ "mm_dump", rockchip_drm_mm_dump, 0, NULL },
1441	1296	};
1442	1297
1443		-static int rockchip_drm_debugfs_init(struct drm_minor *minor)
	1298	+static void rockchip_drm_debugfs_init(struct drm_minor *minor)
1444	1299	{
1445	1300	struct drm_device *dev = minor->dev;
1446	1301	struct rockchip_drm_private *priv = dev->dev_private;
1447	1302	struct drm_crtc *crtc;
1448		- int ret;
1449	1303
1450		- ret = drm_debugfs_create_files(rockchip_debugfs_files,
1451		- ARRAY_SIZE(rockchip_debugfs_files),
1452		- minor->debugfs_root,
1453		- minor);
1454		- if (ret) {
1455		- dev_err(dev->dev, "could not install rockchip_debugfs_list\n");
1456		- return ret;
1457		- }
	1304	+ drm_debugfs_create_files(rockchip_debugfs_files,
	1305	+ ARRAY_SIZE(rockchip_debugfs_files),
	1306	+ minor->debugfs_root, minor);
1458	1307
1459	1308	drm_for_each_crtc(crtc, dev) {
1460	1309	int pipe = drm_crtc_index(crtc);
..	..	@@ -1463,10 +1312,14 @@
1463	1312	priv->crtc_funcs[pipe]->debugfs_init)
1464	1313	priv->crtc_funcs[pipe]->debugfs_init(minor, crtc);
1465	1314	}
1466		-
1467		- return 0;
1468	1315	}
1469	1316	#endif
	1317	+
	1318	+static const struct drm_prop_enum_list split_area[] = {
	1319	+ { ROCKCHIP_DRM_SPLIT_UNSET, "UNSET" },
	1320	+ { ROCKCHIP_DRM_SPLIT_LEFT_SIDE, "LEFT" },
	1321	+ { ROCKCHIP_DRM_SPLIT_RIGHT_SIDE, "RIGHT" },
	1322	+};
1470	1323
1471	1324	static int rockchip_drm_create_properties(struct drm_device *dev)
1472	1325	{
..	..	@@ -1486,24 +1339,6 @@
1486	1339	private->color_space_prop = prop;
1487	1340
1488	1341	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1489		- "GLOBAL_ALPHA", 0, 255);
1490		- if (!prop)
1491		- return -ENOMEM;
1492		- private->global_alpha_prop = prop;
1493		-
1494		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1495		- "BLEND_MODE", 0, 1);
1496		- if (!prop)
1497		- return -ENOMEM;
1498		- private->blend_mode_prop = prop;
1499		-
1500		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1501		- "ALPHA_SCALE", 0, 1);
1502		- if (!prop)
1503		- return -ENOMEM;
1504		- private->alpha_scale_prop = prop;
1505		-
1506		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1507	1342	"ASYNC_COMMIT", 0, 1);
1508	1343	if (!prop)
1509	1344	return -ENOMEM;
..	..	@@ -1515,53 +1350,35 @@
1515	1350	return -ENOMEM;
1516	1351	private->share_id_prop = prop;
1517	1352
1518		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
	1353	+ prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
1519	1354	"CONNECTOR_ID", 0, 0xf);
1520	1355	if (!prop)
1521	1356	return -ENOMEM;
1522	1357	private->connector_id_prop = prop;
1523	1358
	1359	+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "SPLIT_AREA",
	1360	+ split_area,
	1361	+ ARRAY_SIZE(split_area));
	1362	+ private->split_area_prop = prop;
	1363	+
	1364	+ prop = drm_property_create_object(dev,
	1365	+ DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
	1366	+ "SOC_ID", DRM_MODE_OBJECT_CRTC);
	1367	+ private->soc_id_prop = prop;
	1368	+
	1369	+ prop = drm_property_create_object(dev,
	1370	+ DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
	1371	+ "PORT_ID", DRM_MODE_OBJECT_CRTC);
	1372	+ private->port_id_prop = prop;
	1373	+
	1374	+ private->aclk_prop = drm_property_create_range(dev, 0, "ACLK", 0, UINT_MAX);
	1375	+ private->bg_prop = drm_property_create_range(dev, 0, "BACKGROUND", 0, UINT_MAX);
	1376	+ private->line_flag_prop = drm_property_create_range(dev, 0, "LINE_FLAG1", 0, UINT_MAX);
	1377	+ private->cubic_lut_prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "CUBIC_LUT", 0);
	1378	+ private->cubic_lut_size_prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
	1379	+ "CUBIC_LUT_SIZE", 0, UINT_MAX);
	1380	+
1524	1381	return drm_mode_create_tv_properties(dev, 0, NULL);
1525		-}
1526		-
1527		-static int rockchip_gem_pool_init(struct drm_device *drm)
1528		-{
1529		- struct rockchip_drm_private *private = drm->dev_private;
1530		- struct device_node *np = drm->dev->of_node;
1531		- struct device_node *node;
1532		- phys_addr_t start, size;
1533		- struct resource res;
1534		- int ret;
1535		-
1536		- node = of_parse_phandle(np, "secure-memory-region", 0);
1537		- if (!node)
1538		- return -ENXIO;
1539		-
1540		- ret = of_address_to_resource(node, 0, &res);
1541		- if (ret)
1542		- return ret;
1543		- start = res.start;
1544		- size = resource_size(&res);
1545		- if (!size)
1546		- return -ENOMEM;
1547		-
1548		- private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
1549		- if (!private->secure_buffer_pool)
1550		- return -ENOMEM;
1551		-
1552		- gen_pool_add(private->secure_buffer_pool, start, size, -1);
1553		-
1554		- return 0;
1555		-}
1556		-
1557		-static void rockchip_gem_pool_destroy(struct drm_device *drm)
1558		-{
1559		- struct rockchip_drm_private *private = drm->dev_private;
1560		-
1561		- if (!private->secure_buffer_pool)
1562		- return;
1563		-
1564		- gen_pool_destroy(private->secure_buffer_pool);
1565	1382	}
1566	1383
1567	1384	static void rockchip_attach_connector_property(struct drm_device *drm)
..	..	@@ -1633,20 +1450,44 @@
1633	1450	drm_modeset_unlock_all(drm);
1634	1451	}
1635	1452
1636		-static bool is_support_hotplug(uint32_t output_type)
	1453	+static int rockchip_gem_pool_init(struct drm_device *drm)
1637	1454	{
1638		- switch (output_type) {
1639		- case DRM_MODE_CONNECTOR_DVII:
1640		- case DRM_MODE_CONNECTOR_DVID:
1641		- case DRM_MODE_CONNECTOR_DVIA:
1642		- case DRM_MODE_CONNECTOR_DisplayPort:
1643		- case DRM_MODE_CONNECTOR_HDMIA:
1644		- case DRM_MODE_CONNECTOR_HDMIB:
1645		- case DRM_MODE_CONNECTOR_TV:
1646		- return true;
1647		- default:
1648		- return false;
1649		- }
	1455	+ struct rockchip_drm_private *private = drm->dev_private;
	1456	+ struct device_node *np = drm->dev->of_node;
	1457	+ struct device_node *node;
	1458	+ phys_addr_t start, size;
	1459	+ struct resource res;
	1460	+ int ret;
	1461	+
	1462	+ node = of_parse_phandle(np, "secure-memory-region", 0);
	1463	+ if (!node)
	1464	+ return -ENXIO;
	1465	+
	1466	+ ret = of_address_to_resource(node, 0, &res);
	1467	+ if (ret)
	1468	+ return ret;
	1469	+ start = res.start;
	1470	+ size = resource_size(&res);
	1471	+ if (!size)
	1472	+ return -ENOMEM;
	1473	+
	1474	+ private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
	1475	+ if (!private->secure_buffer_pool)
	1476	+ return -ENOMEM;
	1477	+
	1478	+ gen_pool_add(private->secure_buffer_pool, start, size, -1);
	1479	+
	1480	+ return 0;
	1481	+}
	1482	+
	1483	+static void rockchip_gem_pool_destroy(struct drm_device *drm)
	1484	+{
	1485	+ struct rockchip_drm_private *private = drm->dev_private;
	1486	+
	1487	+ if (!private->secure_buffer_pool)
	1488	+ return;
	1489	+
	1490	+ gen_pool_destroy(private->secure_buffer_pool);
1650	1491	}
1651	1492
1652	1493	static int rockchip_drm_bind(struct device *dev)
..	..	@@ -1654,9 +1495,6 @@
1654	1495	struct drm_device *drm_dev;
1655	1496	struct rockchip_drm_private *private;
1656	1497	int ret;
1657		- struct device_node *np = dev->of_node;
1658		- struct device_node *parent_np;
1659		- struct drm_crtc *crtc;
1660	1498
1661	1499	drm_dev = drm_dev_alloc(&rockchip_drm_driver, dev);
1662	1500	if (IS_ERR(drm_dev))
..	..	@@ -1670,35 +1508,16 @@
1670	1508	goto err_free;
1671	1509	}
1672	1510
1673		- mutex_init(&private->commit_lock);
1674	1511	mutex_init(&private->ovl_lock);
1675		- INIT_WORK(&private->commit_work, rockchip_drm_atomic_work);
	1512	+
1676	1513	drm_dev->dev_private = private;
1677	1514
1678		- private->dmc_support = false;
1679		- private->devfreq = devfreq_get_devfreq_by_phandle(dev, 0);
1680		- if (IS_ERR(private->devfreq)) {
1681		- if (PTR_ERR(private->devfreq) == -EPROBE_DEFER) {
1682		- parent_np = of_parse_phandle(np, "devfreq", 0);
1683		- if (parent_np &&
1684		- of_device_is_available(parent_np)) {
1685		- private->dmc_support = true;
1686		- dev_warn(dev, "defer getting devfreq\n");
1687		- } else {
1688		- dev_info(dev, "dmc is disabled\n");
1689		- }
1690		- } else {
1691		- dev_info(dev, "devfreq is not set\n");
1692		- }
1693		- private->devfreq = NULL;
1694		- } else {
1695		- private->dmc_support = true;
1696		- dev_info(dev, "devfreq is ready\n");
1697		- }
1698		- private->hdmi_pll.pll = devm_clk_get(dev, "hdmi-tmds-pll");
1699		- if (PTR_ERR(private->hdmi_pll.pll) == -ENOENT) {
1700		- private->hdmi_pll.pll = NULL;
1701		- } else if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
	1515	+ INIT_LIST_HEAD(&private->psr_list);
	1516	+ mutex_init(&private->psr_list_lock);
	1517	+ mutex_init(&private->commit_lock);
	1518	+
	1519	+ private->hdmi_pll.pll = devm_clk_get_optional(dev, "hdmi-tmds-pll");
	1520	+ if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
1702	1521	ret = -EPROBE_DEFER;
1703	1522	goto err_free;
1704	1523	} else if (IS_ERR(private->hdmi_pll.pll)) {
..	..	@@ -1706,10 +1525,8 @@
1706	1525	ret = PTR_ERR(private->hdmi_pll.pll);
1707	1526	goto err_free;
1708	1527	}
1709		- private->default_pll.pll = devm_clk_get(dev, "default-vop-pll");
1710		- if (PTR_ERR(private->default_pll.pll) == -ENOENT) {
1711		- private->default_pll.pll = NULL;
1712		- } else if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
	1528	+ private->default_pll.pll = devm_clk_get_optional(dev, "default-vop-pll");
	1529	+ if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
1713	1530	ret = -EPROBE_DEFER;
1714	1531	goto err_free;
1715	1532	} else if (IS_ERR(private->default_pll.pll)) {
..	..	@@ -1718,14 +1535,9 @@
1718	1535	goto err_free;
1719	1536	}
1720	1537
1721		- INIT_LIST_HEAD(&private->psr_list);
1722		- mutex_init(&private->psr_list_lock);
1723		-
1724		- ret = rockchip_drm_init_iommu(drm_dev);
	1538	+ ret = drmm_mode_config_init(drm_dev);
1725	1539	if (ret)
1726	1540	goto err_free;
1727		-
1728		- drm_mode_config_init(drm_dev);
1729	1541
1730	1542	rockchip_drm_mode_config_init(drm_dev);
1731	1543	rockchip_drm_create_properties(drm_dev);
..	..	@@ -1751,50 +1563,40 @@
1751	1563	/* init kms poll for handling hpd */
1752	1564	drm_kms_helper_poll_init(drm_dev);
1753	1565
1754		- private->page_pools = dmabuf_page_pool_create(GFP_HIGHUSER \| __GFP_ZERO \| __GFP_COMP, 0);
	1566	+ ret = rockchip_drm_init_iommu(drm_dev);
	1567	+ if (ret)
	1568	+ goto err_unbind_all;
1755	1569
1756	1570	rockchip_gem_pool_init(drm_dev);
1757		-#ifndef MODULE
1758		- show_loader_logo(drm_dev);
1759		-#endif
1760	1571	ret = of_reserved_mem_device_init(drm_dev->dev);
1761	1572	if (ret)
1762	1573	DRM_DEBUG_KMS("No reserved memory region assign to drm\n");
1763	1574
	1575	+ rockchip_drm_show_logo(drm_dev);
	1576	+
1764	1577	ret = rockchip_drm_fbdev_init(drm_dev);
1765	1578	if (ret)
1766		- goto err_kms_helper_poll_fini;
1767		-
1768		- drm_for_each_crtc(crtc, drm_dev) {
1769		- struct drm_fb_helper *helper = private->fbdev_helper;
1770		- struct rockchip_crtc_state *s = NULL;
1771		-
1772		- if (!helper)
1773		- break;
1774		-
1775		- s = to_rockchip_crtc_state(crtc->state);
1776		- if (is_support_hotplug(s->output_type))
1777		- drm_framebuffer_get(helper->fb);
1778		- }
	1579	+ goto err_iommu_cleanup;
1779	1580
1780	1581	drm_dev->mode_config.allow_fb_modifiers = true;
1781	1582
1782	1583	ret = drm_dev_register(drm_dev, 0);
1783	1584	if (ret)
1784		- goto err_fbdev_fini;
	1585	+ goto err_kms_helper_poll_fini;
	1586	+
	1587	+ rockchip_clk_unprotect();
1785	1588
1786	1589	return 0;
1787		-err_fbdev_fini:
1788		- rockchip_drm_fbdev_fini(drm_dev);
1789	1590	err_kms_helper_poll_fini:
1790	1591	rockchip_gem_pool_destroy(drm_dev);
1791	1592	drm_kms_helper_poll_fini(drm_dev);
	1593	+ rockchip_drm_fbdev_fini(drm_dev);
	1594	+err_iommu_cleanup:
	1595	+ rockchip_iommu_cleanup(drm_dev);
1792	1596	err_unbind_all:
1793		- dmabuf_page_pool_destroy(private->page_pools);
1794	1597	component_unbind_all(dev, drm_dev);
1795	1598	err_mode_config_cleanup:
1796	1599	drm_mode_config_cleanup(drm_dev);
1797		- rockchip_iommu_cleanup(drm_dev);
1798	1600	err_free:
1799	1601	drm_dev->dev_private = NULL;
1800	1602	dev_set_drvdata(dev, NULL);
..	..	@@ -1951,61 +1753,20 @@
1951	1753	return rockchip_gem_prime_end_cpu_access(obj, dir);
1952	1754	}
1953	1755
1954		-static int rockchip_drm_gem_begin_cpu_access_partial(
1955		- struct dma_buf *dma_buf,
1956		- enum dma_data_direction dir,
1957		- unsigned int offset, unsigned int len)
1958		-{
1959		- struct drm_gem_object *obj = dma_buf->priv;
1960		-
1961		- return rockchip_gem_prime_begin_cpu_access_partial(obj, dir, offset, len);
1962		-}
1963		-
1964		-static int rockchip_drm_gem_end_cpu_access_partial(
1965		- struct dma_buf *dma_buf,
1966		- enum dma_data_direction dir,
1967		- unsigned int offset, unsigned int len)
1968		-{
1969		- struct drm_gem_object *obj = dma_buf->priv;
1970		-
1971		- return rockchip_gem_prime_end_cpu_access_partial(obj, dir, offset, len);
1972		-}
1973		-
1974	1756	static const struct dma_buf_ops rockchip_drm_gem_prime_dmabuf_ops = {
	1757	+ .cache_sgt_mapping = true,
1975	1758	.attach = drm_gem_map_attach,
1976	1759	.detach = drm_gem_map_detach,
1977	1760	.map_dma_buf = drm_gem_map_dma_buf,
1978	1761	.unmap_dma_buf = drm_gem_unmap_dma_buf,
1979	1762	.release = drm_gem_dmabuf_release,
1980		- .map = drm_gem_dmabuf_kmap,
1981		- .unmap = drm_gem_dmabuf_kunmap,
1982	1763	.mmap = drm_gem_dmabuf_mmap,
1983	1764	.vmap = drm_gem_dmabuf_vmap,
1984	1765	.vunmap = drm_gem_dmabuf_vunmap,
	1766	+ .get_uuid = drm_gem_dmabuf_get_uuid,
1985	1767	.begin_cpu_access = rockchip_drm_gem_dmabuf_begin_cpu_access,
1986	1768	.end_cpu_access = rockchip_drm_gem_dmabuf_end_cpu_access,
1987		- .begin_cpu_access_partial = rockchip_drm_gem_begin_cpu_access_partial,
1988		- .end_cpu_access_partial = rockchip_drm_gem_end_cpu_access_partial,
1989	1769	};
1990		-
1991		-#ifdef CONFIG_ARCH_ROCKCHIP
1992		-static void drm_gem_prime_dmabuf_release_callback(void *data)
1993		-{
1994		- struct drm_prime_callback_data *cb_data = data;
1995		-
1996		- if (cb_data && cb_data->obj && cb_data->obj->import_attach) {
1997		- struct dma_buf_attachment *attach = cb_data->obj->import_attach;
1998		- struct sg_table *sgt = cb_data->sgt;
1999		-
2000		- if (sgt)
2001		- dma_buf_unmap_attachment(attach, sgt,
2002		- DMA_BIDIRECTIONAL);
2003		- dma_buf_detach(attach->dmabuf, attach);
2004		- drm_gem_object_put_unlocked(cb_data->obj);
2005		- kfree(cb_data);
2006		- }
2007		-}
2008		-#endif
2009	1770
2010	1771	static struct drm_gem_object rockchip_drm_gem_prime_import_dev(struct drm_device dev,
2011	1772	struct dma_buf *dma_buf,
..	..	@@ -2014,9 +1775,6 @@
2014	1775	struct dma_buf_attachment *attach;
2015	1776	struct sg_table *sgt;
2016	1777	struct drm_gem_object *obj;
2017		-#ifdef CONFIG_ARCH_ROCKCHIP
2018		- struct drm_prime_callback_data *cb_data = NULL;
2019		-#endif
2020	1778	int ret;
2021	1779
2022	1780	if (dma_buf->ops == &rockchip_drm_gem_prime_dmabuf_ops) {
..	..	@@ -2031,15 +1789,6 @@
2031	1789	}
2032	1790	}
2033	1791
2034		-#ifdef CONFIG_ARCH_ROCKCHIP
2035		- cb_data = dma_buf_get_release_callback_data(dma_buf,
2036		- drm_gem_prime_dmabuf_release_callback);
2037		- if (cb_data && cb_data->obj && cb_data->obj->dev == dev) {
2038		- drm_gem_object_get(cb_data->obj);
2039		- return cb_data->obj;
2040		- }
2041		-#endif
2042		-
2043	1792	if (!dev->driver->gem_prime_import_sg_table)
2044	1793	return ERR_PTR(-EINVAL);
2045	1794
..	..	@@ -2048,14 +1797,6 @@
2048	1797	return ERR_CAST(attach);
2049	1798
2050	1799	get_dma_buf(dma_buf);
2051		-
2052		-#ifdef CONFIG_ARCH_ROCKCHIP
2053		- cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
2054		- if (!cb_data) {
2055		- ret = -ENOMEM;
2056		- goto fail_detach;
2057		- }
2058		-#endif
2059	1800
2060	1801	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
2061	1802	if (IS_ERR(sgt)) {
..	..	@@ -2070,24 +1811,13 @@
2070	1811	}
2071	1812
2072	1813	obj->import_attach = attach;
2073		-
2074		-#ifdef CONFIG_ARCH_ROCKCHIP
2075		- cb_data->obj = obj;
2076		- cb_data->sgt = sgt;
2077		- dma_buf_set_release_callback(dma_buf,
2078		- drm_gem_prime_dmabuf_release_callback, cb_data);
2079		- dma_buf_put(dma_buf);
2080		- drm_gem_object_get(obj);
2081		-#endif
	1814	+ obj->resv = dma_buf->resv;
2082	1815
2083	1816	return obj;
2084	1817
2085	1818	fail_unmap:
2086	1819	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
2087	1820	fail_detach:
2088		-#ifdef CONFIG_ARCH_ROCKCHIP
2089		- kfree(cb_data);
2090		-#endif
2091	1821	dma_buf_detach(dma_buf, attach);
2092	1822	dma_buf_put(dma_buf);
2093	1823
..	..	@@ -2100,10 +1830,10 @@
2100	1830	return rockchip_drm_gem_prime_import_dev(dev, dma_buf, dev->dev);
2101	1831	}
2102	1832
2103		-static struct dma_buf rockchip_drm_gem_prime_export(struct drm_device dev,
2104		- struct drm_gem_object *obj,
	1833	+static struct dma_buf rockchip_drm_gem_prime_export(struct drm_gem_object obj,
2105	1834	int flags)
2106	1835	{
	1836	+ struct drm_device *dev = obj->dev;
2107	1837	struct dma_buf_export_info exp_info = {
2108	1838	.exp_name = KBUILD_MODNAME, /* white lie for debug */
2109	1839	.owner = dev->driver->fops->owner,
..	..	@@ -2111,26 +1841,20 @@
2111	1841	.size = obj->size,
2112	1842	.flags = flags,
2113	1843	.priv = obj,
	1844	+ .resv = obj->resv,
2114	1845	};
2115		-
2116		- if (dev->driver->gem_prime_res_obj)
2117		- exp_info.resv = dev->driver->gem_prime_res_obj(obj);
2118	1846
2119	1847	return drm_gem_dmabuf_export(dev, &exp_info);
2120	1848	}
2121	1849
2122	1850	static struct drm_driver rockchip_drm_driver = {
2123		- .driver_features = DRIVER_MODESET \| DRIVER_GEM \|
2124		- DRIVER_PRIME \| DRIVER_ATOMIC \|
2125		- DRIVER_RENDER,
	1851	+ .driver_features = DRIVER_MODESET \| DRIVER_GEM \| DRIVER_ATOMIC \| DRIVER_RENDER,
2126	1852	.postclose = rockchip_drm_postclose,
2127	1853	.lastclose = rockchip_drm_lastclose,
2128	1854	.open = rockchip_drm_open,
2129	1855	.gem_vm_ops = &drm_gem_cma_vm_ops,
2130	1856	.gem_free_object_unlocked = rockchip_gem_free_object,
2131	1857	.dumb_create = rockchip_gem_dumb_create,
2132		- .dumb_map_offset = rockchip_gem_dumb_map_offset,
2133		- .dumb_destroy = drm_gem_dumb_destroy,
2134	1858	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
2135	1859	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
2136	1860	.gem_prime_import = rockchip_drm_gem_prime_import,
..	..	@@ -2151,64 +1875,21 @@
2151	1875	.date = DRIVER_DATE,
2152	1876	.major = DRIVER_MAJOR,
2153	1877	.minor = DRIVER_MINOR,
2154		- .patchlevel = DRIVER_PATCH,
2155	1878	};
2156	1879
2157	1880	#ifdef CONFIG_PM_SLEEP
2158		-static void rockchip_drm_fb_suspend(struct drm_device *drm)
2159		-{
2160		- struct rockchip_drm_private *priv = drm->dev_private;
2161		-
2162		- console_lock();
2163		- drm_fb_helper_set_suspend(priv->fbdev_helper, 1);
2164		- console_unlock();
2165		-}
2166		-
2167		-static void rockchip_drm_fb_resume(struct drm_device *drm)
2168		-{
2169		- struct rockchip_drm_private *priv = drm->dev_private;
2170		-
2171		- console_lock();
2172		- drm_fb_helper_set_suspend(priv->fbdev_helper, 0);
2173		- console_unlock();
2174		-}
2175		-
2176	1881	static int rockchip_drm_sys_suspend(struct device *dev)
2177	1882	{
2178	1883	struct drm_device *drm = dev_get_drvdata(dev);
2179		- struct rockchip_drm_private *priv;
2180	1884
2181		- if (!drm)
2182		- return 0;
2183		-
2184		- drm_kms_helper_poll_disable(drm);
2185		- rockchip_drm_fb_suspend(drm);
2186		-
2187		- priv = drm->dev_private;
2188		- priv->state = drm_atomic_helper_suspend(drm);
2189		- if (IS_ERR(priv->state)) {
2190		- rockchip_drm_fb_resume(drm);
2191		- drm_kms_helper_poll_enable(drm);
2192		- return PTR_ERR(priv->state);
2193		- }
2194		-
2195		- return 0;
	1885	+ return drm_mode_config_helper_suspend(drm);
2196	1886	}
2197	1887
2198	1888	static int rockchip_drm_sys_resume(struct device *dev)
2199	1889	{
2200	1890	struct drm_device *drm = dev_get_drvdata(dev);
2201		- struct rockchip_drm_private *priv;
2202	1891
2203		- if (!drm)
2204		- return 0;
2205		-
2206		- priv = drm->dev_private;
2207		- drm_atomic_helper_resume(drm, priv->state);
2208		- rockchip_drm_fb_resume(drm);
2209		- drm_kms_helper_poll_enable(drm);
2210		-
2211		- return 0;
	1892	+ return drm_mode_config_helper_resume(drm);
2212	1893	}
2213	1894	#endif
2214	1895
..	..	@@ -2220,6 +1901,53 @@
2220	1901	#define MAX_ROCKCHIP_SUB_DRIVERS 16
2221	1902	static struct platform_driver *rockchip_sub_drivers[MAX_ROCKCHIP_SUB_DRIVERS];
2222	1903	static int num_rockchip_sub_drivers;
	1904	+
	1905	+/*
	1906	+ * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
	1907	+ * Should be called from the component bind stage of the drivers
	1908	+ * to ensure that all subdrivers are probed.
	1909	+ *
	1910	+ * @ep: endpoint of a rockchip vop
	1911	+ *
	1912	+ * returns true if subdriver, false if external bridge and -ENODEV
	1913	+ * if remote port does not contain a device.
	1914	+ */
	1915	+int rockchip_drm_endpoint_is_subdriver(struct device_node *ep)
	1916	+{
	1917	+ struct device_node *node = of_graph_get_remote_port_parent(ep);
	1918	+ struct platform_device *pdev;
	1919	+ struct device_driver *drv;
	1920	+ int i;
	1921	+
	1922	+ if (!node)
	1923	+ return -ENODEV;
	1924	+
	1925	+ /* status disabled will prevent creation of platform-devices */
	1926	+ pdev = of_find_device_by_node(node);
	1927	+ of_node_put(node);
	1928	+ if (!pdev)
	1929	+ return -ENODEV;
	1930	+
	1931	+ /*
	1932	+ * All rockchip subdrivers have probed at this point, so
	1933	+ * any device not having a driver now is an external bridge.
	1934	+ */
	1935	+ drv = pdev->dev.driver;
	1936	+ if (!drv) {
	1937	+ platform_device_put(pdev);
	1938	+ return false;
	1939	+ }
	1940	+
	1941	+ for (i = 0; i < num_rockchip_sub_drivers; i++) {
	1942	+ if (rockchip_sub_drivers[i] == to_platform_driver(drv)) {
	1943	+ platform_device_put(pdev);
	1944	+ return true;
	1945	+ }
	1946	+ }
	1947	+
	1948	+ platform_device_put(pdev);
	1949	+ return false;
	1950	+}
2223	1951
2224	1952	static int compare_dev(struct device dev, void data)
2225	1953	{
..	..	@@ -2244,8 +1972,7 @@
2244	1972	struct device p = NULL, d;
2245	1973
2246	1974	do {
2247		- d = bus_find_device(&platform_bus_type, p, &drv->driver,
2248		- (void *)platform_bus_type.match);
	1975	+ d = platform_find_device_by_driver(p, &drv->driver);
2249	1976	put_device(p);
2250	1977	p = d;
2251	1978
..	..	@@ -2291,7 +2018,7 @@
2291	2018	}
2292	2019
2293	2020	iommu = of_parse_phandle(port->parent, "iommus", 0);
2294		- if (!iommu \|\| !of_device_is_available(iommu->parent)) {
	2021	+ if (!iommu \|\| !of_device_is_available(iommu)) {
2295	2022	DRM_DEV_DEBUG(dev,
2296	2023	"no iommu attached for %pOF, using non-iommu buffers\n",
2297	2024	port->parent);
..	..	@@ -2304,6 +2031,7 @@
2304	2031
2305	2032	found = true;
2306	2033
	2034	+ iommu_reserve_map \|= of_property_read_bool(iommu, "rockchip,reserve-map");
2307	2035	of_node_put(iommu);
2308	2036	of_node_put(port);
2309	2037	}
..	..	@@ -2338,14 +2066,19 @@
2338	2066	if (IS_ERR(match))
2339	2067	return PTR_ERR(match);
2340	2068
	2069	+ ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
	2070	+ if (ret)
	2071	+ goto err;
	2072	+
2341	2073	ret = component_master_add_with_match(dev, &rockchip_drm_ops, match);
2342		- if (ret < 0) {
2343		- rockchip_drm_match_remove(dev);
2344		- return ret;
2345		- }
2346		- dev->coherent_dma_mask = DMA_BIT_MASK(64);
	2074	+ if (ret < 0)
	2075	+ goto err;
2347	2076
2348	2077	return 0;
	2078	+err:
	2079	+ rockchip_drm_match_remove(dev);
	2080	+
	2081	+ return ret;
2349	2082	}
2350	2083
2351	2084	static int rockchip_drm_platform_remove(struct platform_device *pdev)
..	..	@@ -2361,10 +2094,8 @@
2361	2094	{
2362	2095	struct drm_device *drm = platform_get_drvdata(pdev);
2363	2096
2364		- if (drm) {
2365		- drm_kms_helper_poll_fini(drm);
	2097	+ if (drm)
2366	2098	drm_atomic_helper_shutdown(drm);
2367		- }
2368	2099	}
2369	2100
2370	2101	static const struct of_device_id rockchip_drm_dt_ids[] = {
..	..	@@ -2400,6 +2131,7 @@
2400	2131	#else
2401	2132	ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
2402	2133	ADD_ROCKCHIP_SUB_DRIVER(vop2_platform_driver, CONFIG_ROCKCHIP_VOP2);
	2134	+ ADD_ROCKCHIP_SUB_DRIVER(vconn_platform_driver, CONFIG_ROCKCHIP_VCONN);
2403	2135	ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
2404	2136	CONFIG_ROCKCHIP_LVDS);
2405	2137	ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,
..	..	@@ -2407,12 +2139,17 @@
2407	2139	ADD_ROCKCHIP_SUB_DRIVER(cdn_dp_driver, CONFIG_ROCKCHIP_CDN_DP);
2408	2140	ADD_ROCKCHIP_SUB_DRIVER(dw_hdmi_rockchip_pltfm_driver,
2409	2141	CONFIG_ROCKCHIP_DW_HDMI);
2410		- ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_driver,
	2142	+ ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_rockchip_driver,
	2143	+ CONFIG_ROCKCHIP_DW_MIPI_DSI);
	2144	+ ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi2_rockchip_driver,
2411	2145	CONFIG_ROCKCHIP_DW_MIPI_DSI);
2412	2146	ADD_ROCKCHIP_SUB_DRIVER(inno_hdmi_driver, CONFIG_ROCKCHIP_INNO_HDMI);
2413		- ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver,
2414		- CONFIG_ROCKCHIP_DRM_TVE);
	2147	+ ADD_ROCKCHIP_SUB_DRIVER(rk3066_hdmi_driver,
	2148	+ CONFIG_ROCKCHIP_RK3066_HDMI);
2415	2149	ADD_ROCKCHIP_SUB_DRIVER(rockchip_rgb_driver, CONFIG_ROCKCHIP_RGB);
	2150	+ ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver, CONFIG_ROCKCHIP_DRM_TVE);
	2151	+ ADD_ROCKCHIP_SUB_DRIVER(dw_dp_driver, CONFIG_ROCKCHIP_DW_DP);
	2152	+
2416	2153	#endif
2417	2154	ret = platform_register_drivers(rockchip_sub_drivers,
2418	2155	num_rockchip_sub_drivers);
..	..	@@ -2422,6 +2159,8 @@
2422	2159	ret = platform_driver_register(&rockchip_drm_platform_driver);
2423	2160	if (ret)
2424	2161	goto err_unreg_drivers;
	2162	+
	2163	+ rockchip_gem_get_ddr_info();
2425	2164
2426	2165	return 0;
2427	2166
..	..	@@ -2439,7 +2178,11 @@
2439	2178	num_rockchip_sub_drivers);
2440	2179	}
2441	2180
	2181	+#ifdef CONFIG_VIDEO_REVERSE_IMAGE
	2182	+fs_initcall(rockchip_drm_init);
	2183	+#else
2442	2184	module_init(rockchip_drm_init);
	2185	+#endif
2443	2186	module_exit(rockchip_drm_fini);
2444	2187
2445	2188	MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");