~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,62 +1,49 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3	4	* Author:Mark Yao <mark.yao@rock-chips.com>
4	5	*
5	6	* based on exynos_drm_drv.c
6		- *
7		- * This software is licensed under the terms of the GNU General Public
8		- * License version 2, as published by the Free Software Foundation, and
9		- * may be copied, distributed, and modified under those terms.
10		- *
11		- * This program is distributed in the hope that it will be useful,
12		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14		- * GNU General Public License for more details.
15	7	*/
16	8
17		-#include <drm/drmP.h>
18		-#include <drm/drm_atomic.h>
19		-#include <drm/drm_crtc_helper.h>
20		-#include <drm/drm_fb_helper.h>
21		-#include <drm/drm_gem_cma_helper.h>
22		-#include <drm/drm_of.h>
23		-#include <linux/devfreq.h>
24		-#include <linux/dma-buf.h>
	9	+#include <linux/dma-buf-cache.h>
25	10	#include <linux/dma-mapping.h>
26	11	#include <linux/dma-iommu.h>
27	12	#include <linux/genalloc.h>
28	13	#include <linux/pm_runtime.h>
29		-#include <linux/memblock.h>
30	14	#include <linux/module.h>
31	15	#include <linux/of_address.h>
32	16	#include <linux/of_graph.h>
	17	+#include <linux/of_platform.h>
33	18	#include <linux/clk.h>
34		-#include <linux/clk-provider.h>
35	19	#include <linux/component.h>
36	20	#include <linux/console.h>
37	21	#include <linux/iommu.h>
38	22	#include <linux/of_reserved_mem.h>
39	23
	24	+#include <drm/drm_debugfs.h>
	25	+#include <drm/drm_drv.h>
	26	+#include <drm/drm_displayid.h>
	27	+#include <drm/drm_fb_helper.h>
	28	+#include <drm/drm_gem_cma_helper.h>
	29	+#include <drm/drm_of.h>
	30	+#include <drm/drm_probe_helper.h>
	31	+#include <drm/drm_vblank.h>
	32	+
40	33	#include "rockchip_drm_drv.h"
41	34	#include "rockchip_drm_fb.h"
42	35	#include "rockchip_drm_fbdev.h"
43	36	#include "rockchip_drm_gem.h"
	37	+#include "rockchip_drm_logo.h"
44	38
45		-#include "../drm_internal.h"
	39	+#include "../drm_crtc_internal.h"
	40	+#include "../drivers/clk/rockchip/clk.h"
46	41
47	42	#define DRIVER_NAME "rockchip"
48	43	#define DRIVER_DESC "RockChip Soc DRM"
49	44	#define DRIVER_DATE "20140818"
50		-#define DRIVER_MAJOR 2
	45	+#define DRIVER_MAJOR 3
51	46	#define DRIVER_MINOR 0
52		-#define DRIVER_PATCH 0
53		-
54		-/***********************************************************************
55		- * Rockchip DRM driver version
56		- *
57		- * v2.0.0 : add basic version for linux 4.19 rockchip drm driver(hjc)
58		- *
59		- **********************************************************************/
60	47
61	48	#if IS_ENABLED(CONFIG_DRM_ROCKCHIP_VVOP)
62	49	static bool is_support_iommu = false;
..	..	@@ -64,40 +51,234 @@
64	51	static bool is_support_iommu = true;
65	52	#endif
66	53	static bool iommu_reserve_map;
	54	+
67	55	static struct drm_driver rockchip_drm_driver;
68	56
69		-struct rockchip_drm_mode_set {
70		- struct list_head head;
71		- struct drm_framebuffer *fb;
72		- struct drm_connector *connector;
73		- struct drm_crtc *crtc;
74		- struct drm_display_mode *mode;
75		- int clock;
76		- int hdisplay;
77		- int vdisplay;
78		- int vrefresh;
79		- int flags;
80		- int picture_aspect_ratio;
81		- int crtc_hsync_end;
82		- int crtc_vsync_end;
	57	+static unsigned int drm_debug;
	58	+module_param_named(debug, drm_debug, int, 0600);
83	59
84		- int left_margin;
85		- int right_margin;
86		- int top_margin;
87		- int bottom_margin;
	60	+static inline bool rockchip_drm_debug_enabled(enum rockchip_drm_debug_category category)
	61	+{
	62	+ return unlikely(drm_debug & category);
	63	+}
88	64
89		- unsigned int brightness;
90		- unsigned int contrast;
91		- unsigned int saturation;
92		- unsigned int hue;
	65	+__printf(3, 4)
	66	+void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category,
	67	+ const char *format, ...)
	68	+{
	69	+ struct va_format vaf;
	70	+ va_list args;
93	71
94		- bool mode_changed;
95		- bool force_output;
96		- int ratio;
97		-};
	72	+ if (!rockchip_drm_debug_enabled(category))
	73	+ return;
	74	+
	75	+ va_start(args, format);
	76	+ vaf.fmt = format;
	77	+ vaf.va = &args;
	78	+
	79	+ if (dev)
	80	+ dev_printk(KERN_DEBUG, dev, "%pV", &vaf);
	81	+ else
	82	+ printk(KERN_DEBUG "%pV", &vaf);
	83	+
	84	+ va_end(args);
	85	+}
	86	+
	87	+/**
	88	+ * rockchip_drm_wait_vact_end
	89	+ * @crtc: CRTC to enable line flag
	90	+ * @mstimeout: millisecond for timeout
	91	+ *
	92	+ * Wait for vact_end line flag irq or timeout.
	93	+ *
	94	+ * Returns:
	95	+ * Zero on success, negative errno on failure.
	96	+ */
	97	+int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)
	98	+{
	99	+ struct rockchip_drm_private *priv;
	100	+ int pipe, ret = 0;
	101	+
	102	+ if (!crtc)
	103	+ return -ENODEV;
	104	+
	105	+ if (mstimeout <= 0)
	106	+ return -EINVAL;
	107	+
	108	+ priv = crtc->dev->dev_private;
	109	+ pipe = drm_crtc_index(crtc);
	110	+
	111	+ if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->wait_vact_end)
	112	+ ret = priv->crtc_funcs[pipe]->wait_vact_end(crtc, mstimeout);
	113	+
	114	+ return ret;
	115	+}
	116	+EXPORT_SYMBOL(rockchip_drm_wait_vact_end);
	117	+
	118	+void drm_mode_convert_to_split_mode(struct drm_display_mode *mode)
	119	+{
	120	+ u16 hactive, hfp, hsync, hbp;
	121	+
	122	+ hactive = mode->hdisplay;
	123	+ hfp = mode->hsync_start - mode->hdisplay;
	124	+ hsync = mode->hsync_end - mode->hsync_start;
	125	+ hbp = mode->htotal - mode->hsync_end;
	126	+
	127	+ mode->clock *= 2;
	128	+ mode->crtc_clock *= 2;
	129	+ mode->hdisplay = hactive * 2;
	130	+ mode->hsync_start = mode->hdisplay + hfp * 2;
	131	+ mode->hsync_end = mode->hsync_start + hsync * 2;
	132	+ mode->htotal = mode->hsync_end + hbp * 2;
	133	+ drm_mode_set_name(mode);
	134	+}
	135	+EXPORT_SYMBOL(drm_mode_convert_to_split_mode);
	136	+
	137	+void drm_mode_convert_to_origin_mode(struct drm_display_mode *mode)
	138	+{
	139	+ u16 hactive, hfp, hsync, hbp;
	140	+
	141	+ hactive = mode->hdisplay;
	142	+ hfp = mode->hsync_start - mode->hdisplay;
	143	+ hsync = mode->hsync_end - mode->hsync_start;
	144	+ hbp = mode->htotal - mode->hsync_end;
	145	+
	146	+ mode->clock /= 2;
	147	+ mode->crtc_clock /= 2;
	148	+ mode->hdisplay = hactive / 2;
	149	+ mode->hsync_start = mode->hdisplay + hfp / 2;
	150	+ mode->hsync_end = mode->hsync_start + hsync / 2;
	151	+ mode->htotal = mode->hsync_end + hbp / 2;
	152	+}
	153	+EXPORT_SYMBOL(drm_mode_convert_to_origin_mode);
	154	+
	155	+/**
	156	+ * drm_connector_oob_hotplug_event - Report out-of-band hotplug event to connector
	157	+ * @connector: connector to report the event on
	158	+ *
	159	+ * On some hardware a hotplug event notification may come from outside the display
	160	+ * driver / device. An example of this is some USB Type-C setups where the hardware
	161	+ * muxes the DisplayPort data and aux-lines but does not pass the altmode HPD
	162	+ * status bit to the GPU's DP HPD pin.
	163	+ *
	164	+ * This function can be used to report these out-of-band events after obtaining
	165	+ * a drm_connector reference through calling drm_connector_find_by_fwnode().
	166	+ */
	167	+void drm_connector_oob_hotplug_event(struct fwnode_handle *connector_fwnode)
	168	+{
	169	+ struct rockchip_drm_sub_dev *sub_dev;
	170	+
	171	+ if (!connector_fwnode \|\| !connector_fwnode->dev)
	172	+ return;
	173	+
	174	+ sub_dev = rockchip_drm_get_sub_dev(dev_of_node(connector_fwnode->dev));
	175	+
	176	+ if (sub_dev && sub_dev->connector && sub_dev->oob_hotplug_event)
	177	+ sub_dev->oob_hotplug_event(sub_dev->connector);
	178	+}
	179	+EXPORT_SYMBOL(drm_connector_oob_hotplug_event);
	180	+
	181	+uint32_t rockchip_drm_get_bpp(const struct drm_format_info *info)
	182	+{
	183	+ /* use whatever a driver has set */
	184	+ if (info->cpp[0])
	185	+ return info->cpp[0] * 8;
	186	+
	187	+ switch (info->format) {
	188	+ case DRM_FORMAT_YUV420_8BIT:
	189	+ return 12;
	190	+ case DRM_FORMAT_YUV420_10BIT:
	191	+ return 15;
	192	+ case DRM_FORMAT_VUY101010:
	193	+ return 30;
	194	+ default:
	195	+ break;
	196	+ }
	197	+
	198	+ /* all attempts failed */
	199	+ return 0;
	200	+}
	201	+EXPORT_SYMBOL(rockchip_drm_get_bpp);
	202	+
	203	+uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format)
	204	+{
	205	+ switch (bus_format) {
	206	+ case MEDIA_BUS_FMT_RGB565_1X16:
	207	+ case MEDIA_BUS_FMT_RGB666_1X18:
	208	+ case MEDIA_BUS_FMT_RGB888_1X24:
	209	+ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
	210	+ return 1;
	211	+ case MEDIA_BUS_FMT_RGB565_2X8_LE:
	212	+ case MEDIA_BUS_FMT_BGR565_2X8_LE:
	213	+ return 2;
	214	+ case MEDIA_BUS_FMT_RGB666_3X6:
	215	+ case MEDIA_BUS_FMT_RGB888_3X8:
	216	+ case MEDIA_BUS_FMT_BGR888_3X8:
	217	+ return 3;
	218	+ case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
	219	+ case MEDIA_BUS_FMT_BGR888_DUMMY_4X8:
	220	+ return 4;
	221	+ default:
	222	+ return 1;
	223	+ }
	224	+}
	225	+EXPORT_SYMBOL(rockchip_drm_get_cycles_per_pixel);
	226	+
	227	+/**
	228	+ * rockchip_drm_of_find_possible_crtcs - find the possible CRTCs for an active
	229	+ * encoder port
	230	+ * @dev: DRM device
	231	+ * @port: encoder port to scan for endpoints
	232	+ *
	233	+ * Scan all active endpoints attached to a port, locate their attached CRTCs,
	234	+ * and generate the DRM mask of CRTCs which may be attached to this
	235	+ * encoder.
	236	+ *
	237	+ * See Documentation/devicetree/bindings/graph.txt for the bindings.
	238	+ */
	239	+uint32_t rockchip_drm_of_find_possible_crtcs(struct drm_device *dev,
	240	+ struct device_node *port)
	241	+{
	242	+ struct device_node remote_port, ep;
	243	+ uint32_t possible_crtcs = 0;
	244	+
	245	+ for_each_endpoint_of_node(port, ep) {
	246	+ if (!of_device_is_available(ep))
	247	+ continue;
	248	+
	249	+ remote_port = of_graph_get_remote_port(ep);
	250	+ if (!remote_port) {
	251	+ of_node_put(ep);
	252	+ continue;
	253	+ }
	254	+
	255	+ possible_crtcs \|= drm_of_crtc_port_mask(dev, remote_port);
	256	+
	257	+ of_node_put(remote_port);
	258	+ }
	259	+
	260	+ return possible_crtcs;
	261	+}
	262	+EXPORT_SYMBOL(rockchip_drm_of_find_possible_crtcs);
98	263
99	264	static DEFINE_MUTEX(rockchip_drm_sub_dev_lock);
100	265	static LIST_HEAD(rockchip_drm_sub_dev_list);
	266	+
	267	+void rockchip_connector_update_vfp_for_vrr(struct drm_crtc crtc, struct drm_display_mode mode,
	268	+ int vfp)
	269	+{
	270	+ struct rockchip_drm_sub_dev *sub_dev;
	271	+
	272	+ mutex_lock(&rockchip_drm_sub_dev_lock);
	273	+ list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
	274	+ if (sub_dev->connector->state->crtc == crtc) {
	275	+ if (sub_dev->update_vfp_for_vrr)
	276	+ sub_dev->update_vfp_for_vrr(sub_dev->connector, mode, vfp);
	277	+ }
	278	+ }
	279	+ mutex_unlock(&rockchip_drm_sub_dev_lock);
	280	+}
	281	+EXPORT_SYMBOL(rockchip_connector_update_vfp_for_vrr);
101	282
102	283	void rockchip_drm_register_sub_dev(struct rockchip_drm_sub_dev *sub_dev)
103	284	{
..	..	@@ -151,6 +332,26 @@
151	332	}
152	333	EXPORT_SYMBOL(rockchip_drm_get_sub_dev_type);
153	334
	335	+u32 rockchip_drm_get_scan_line_time_ns(void)
	336	+{
	337	+ struct rockchip_drm_sub_dev *sub_dev = NULL;
	338	+ struct drm_display_mode *mode;
	339	+ int linedur_ns = 0;
	340	+
	341	+ mutex_lock(&rockchip_drm_sub_dev_lock);
	342	+ list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
	343	+ if (sub_dev->connector->encoder && sub_dev->connector->state->crtc) {
	344	+ mode = &sub_dev->connector->state->crtc->state->adjusted_mode;
	345	+ linedur_ns = div_u64((u64) mode->crtc_htotal * 1000000, mode->crtc_clock);
	346	+ break;
	347	+ }
	348	+ }
	349	+ mutex_unlock(&rockchip_drm_sub_dev_lock);
	350	+
	351	+ return linedur_ns;
	352	+}
	353	+EXPORT_SYMBOL(rockchip_drm_get_scan_line_time_ns);
	354	+
154	355	void rockchip_drm_te_handle(struct drm_crtc *crtc)
155	356	{
156	357	struct rockchip_drm_private *priv = crtc->dev->dev_private;
..	..	@@ -166,22 +367,22 @@
166	367	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
167	368	1430, 1650, 0, 720, 725, 730, 750, 0,
168	369	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
169		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	370	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
170	371	/* 16 - 1920x1080@60Hz 16:9 */
171	372	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
172	373	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
173	374	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
174		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	375	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
175	376	/* 31 - 1920x1080@50Hz 16:9 */
176	377	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
177	378	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
178	379	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
179		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	380	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
180	381	/* 19 - 1280x720@50Hz 16:9 */
181	382	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
182	383	1760, 1980, 0, 720, 725, 730, 750, 0,
183	384	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
184		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	385	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
185	386	/* 0x10 - 1024x768@60Hz */
186	387	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
187	388	1184, 1344, 0, 768, 771, 777, 806, 0,
..	..	@@ -190,12 +391,12 @@
190	391	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
191	392	796, 864, 0, 576, 581, 586, 625, 0,
192	393	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
193		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	394	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
194	395	/* 2 - 720x480@60Hz 4:3 */
195	396	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
196	397	798, 858, 0, 480, 489, 495, 525, 0,
197	398	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
198		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	399	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
199	400	};
200	401
201	402	int rockchip_drm_add_modes_noedid(struct drm_connector *connector)
..	..	@@ -224,1013 +425,638 @@
224	425	}
225	426	EXPORT_SYMBOL(rockchip_drm_add_modes_noedid);
226	427
227		-#ifdef CONFIG_ARCH_ROCKCHIP
228		-struct drm_prime_callback_data {
229		- struct drm_gem_object *obj;
230		- struct sg_table *sgt;
	428	+static const struct rockchip_drm_width_dclk {
	429	+ int width;
	430	+ u32 dclk_khz;
	431	+} rockchip_drm_dclk[] = {
	432	+ {1920, 148500},
	433	+ {2048, 200000},
	434	+ {2560, 280000},
	435	+ {3840, 594000},
	436	+ {4096, 594000},
	437	+ {7680, 2376000},
231	438	};
232		-#endif
233	439
234		-#ifndef MODULE
235		-static struct drm_crtc find_crtc_by_node(struct drm_device drm_dev, struct device_node *node)
	440	+u32 rockchip_drm_get_dclk_by_width(int width)
236	441	{
237		- struct device_node *np_crtc;
238		- struct drm_crtc *crtc;
	442	+ int i = 0;
	443	+ u32 dclk_khz;
239	444
240		- np_crtc = of_get_parent(node);
241		- if (!np_crtc \|\| !of_device_is_available(np_crtc))
	445	+ for (i = 0; i < ARRAY_SIZE(rockchip_drm_dclk); i++) {
	446	+ if (width == rockchip_drm_dclk[i].width) {
	447	+ dclk_khz = rockchip_drm_dclk[i].dclk_khz;
	448	+ break;
	449	+ }
	450	+ }
	451	+
	452	+ if (i == ARRAY_SIZE(rockchip_drm_dclk)) {
	453	+ DRM_ERROR("Can't not find %d width solution and use 148500 khz as max dclk\n", width);
	454	+
	455	+ dclk_khz = 148500;
	456	+ }
	457	+
	458	+ return dclk_khz;
	459	+}
	460	+EXPORT_SYMBOL(rockchip_drm_get_dclk_by_width);
	461	+
	462	+static int
	463	+cea_db_tag(const u8 *db)
	464	+{
	465	+ return db[0] >> 5;
	466	+}
	467	+
	468	+static int
	469	+cea_db_payload_len(const u8 *db)
	470	+{
	471	+ return db[0] & 0x1f;
	472	+}
	473	+
	474	+#define for_each_cea_db(cea, i, start, end) \
	475	+ for ((i) = (start); \
	476	+ (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); \
	477	+ (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
	478	+
	479	+#define HDMI_NEXT_HDR_VSDB_OUI 0xd04601
	480	+
	481	+static bool cea_db_is_hdmi_next_hdr_block(const u8 *db)
	482	+{
	483	+ unsigned int oui;
	484	+
	485	+ if (cea_db_tag(db) != 0x07)
	486	+ return false;
	487	+
	488	+ if (cea_db_payload_len(db) < 11)
	489	+ return false;
	490	+
	491	+ oui = db[3] << 16 \| db[2] << 8 \| db[1];
	492	+
	493	+ return oui == HDMI_NEXT_HDR_VSDB_OUI;
	494	+}
	495	+
	496	+static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
	497	+{
	498	+ unsigned int oui;
	499	+
	500	+ if (cea_db_tag(db) != 0x03)
	501	+ return false;
	502	+
	503	+ if (cea_db_payload_len(db) < 7)
	504	+ return false;
	505	+
	506	+ oui = db[3] << 16 \| db[2] << 8 \| db[1];
	507	+
	508	+ return oui == HDMI_FORUM_IEEE_OUI;
	509	+}
	510	+
	511	+static int
	512	+cea_db_offsets(const u8 cea, int start, int *end)
	513	+{
	514	+ /* DisplayID CTA extension blocks and top-level CEA EDID
	515	+ * block header definitions differ in the following bytes:
	516	+ * 1) Byte 2 of the header specifies length differently,
	517	+ * 2) Byte 3 is only present in the CEA top level block.
	518	+ *
	519	+ * The different definitions for byte 2 follow.
	520	+ *
	521	+ * DisplayID CTA extension block defines byte 2 as:
	522	+ * Number of payload bytes
	523	+ *
	524	+ * CEA EDID block defines byte 2 as:
	525	+ * Byte number (decimal) within this block where the 18-byte
	526	+ * DTDs begin. If no non-DTD data is present in this extension
	527	+ * block, the value should be set to 04h (the byte after next).
	528	+ * If set to 00h, there are no DTDs present in this block and
	529	+ * no non-DTD data.
	530	+ */
	531	+ if (cea[0] == 0x81) {
	532	+ /*
	533	+ * for_each_displayid_db() has already verified
	534	+ * that these stay within expected bounds.
	535	+ */
	536	+ *start = 3;
	537	+ end = start + cea[2];
	538	+ } else if (cea[0] == 0x02) {
	539	+ /* Data block offset in CEA extension block */
	540	+ *start = 4;
	541	+ *end = cea[2];
	542	+ if (*end == 0)
	543	+ *end = 127;
	544	+ if (end < 4 \|\| end > 127)
	545	+ return -ERANGE;
	546	+ } else {
	547	+ return -EOPNOTSUPP;
	548	+ }
	549	+
	550	+ return 0;
	551	+}
	552	+
	553	+static u8 find_edid_extension(const struct edid edid,
	554	+ int ext_id, int *ext_index)
	555	+{
	556	+ u8 *edid_ext = NULL;
	557	+ int i;
	558	+
	559	+ /* No EDID or EDID extensions */
	560	+ if (edid == NULL \|\| edid->extensions == 0)
242	561	return NULL;
243	562
244		- drm_for_each_crtc(crtc, drm_dev) {
245		- if (crtc->port == np_crtc)
246		- return crtc;
	563	+ /* Find CEA extension */
	564	+ for (i = *ext_index; i < edid->extensions; i++) {
	565	+ edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
	566	+ if (edid_ext[0] == ext_id)
	567	+ break;
	568	+ }
	569	+
	570	+ if (i >= edid->extensions)
	571	+ return NULL;
	572	+
	573	+ *ext_index = i + 1;
	574	+
	575	+ return edid_ext;
	576	+}
	577	+
	578	+static int validate_displayid(u8 *displayid, int length, int idx)
	579	+{
	580	+ int i, dispid_length;
	581	+ u8 csum = 0;
	582	+ struct displayid_hdr *base;
	583	+
	584	+ base = (struct displayid_hdr *)&displayid[idx];
	585	+
	586	+ DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
	587	+ base->rev, base->bytes, base->prod_id, base->ext_count);
	588	+
	589	+ /* +1 for DispID checksum */
	590	+ dispid_length = sizeof(*base) + base->bytes + 1;
	591	+ if (dispid_length > length - idx)
	592	+ return -EINVAL;
	593	+
	594	+ for (i = 0; i < dispid_length; i++)
	595	+ csum += displayid[idx + i];
	596	+ if (csum) {
	597	+ DRM_NOTE("DisplayID checksum invalid, remainder is %d\n", csum);
	598	+ return -EINVAL;
	599	+ }
	600	+
	601	+ return 0;
	602	+}
	603	+
	604	+static u8 find_displayid_extension(const struct edid edid,
	605	+ int length, int idx,
	606	+ int *ext_index)
	607	+{
	608	+ u8 *displayid = find_edid_extension(edid, 0x70, ext_index);
	609	+ struct displayid_hdr *base;
	610	+ int ret;
	611	+
	612	+ if (!displayid)
	613	+ return NULL;
	614	+
	615	+ /* EDID extensions block checksum isn't for us */
	616	+ *length = EDID_LENGTH - 1;
	617	+ *idx = 1;
	618	+
	619	+ ret = validate_displayid(displayid, length, idx);
	620	+ if (ret)
	621	+ return NULL;
	622	+
	623	+ base = (struct displayid_hdr )&displayid[idx];
	624	+ length = idx + sizeof(*base) + base->bytes;
	625	+
	626	+ return displayid;
	627	+}
	628	+
	629	+static u8 find_cea_extension(const struct edid edid)
	630	+{
	631	+ int length, idx;
	632	+ struct displayid_block *block;
	633	+ u8 *cea;
	634	+ u8 *displayid;
	635	+ int ext_index;
	636	+
	637	+ /* Look for a top level CEA extension block */
	638	+ /* FIXME: make callers iterate through multiple CEA ext blocks? */
	639	+ ext_index = 0;
	640	+ cea = find_edid_extension(edid, 0x02, &ext_index);
	641	+ if (cea)
	642	+ return cea;
	643	+
	644	+ /* CEA blocks can also be found embedded in a DisplayID block */
	645	+ ext_index = 0;
	646	+ for (;;) {
	647	+ displayid = find_displayid_extension(edid, &length, &idx,
	648	+ &ext_index);
	649	+ if (!displayid)
	650	+ return NULL;
	651	+
	652	+ idx += sizeof(struct displayid_hdr);
	653	+ for_each_displayid_db(displayid, block, idx, length) {
	654	+ if (block->tag == 0x81)
	655	+ return (u8 *)block;
	656	+ }
247	657	}
248	658
249	659	return NULL;
250	660	}
251	661
252		-static struct drm_connector find_connector_by_node(struct drm_device drm_dev,
253		- struct device_node *node)
	662	+#define EDID_CEA_YCRCB422 (1 << 4)
	663	+
	664	+int rockchip_drm_get_yuv422_format(struct drm_connector *connector,
	665	+ struct edid *edid)
254	666	{
255		- struct device_node *np_connector;
256		- struct rockchip_drm_sub_dev *sub_dev;
	667	+ struct drm_display_info *info;
	668	+ const u8 *edid_ext;
257	669
258		- np_connector = of_graph_get_remote_port_parent(node);
259		- if (!np_connector \|\| !of_device_is_available(np_connector))
260		- return NULL;
	670	+ if (!connector \|\| !edid)
	671	+ return -EINVAL;
261	672
262		- sub_dev = rockchip_drm_get_sub_dev(np_connector);
263		- if (!sub_dev)
264		- return NULL;
	673	+ info = &connector->display_info;
265	674
266		- return sub_dev->connector;
267		-}
	675	+ edid_ext = find_cea_extension(edid);
	676	+ if (!edid_ext)
	677	+ return -EINVAL;
268	678
269		-static struct drm_connector find_connector_by_bridge(struct drm_device drm_dev,
270		- struct device_node *node)
271		-{
272		- struct device_node np_encoder, np_connector = NULL;
273		- struct drm_connector *connector = NULL;
274		- struct device_node port, endpoint;
275		- struct rockchip_drm_sub_dev *sub_dev;
276		-
277		- np_encoder = of_graph_get_remote_port_parent(node);
278		- if (!np_encoder \|\| !of_device_is_available(np_encoder))
279		- goto err_put_encoder;
280		-
281		- port = of_graph_get_port_by_id(np_encoder, 1);
282		- if (!port) {
283		- dev_err(drm_dev->dev, "can't found port point!\n");
284		- goto err_put_encoder;
285		- }
286		-
287		- for_each_child_of_node(port, endpoint) {
288		- np_connector = of_graph_get_remote_port_parent(endpoint);
289		- if (!np_connector) {
290		- dev_err(drm_dev->dev,
291		- "can't found connector node, please init!\n");
292		- goto err_put_port;
293		- }
294		- if (!of_device_is_available(np_connector)) {
295		- of_node_put(np_connector);
296		- np_connector = NULL;
297		- continue;
298		- } else {
299		- break;
300		- }
301		- }
302		- if (!np_connector) {
303		- dev_err(drm_dev->dev, "can't found available connector node!\n");
304		- goto err_put_port;
305		- }
306		-
307		- sub_dev = rockchip_drm_get_sub_dev(np_connector);
308		- if (!sub_dev)
309		- goto err_put_port;
310		- connector = sub_dev->connector;
311		-
312		- of_node_put(np_connector);
313		-err_put_port:
314		- of_node_put(port);
315		-err_put_encoder:
316		- of_node_put(np_encoder);
317		-
318		- return connector;
319		-}
320		-
321		-void rockchip_free_loader_memory(struct drm_device *drm)
322		-{
323		- struct rockchip_drm_private *private = drm->dev_private;
324		- struct rockchip_logo *logo;
325		- void start, end;
326		-
327		- if (!private \|\| !private->logo \|\| --private->logo->count)
328		- return;
329		-
330		- logo = private->logo;
331		- start = phys_to_virt(logo->dma_addr);
332		- end = phys_to_virt(logo->dma_addr + logo->size);
333		-
334		- if (private->domain) {
335		- u32 pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
336		-
337		- iommu_unmap(private->domain, logo->dma_addr, ALIGN(logo->size, pg_size));
338		- }
339		-
340		- memblock_free(logo->start, logo->size);
341		- free_reserved_area(start, end, -1, "drm_logo");
342		- kfree(logo);
343		- private->logo = NULL;
344		- private->loader_protect = false;
345		-}
346		-
347		-static int init_loader_memory(struct drm_device *drm_dev)
348		-{
349		- struct rockchip_drm_private *private = drm_dev->dev_private;
350		- struct rockchip_logo *logo;
351		- struct device_node *np = drm_dev->dev->of_node;
352		- struct device_node *node;
353		- phys_addr_t start, size;
354		- u32 pg_size = PAGE_SIZE;
355		- struct resource res;
356		- int ret, idx;
357		-
358		- idx = of_property_match_string(np, "memory-region-names", "drm-logo");
359		- if (idx >= 0)
360		- node = of_parse_phandle(np, "memory-region", idx);
361		- else
362		- node = of_parse_phandle(np, "logo-memory-region", 0);
363		- if (!node)
364		- return -ENOMEM;
365		-
366		- ret = of_address_to_resource(node, 0, &res);
367		- if (ret)
368		- return ret;
369		- if (private->domain)
370		- pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
371		- start = ALIGN_DOWN(res.start, pg_size);
372		- size = resource_size(&res);
373		- if (!size)
374		- return -ENOMEM;
375		-
376		- logo = kmalloc(sizeof(*logo), GFP_KERNEL);
377		- if (!logo)
378		- return -ENOMEM;
379		-
380		- logo->kvaddr = phys_to_virt(start);
381		-
382		- if (private->domain) {
383		- ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
384		- IOMMU_WRITE \| IOMMU_READ);
385		- if (ret) {
386		- dev_err(drm_dev->dev, "failed to create 1v1 mapping\n");
387		- goto err_free_logo;
388		- }
389		- }
390		-
391		- logo->dma_addr = start;
392		- logo->size = size;
393		- logo->count = 1;
394		- private->logo = logo;
395		-
396		- idx = of_property_match_string(np, "memory-region-names", "drm-cubic-lut");
397		- if (idx < 0)
398		- return 0;
399		-
400		- node = of_parse_phandle(np, "memory-region", idx);
401		- if (!node)
402		- return -ENOMEM;
403		-
404		- ret = of_address_to_resource(node, 0, &res);
405		- if (ret)
406		- return ret;
407		- start = ALIGN_DOWN(res.start, pg_size);
408		- size = resource_size(&res);
409		- if (!size)
410		- return 0;
411		-
412		- private->cubic_lut_kvaddr = phys_to_virt(start);
413		- if (private->domain) {
414		- ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
415		- IOMMU_WRITE \| IOMMU_READ);
416		- if (ret) {
417		- dev_err(drm_dev->dev, "failed to create 1v1 mapping for cubic lut\n");
418		- goto err_free_logo;
419		- }
420		- }
421		- private->cubic_lut_dma_addr = start;
	679	+ if (edid_ext[3] & EDID_CEA_YCRCB422)
	680	+ info->color_formats \|= DRM_COLOR_FORMAT_YCRCB422;
422	681
423	682	return 0;
424		-
425		-err_free_logo:
426		- kfree(logo);
427		-
428		- return ret;
429	683	}
	684	+EXPORT_SYMBOL(rockchip_drm_get_yuv422_format);
430	685
431		-static struct drm_framebuffer *
432		-get_framebuffer_by_node(struct drm_device drm_dev, struct device_node node)
	686	+static
	687	+void get_max_frl_rate(int max_frl_rate, u8 max_lanes, u8 max_rate_per_lane)
433	688	{
434		- struct rockchip_drm_private *private = drm_dev->dev_private;
435		- struct drm_mode_fb_cmd2 mode_cmd = { 0 };
436		- u32 val;
437		- int bpp;
438		-
439		- if (WARN_ON(!private->logo))
440		- return NULL;
441		-
442		- if (of_property_read_u32(node, "logo,offset", &val)) {
443		- pr_err("%s: failed to get logo,offset\n", __func__);
444		- return NULL;
445		- }
446		- mode_cmd.offsets[0] = val;
447		-
448		- if (of_property_read_u32(node, "logo,width", &val)) {
449		- pr_err("%s: failed to get logo,width\n", __func__);
450		- return NULL;
451		- }
452		- mode_cmd.width = val;
453		-
454		- if (of_property_read_u32(node, "logo,height", &val)) {
455		- pr_err("%s: failed to get logo,height\n", __func__);
456		- return NULL;
457		- }
458		- mode_cmd.height = val;
459		-
460		- if (of_property_read_u32(node, "logo,bpp", &val)) {
461		- pr_err("%s: failed to get logo,bpp\n", __func__);
462		- return NULL;
463		- }
464		- bpp = val;
465		-
466		- mode_cmd.pitches[0] = ALIGN(mode_cmd.width * bpp, 32) / 8;
467		-
468		- switch (bpp) {
469		- case 16:
470		- mode_cmd.pixel_format = DRM_FORMAT_RGB565;
	689	+ switch (max_frl_rate) {
	690	+ case 1:
	691	+ *max_lanes = 3;
	692	+ *max_rate_per_lane = 3;
471	693	break;
472		- case 24:
473		- mode_cmd.pixel_format = DRM_FORMAT_RGB888;
	694	+ case 2:
	695	+ *max_lanes = 3;
	696	+ *max_rate_per_lane = 6;
474	697	break;
475		- case 32:
476		- mode_cmd.pixel_format = DRM_FORMAT_XRGB8888;
	698	+ case 3:
	699	+ *max_lanes = 4;
	700	+ *max_rate_per_lane = 6;
477	701	break;
	702	+ case 4:
	703	+ *max_lanes = 4;
	704	+ *max_rate_per_lane = 8;
	705	+ break;
	706	+ case 5:
	707	+ *max_lanes = 4;
	708	+ *max_rate_per_lane = 10;
	709	+ break;
	710	+ case 6:
	711	+ *max_lanes = 4;
	712	+ *max_rate_per_lane = 12;
	713	+ break;
	714	+ case 0:
478	715	default:
479		- pr_err("%s: unsupported to logo bpp %d\n", __func__, bpp);
480		- return NULL;
	716	+ *max_lanes = 0;
	717	+ *max_rate_per_lane = 0;
481	718	}
482		-
483		- return rockchip_fb_alloc(drm_dev, &mode_cmd, NULL, private->logo, 1);
484	719	}
485	720
486		-static struct rockchip_drm_mode_set *
487		-of_parse_display_resource(struct drm_device drm_dev, struct device_node route)
	721	+#define EDID_DSC_10BPC (1 << 0)
	722	+#define EDID_DSC_12BPC (1 << 1)
	723	+#define EDID_DSC_16BPC (1 << 2)
	724	+#define EDID_DSC_ALL_BPP (1 << 3)
	725	+#define EDID_DSC_NATIVE_420 (1 << 6)
	726	+#define EDID_DSC_1P2 (1 << 7)
	727	+#define EDID_DSC_MAX_FRL_RATE_MASK 0xf0
	728	+#define EDID_DSC_MAX_SLICES 0xf
	729	+#define EDID_DSC_TOTAL_CHUNK_KBYTES 0x3f
	730	+#define EDID_MAX_FRL_RATE_MASK 0xf0
	731	+
	732	+static
	733	+void parse_edid_forum_vsdb(struct rockchip_drm_dsc_cap *dsc_cap,
	734	+ u8 max_frl_rate_per_lane, u8 max_lanes, u8 *add_func,
	735	+ const u8 *hf_vsdb)
488	736	{
489		- struct rockchip_drm_private *private = drm_dev->dev_private;
490		- struct rockchip_drm_mode_set *set;
491		- struct device_node *connect;
492		- struct drm_framebuffer *fb;
493		- struct drm_connector *connector;
494		- struct drm_crtc *crtc;
495		- const char *string;
496		- u32 val;
	737	+ u8 max_frl_rate;
	738	+ u8 dsc_max_frl_rate;
	739	+ u8 dsc_max_slices;
497	740
498		- connect = of_parse_phandle(route, "connect", 0);
499		- if (!connect)
500		- return NULL;
501		-
502		- fb = get_framebuffer_by_node(drm_dev, route);
503		- if (IS_ERR_OR_NULL(fb))
504		- return NULL;
505		-
506		- crtc = find_crtc_by_node(drm_dev, connect);
507		- connector = find_connector_by_node(drm_dev, connect);
508		- if (!connector)
509		- connector = find_connector_by_bridge(drm_dev, connect);
510		- if (!crtc \|\| !connector) {
511		- dev_warn(drm_dev->dev,
512		- "No available crtc or connector for display");
513		- drm_framebuffer_put(fb);
514		- return NULL;
515		- }
516		-
517		- set = kzalloc(sizeof(*set), GFP_KERNEL);
518		- if (!set)
519		- return NULL;
520		-
521		- if (!of_property_read_u32(route, "video,clock", &val))
522		- set->clock = val;
523		-
524		- if (!of_property_read_u32(route, "video,hdisplay", &val))
525		- set->hdisplay = val;
526		-
527		- if (!of_property_read_u32(route, "video,vdisplay", &val))
528		- set->vdisplay = val;
529		-
530		- if (!of_property_read_u32(route, "video,crtc_hsync_end", &val))
531		- set->crtc_hsync_end = val;
532		-
533		- if (!of_property_read_u32(route, "video,crtc_vsync_end", &val))
534		- set->crtc_vsync_end = val;
535		-
536		- if (!of_property_read_u32(route, "video,vrefresh", &val))
537		- set->vrefresh = val;
538		-
539		- if (!of_property_read_u32(route, "video,flags", &val))
540		- set->flags = val;
541		-
542		- if (!of_property_read_u32(route, "video,aspect_ratio", &val))
543		- set->picture_aspect_ratio = val;
544		-
545		- if (!of_property_read_u32(route, "overscan,left_margin", &val))
546		- set->left_margin = val;
547		-
548		- if (!of_property_read_u32(route, "overscan,right_margin", &val))
549		- set->right_margin = val;
550		-
551		- if (!of_property_read_u32(route, "overscan,top_margin", &val))
552		- set->top_margin = val;
553		-
554		- if (!of_property_read_u32(route, "overscan,bottom_margin", &val))
555		- set->bottom_margin = val;
556		-
557		- if (!of_property_read_u32(route, "bcsh,brightness", &val))
558		- set->brightness = val;
559		- else
560		- set->brightness = 50;
561		-
562		- if (!of_property_read_u32(route, "bcsh,contrast", &val))
563		- set->contrast = val;
564		- else
565		- set->contrast = 50;
566		-
567		- if (!of_property_read_u32(route, "bcsh,saturation", &val))
568		- set->saturation = val;
569		- else
570		- set->saturation = 50;
571		-
572		- if (!of_property_read_u32(route, "bcsh,hue", &val))
573		- set->hue = val;
574		- else
575		- set->hue = 50;
576		-
577		- set->force_output = of_property_read_bool(route, "force-output");
578		-
579		- if (!of_property_read_u32(route, "cubic_lut,offset", &val)) {
580		- private->cubic_lut[crtc->index].enable = true;
581		- private->cubic_lut[crtc->index].offset = val;
582		- }
583		-
584		- set->ratio = 1;
585		- if (!of_property_read_string(route, "logo,mode", &string) &&
586		- !strcmp(string, "fullscreen"))
587		- set->ratio = 0;
588		-
589		- set->fb = fb;
590		- set->crtc = crtc;
591		- set->connector = connector;
592		-
593		- return set;
594		-}
595		-
596		-static int rockchip_drm_fill_connector_modes(struct drm_connector *connector,
597		- uint32_t maxX, uint32_t maxY,
598		- bool force_output)
599		-{
600		- struct drm_device *dev = connector->dev;
601		- struct drm_display_mode *mode;
602		- const struct drm_connector_helper_funcs *connector_funcs =
603		- connector->helper_private;
604		- int count = 0;
605		- bool verbose_prune = true;
606		- enum drm_connector_status old_status;
607		-
608		- WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
609		-
610		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
611		- connector->name);
612		- /* set all modes to the unverified state */
613		- list_for_each_entry(mode, &connector->modes, head)
614		- mode->status = MODE_STALE;
615		-
616		- if (force_output)
617		- connector->force = DRM_FORCE_ON;
618		- if (connector->force) {
619		- if (connector->force == DRM_FORCE_ON \|\|
620		- connector->force == DRM_FORCE_ON_DIGITAL)
621		- connector->status = connector_status_connected;
622		- else
623		- connector->status = connector_status_disconnected;
624		- if (connector->funcs->force)
625		- connector->funcs->force(connector);
626		- } else {
627		- old_status = connector->status;
628		-
629		- if (connector->funcs->detect)
630		- connector->status = connector->funcs->detect(connector, true);
631		- else
632		- connector->status = connector_status_connected;
633		- /*
634		- * Normally either the driver's hpd code or the poll loop should
635		- * pick up any changes and fire the hotplug event. But if
636		- * userspace sneaks in a probe, we might miss a change. Hence
637		- * check here, and if anything changed start the hotplug code.
638		- */
639		- if (old_status != connector->status) {
640		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n",
641		- connector->base.id,
642		- connector->name,
643		- old_status, connector->status);
644		-
645		- /*
646		- * The hotplug event code might call into the fb
647		- * helpers, and so expects that we do not hold any
648		- * locks. Fire up the poll struct instead, it will
649		- * disable itself again.
650		- */
651		- dev->mode_config.delayed_event = true;
652		- if (dev->mode_config.poll_enabled)
653		- schedule_delayed_work(&dev->mode_config.output_poll_work,
654		- 0);
655		- }
656		- }
657		-
658		- /* Re-enable polling in case the global poll config changed. */
659		- if (!dev->mode_config.poll_running)
660		- drm_kms_helper_poll_enable(dev);
661		-
662		- dev->mode_config.poll_running = true;
663		-
664		- if (connector->status == connector_status_disconnected) {
665		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
666		- connector->base.id, connector->name);
667		- drm_connector_update_edid_property(connector, NULL);
668		- verbose_prune = false;
669		- goto prune;
670		- }
671		-
672		- count = (*connector_funcs->get_modes)(connector);
673		-
674		- if (count == 0 && connector->status == connector_status_connected)
675		- count = drm_add_modes_noedid(connector, 1024, 768);
676		- if (force_output)
677		- count += rockchip_drm_add_modes_noedid(connector);
678		- if (count == 0)
679		- goto prune;
680		-
681		- drm_connector_list_update(connector);
682		-
683		- list_for_each_entry(mode, &connector->modes, head) {
684		- if (mode->status == MODE_OK)
685		- mode->status = drm_mode_validate_driver(dev, mode);
686		-
687		- if (mode->status == MODE_OK)
688		- mode->status = drm_mode_validate_size(mode, maxX, maxY);
689		-
690		- /**
691		- * if (mode->status == MODE_OK)
692		- * mode->status = drm_mode_validate_flag(mode, mode_flags);
693		- */
694		- if (mode->status == MODE_OK && connector_funcs->mode_valid)
695		- mode->status = connector_funcs->mode_valid(connector,
696		- mode);
697		- if (mode->status == MODE_OK)
698		- mode->status = drm_mode_validate_ycbcr420(mode,
699		- connector);
700		- }
701		-
702		-prune:
703		- drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
704		-
705		- if (list_empty(&connector->modes))
706		- return 0;
707		-
708		- list_for_each_entry(mode, &connector->modes, head)
709		- mode->vrefresh = drm_mode_vrefresh(mode);
710		-
711		- drm_mode_sort(&connector->modes);
712		-
713		- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
714		- connector->name);
715		- list_for_each_entry(mode, &connector->modes, head) {
716		- drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
717		- drm_mode_debug_printmodeline(mode);
718		- }
719		-
720		- return count;
721		-}
722		-
723		-static int setup_initial_state(struct drm_device *drm_dev,
724		- struct drm_atomic_state *state,
725		- struct rockchip_drm_mode_set *set)
726		-{
727		- struct rockchip_drm_private *priv = drm_dev->dev_private;
728		- struct drm_connector *connector = set->connector;
729		- struct drm_crtc *crtc = set->crtc;
730		- struct drm_crtc_state *crtc_state;
731		- struct drm_connector_state *conn_state;
732		- struct drm_plane_state *primary_state;
733		- struct drm_display_mode *mode = NULL;
734		- const struct drm_connector_helper_funcs *funcs;
735		- const struct drm_encoder_helper_funcs *encoder_funcs;
736		- int pipe = drm_crtc_index(crtc);
737		- bool is_crtc_enabled = true;
738		- int hdisplay, vdisplay;
739		- int fb_width, fb_height;
740		- int found = 0, match = 0;
741		- int num_modes;
742		- int ret = 0;
743		- struct rockchip_crtc_state *s = NULL;
744		-
745		- if (!set->hdisplay \|\| !set->vdisplay \|\| !set->vrefresh)
746		- is_crtc_enabled = false;
747		-
748		- conn_state = drm_atomic_get_connector_state(state, connector);
749		- if (IS_ERR(conn_state))
750		- return PTR_ERR(conn_state);
751		-
752		- funcs = connector->helper_private;
753		-
754		- if (funcs->best_encoder)
755		- conn_state->best_encoder = funcs->best_encoder(connector);
756		- else
757		- conn_state->best_encoder = drm_atomic_helper_best_encoder(connector);
758		-
759		- if (funcs->loader_protect)
760		- funcs->loader_protect(connector, true);
761		- connector->loader_protect = true;
762		- encoder_funcs = conn_state->best_encoder->helper_private;
763		- if (encoder_funcs->loader_protect)
764		- encoder_funcs->loader_protect(conn_state->best_encoder, true);
765		- conn_state->best_encoder->loader_protect = true;
766		- num_modes = rockchip_drm_fill_connector_modes(connector, 4096, 4096, set->force_output);
767		- if (!num_modes) {
768		- dev_err(drm_dev->dev, "connector[%s] can't found any modes\n",
769		- connector->name);
770		- ret = -EINVAL;
771		- goto error_conn;
772		- }
773		-
774		- list_for_each_entry(mode, &connector->modes, head) {
775		- if (mode->clock == set->clock &&
776		- mode->hdisplay == set->hdisplay &&
777		- mode->vdisplay == set->vdisplay &&
778		- mode->crtc_hsync_end == set->crtc_hsync_end &&
779		- mode->crtc_vsync_end == set->crtc_vsync_end &&
780		- drm_mode_vrefresh(mode) == set->vrefresh &&
781		- /* we just need to focus on DRM_MODE_FLAG_ALL flag, so here
782		- * we compare mode->flags with set->flags & DRM_MODE_FLAG_ALL.
783		- */
784		- mode->flags == (set->flags & DRM_MODE_FLAG_ALL) &&
785		- mode->picture_aspect_ratio == set->picture_aspect_ratio) {
786		- found = 1;
787		- match = 1;
788		- break;
789		- }
790		- }
791		-
792		- if (!found) {
793		- ret = -EINVAL;
794		- connector->status = connector_status_disconnected;
795		- goto error_conn;
796		- }
797		-
798		- conn_state->tv.brightness = set->brightness;
799		- conn_state->tv.contrast = set->contrast;
800		- conn_state->tv.saturation = set->saturation;
801		- conn_state->tv.hue = set->hue;
802		- set->mode = mode;
803		- crtc_state = drm_atomic_get_crtc_state(state, crtc);
804		- if (IS_ERR(crtc_state)) {
805		- ret = PTR_ERR(crtc_state);
806		- goto error_conn;
807		- }
808		-
809		- drm_mode_copy(&crtc_state->adjusted_mode, mode);
810		- if (!match \|\| !is_crtc_enabled) {
811		- set->mode_changed = true;
812		- } else {
813		- ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
814		- if (ret)
815		- goto error_conn;
816		-
817		- mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
818		- ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
819		- if (ret)
820		- goto error_conn;
821		-
822		- crtc_state->active = true;
823		-
824		- if (priv->crtc_funcs[pipe] &&
825		- priv->crtc_funcs[pipe]->loader_protect)
826		- priv->crtc_funcs[pipe]->loader_protect(crtc, true);
827		- }
828		-
829		- if (!set->fb) {
830		- ret = 0;
831		- goto error_crtc;
832		- }
833		- primary_state = drm_atomic_get_plane_state(state, crtc->primary);
834		- if (IS_ERR(primary_state)) {
835		- ret = PTR_ERR(primary_state);
836		- goto error_crtc;
837		- }
838		-
839		- hdisplay = mode->hdisplay;
840		- vdisplay = mode->vdisplay;
841		- fb_width = set->fb->width;
842		- fb_height = set->fb->height;
843		-
844		- primary_state->crtc = crtc;
845		- primary_state->src_x = 0;
846		- primary_state->src_y = 0;
847		- primary_state->src_w = fb_width << 16;
848		- primary_state->src_h = fb_height << 16;
849		- if (set->ratio) {
850		- if (set->fb->width >= hdisplay) {
851		- primary_state->crtc_x = 0;
852		- primary_state->crtc_w = hdisplay;
853		- } else {
854		- primary_state->crtc_x = (hdisplay - fb_width) / 2;
855		- primary_state->crtc_w = set->fb->width;
856		- }
857		-
858		- if (set->fb->height >= vdisplay) {
859		- primary_state->crtc_y = 0;
860		- primary_state->crtc_h = vdisplay;
861		- } else {
862		- primary_state->crtc_y = (vdisplay - fb_height) / 2;
863		- primary_state->crtc_h = fb_height;
864		- }
865		- } else {
866		- primary_state->crtc_x = 0;
867		- primary_state->crtc_y = 0;
868		- primary_state->crtc_w = hdisplay;
869		- primary_state->crtc_h = vdisplay;
870		- }
871		- s = to_rockchip_crtc_state(crtc->state);
872		- s->output_type = connector->connector_type;
873		-
874		- return 0;
875		-
876		-error_crtc:
877		- if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->loader_protect)
878		- priv->crtc_funcs[pipe]->loader_protect(crtc, false);
879		-error_conn:
880		- if (funcs->loader_protect)
881		- funcs->loader_protect(connector, false);
882		- connector->loader_protect = false;
883		- if (encoder_funcs->loader_protect)
884		- encoder_funcs->loader_protect(conn_state->best_encoder, false);
885		- conn_state->best_encoder->loader_protect = false;
886		-
887		- return ret;
888		-}
889		-
890		-static int update_state(struct drm_device *drm_dev,
891		- struct drm_atomic_state *state,
892		- struct rockchip_drm_mode_set *set,
893		- unsigned int *plane_mask)
894		-{
895		- struct drm_crtc *crtc = set->crtc;
896		- struct drm_connector *connector = set->connector;
897		- struct drm_display_mode *mode = set->mode;
898		- struct drm_plane_state *primary_state;
899		- struct drm_crtc_state *crtc_state;
900		- struct drm_connector_state *conn_state;
901		- int ret;
902		- struct rockchip_crtc_state *s;
903		-
904		- crtc_state = drm_atomic_get_crtc_state(state, crtc);
905		- if (IS_ERR(crtc_state))
906		- return PTR_ERR(crtc_state);
907		- conn_state = drm_atomic_get_connector_state(state, connector);
908		- if (IS_ERR(conn_state))
909		- return PTR_ERR(conn_state);
910		- s = to_rockchip_crtc_state(crtc_state);
911		- s->left_margin = set->left_margin;
912		- s->right_margin = set->right_margin;
913		- s->top_margin = set->top_margin;
914		- s->bottom_margin = set->bottom_margin;
915		-
916		- if (set->mode_changed) {
917		- ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
918		- if (ret)
919		- return ret;
920		-
921		- ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
922		- if (ret)
923		- return ret;
924		-
925		- crtc_state->active = true;
926		- } else {
927		- const struct drm_encoder_helper_funcs *encoder_helper_funcs;
928		- const struct drm_connector_helper_funcs *connector_helper_funcs;
929		- struct drm_encoder *encoder;
930		-
931		- connector_helper_funcs = connector->helper_private;
932		- if (!connector_helper_funcs)
933		- return -ENXIO;
934		- if (connector_helper_funcs->best_encoder)
935		- encoder = connector_helper_funcs->best_encoder(connector);
936		- else
937		- encoder = drm_atomic_helper_best_encoder(connector);
938		- if (!encoder)
939		- return -ENXIO;
940		- encoder_helper_funcs = encoder->helper_private;
941		- if (!encoder_helper_funcs->atomic_check)
942		- return -ENXIO;
943		- ret = encoder_helper_funcs->atomic_check(encoder, crtc->state,
944		- conn_state);
945		- if (ret)
946		- return ret;
947		-
948		- if (encoder_helper_funcs->atomic_mode_set)
949		- encoder_helper_funcs->atomic_mode_set(encoder,
950		- crtc_state,
951		- conn_state);
952		- else if (encoder_helper_funcs->mode_set)
953		- encoder_helper_funcs->mode_set(encoder, mode, mode);
954		- }
955		-
956		- primary_state = drm_atomic_get_plane_state(state, crtc->primary);
957		- if (IS_ERR(primary_state))
958		- return PTR_ERR(primary_state);
959		-
960		- crtc_state->plane_mask = 1 << drm_plane_index(crtc->primary);
961		- *plane_mask \|= crtc_state->plane_mask;
962		-
963		- drm_atomic_set_fb_for_plane(primary_state, set->fb);
964		- drm_framebuffer_put(set->fb);
965		- ret = drm_atomic_set_crtc_for_plane(primary_state, crtc);
966		-
967		- return ret;
968		-}
969		-
970		-static void show_loader_logo(struct drm_device *drm_dev)
971		-{
972		- struct drm_atomic_state state, old_state;
973		- struct device_node *np = drm_dev->dev->of_node;
974		- struct drm_mode_config *mode_config = &drm_dev->mode_config;
975		- struct rockchip_drm_private *private = drm_dev->dev_private;
976		- struct device_node root, route;
977		- struct rockchip_drm_mode_set set, tmp, *unset;
978		- struct list_head mode_set_list;
979		- struct list_head mode_unset_list;
980		- unsigned int plane_mask = 0;
981		- int ret, i;
982		-
983		- root = of_get_child_by_name(np, "route");
984		- if (!root) {
985		- dev_warn(drm_dev->dev, "failed to parse display resources\n");
	741	+ if (!hf_vsdb[7])
986	742	return;
987		- }
988	743
989		- if (init_loader_memory(drm_dev)) {
990		- dev_warn(drm_dev->dev, "failed to parse loader memory\n");
	744	+ DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
	745	+ max_frl_rate = (hf_vsdb[7] & EDID_MAX_FRL_RATE_MASK) >> 4;
	746	+ get_max_frl_rate(max_frl_rate, max_lanes,
	747	+ max_frl_rate_per_lane);
	748	+
	749	+ *add_func = hf_vsdb[8];
	750	+
	751	+ if (cea_db_payload_len(hf_vsdb) < 13)
991	752	return;
	753	+
	754	+ dsc_cap->v_1p2 = hf_vsdb[11] & EDID_DSC_1P2;
	755	+
	756	+ if (!dsc_cap->v_1p2)
	757	+ return;
	758	+
	759	+ dsc_cap->native_420 = hf_vsdb[11] & EDID_DSC_NATIVE_420;
	760	+ dsc_cap->all_bpp = hf_vsdb[11] & EDID_DSC_ALL_BPP;
	761	+
	762	+ if (hf_vsdb[11] & EDID_DSC_16BPC)
	763	+ dsc_cap->bpc_supported = 16;
	764	+ else if (hf_vsdb[11] & EDID_DSC_12BPC)
	765	+ dsc_cap->bpc_supported = 12;
	766	+ else if (hf_vsdb[11] & EDID_DSC_10BPC)
	767	+ dsc_cap->bpc_supported = 10;
	768	+ else
	769	+ dsc_cap->bpc_supported = 0;
	770	+
	771	+ dsc_max_frl_rate = (hf_vsdb[12] & EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
	772	+ get_max_frl_rate(dsc_max_frl_rate, &dsc_cap->max_lanes,
	773	+ &dsc_cap->max_frl_rate_per_lane);
	774	+ dsc_cap->total_chunk_kbytes = hf_vsdb[13] & EDID_DSC_TOTAL_CHUNK_KBYTES;
	775	+
	776	+ dsc_max_slices = hf_vsdb[12] & EDID_DSC_MAX_SLICES;
	777	+ switch (dsc_max_slices) {
	778	+ case 1:
	779	+ dsc_cap->max_slices = 1;
	780	+ dsc_cap->clk_per_slice = 340;
	781	+ break;
	782	+ case 2:
	783	+ dsc_cap->max_slices = 2;
	784	+ dsc_cap->clk_per_slice = 340;
	785	+ break;
	786	+ case 3:
	787	+ dsc_cap->max_slices = 4;
	788	+ dsc_cap->clk_per_slice = 340;
	789	+ break;
	790	+ case 4:
	791	+ dsc_cap->max_slices = 8;
	792	+ dsc_cap->clk_per_slice = 340;
	793	+ break;
	794	+ case 5:
	795	+ dsc_cap->max_slices = 8;
	796	+ dsc_cap->clk_per_slice = 400;
	797	+ break;
	798	+ case 6:
	799	+ dsc_cap->max_slices = 12;
	800	+ dsc_cap->clk_per_slice = 400;
	801	+ break;
	802	+ case 7:
	803	+ dsc_cap->max_slices = 16;
	804	+ dsc_cap->clk_per_slice = 400;
	805	+ break;
	806	+ case 0:
	807	+ default:
	808	+ dsc_cap->max_slices = 0;
	809	+ dsc_cap->clk_per_slice = 0;
992	810	}
993		-
994		- INIT_LIST_HEAD(&mode_set_list);
995		- INIT_LIST_HEAD(&mode_unset_list);
996		- drm_modeset_lock_all(drm_dev);
997		- state = drm_atomic_state_alloc(drm_dev);
998		- if (!state) {
999		- dev_err(drm_dev->dev, "failed to alloc atomic state\n");
1000		- ret = -ENOMEM;
1001		- goto err_unlock;
1002		- }
1003		-
1004		- state->acquire_ctx = mode_config->acquire_ctx;
1005		-
1006		- for_each_child_of_node(root, route) {
1007		- if (!of_device_is_available(route))
1008		- continue;
1009		-
1010		- set = of_parse_display_resource(drm_dev, route);
1011		- if (!set)
1012		- continue;
1013		-
1014		- if (setup_initial_state(drm_dev, state, set)) {
1015		- drm_framebuffer_put(set->fb);
1016		- INIT_LIST_HEAD(&set->head);
1017		- list_add_tail(&set->head, &mode_unset_list);
1018		- continue;
1019		- }
1020		- INIT_LIST_HEAD(&set->head);
1021		- list_add_tail(&set->head, &mode_set_list);
1022		- }
1023		-
1024		- /*
1025		- * the mode_unset_list store the unconnected route, if route's crtc
1026		- * isn't used, we should close it.
1027		- */
1028		- list_for_each_entry_safe(unset, tmp, &mode_unset_list, head) {
1029		- struct rockchip_drm_mode_set *tmp_set;
1030		- int find_used_crtc = 0;
1031		-
1032		- list_for_each_entry_safe(set, tmp_set, &mode_set_list, head) {
1033		- if (set->crtc == unset->crtc) {
1034		- find_used_crtc = 1;
1035		- continue;
1036		- }
1037		- }
1038		-
1039		- if (!find_used_crtc) {
1040		- struct drm_crtc *crtc = unset->crtc;
1041		- int pipe = drm_crtc_index(crtc);
1042		- struct rockchip_drm_private *priv =
1043		- drm_dev->dev_private;
1044		-
1045		- if (unset->hdisplay && unset->vdisplay) {
1046		- if (priv->crtc_funcs[pipe] &&
1047		- priv->crtc_funcs[pipe]->loader_protect)
1048		- priv->crtc_funcs[pipe]->loader_protect(crtc, true);
1049		- priv->crtc_funcs[pipe]->crtc_close(crtc);
1050		- if (priv->crtc_funcs[pipe] &&
1051		- priv->crtc_funcs[pipe]->loader_protect)
1052		- priv->crtc_funcs[pipe]->loader_protect(crtc, false);
1053		- }
1054		- }
1055		-
1056		- list_del(&unset->head);
1057		- kfree(unset);
1058		- }
1059		-
1060		- if (list_empty(&mode_set_list)) {
1061		- dev_warn(drm_dev->dev, "can't not find any loader display\n");
1062		- ret = -ENXIO;
1063		- goto err_free_state;
1064		- }
1065		-
1066		- /*
1067		- * The state save initial devices status, swap the state into
1068		- * drm devices as old state, so if new state come, can compare
1069		- * with this state to judge which status need to update.
1070		- */
1071		- WARN_ON(drm_atomic_helper_swap_state(state, false));
1072		- drm_atomic_state_put(state);
1073		- old_state = drm_atomic_helper_duplicate_state(drm_dev,
1074		- mode_config->acquire_ctx);
1075		- if (IS_ERR(old_state)) {
1076		- dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1077		- ret = PTR_ERR_OR_ZERO(old_state);
1078		- goto err_free_state;
1079		- }
1080		-
1081		- state = drm_atomic_helper_duplicate_state(drm_dev,
1082		- mode_config->acquire_ctx);
1083		- if (IS_ERR(state)) {
1084		- dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1085		- ret = PTR_ERR_OR_ZERO(state);
1086		- goto err_free_old_state;
1087		- }
1088		- state->acquire_ctx = mode_config->acquire_ctx;
1089		- list_for_each_entry(set, &mode_set_list, head)
1090		- /*
1091		- * We don't want to see any fail on update_state.
1092		- */
1093		- WARN_ON(update_state(drm_dev, state, set, &plane_mask));
1094		-
1095		- for (i = 0; i < state->num_connector; i++) {
1096		- if (state->connectors[i].new_state->connector->status !=
1097		- connector_status_connected)
1098		- state->connectors[i].new_state->best_encoder = NULL;
1099		- }
1100		-
1101		- ret = drm_atomic_commit(state);
1102		- /**
1103		- * todo
1104		- * drm_atomic_clean_old_fb(drm_dev, plane_mask, ret);
1105		- */
1106		-
1107		- list_for_each_entry_safe(set, tmp, &mode_set_list, head) {
1108		- if (set->force_output)
1109		- set->connector->force = DRM_FORCE_UNSPECIFIED;
1110		- list_del(&set->head);
1111		- kfree(set);
1112		- }
1113		-
1114		- /*
1115		- * Is possible get deadlock here?
1116		- */
1117		- WARN_ON(ret == -EDEADLK);
1118		-
1119		- if (ret) {
1120		- /*
1121		- * restore display status if atomic commit failed.
1122		- */
1123		- WARN_ON(drm_atomic_helper_swap_state(old_state, false));
1124		- goto err_free_state;
1125		- }
1126		-
1127		- rockchip_free_loader_memory(drm_dev);
1128		- drm_atomic_state_put(old_state);
1129		- drm_atomic_state_put(state);
1130		-
1131		- private->loader_protect = true;
1132		- drm_modeset_unlock_all(drm_dev);
1133		- return;
1134		-err_free_old_state:
1135		- drm_atomic_state_put(old_state);
1136		-err_free_state:
1137		- drm_atomic_state_put(state);
1138		-err_unlock:
1139		- drm_modeset_unlock_all(drm_dev);
1140		- if (ret)
1141		- dev_err(drm_dev->dev, "failed to show loader logo\n");
1142	811	}
1143	812
1144		-static const char *const loader_protect_clocks[] __initconst = {
1145		- "hclk_vio",
1146		- "hclk_vop",
1147		- "hclk_vopb",
1148		- "hclk_vopl",
1149		- "aclk_vio",
1150		- "aclk_vio0",
1151		- "aclk_vio1",
1152		- "aclk_vop",
1153		- "aclk_vopb",
1154		- "aclk_vopl",
1155		- "aclk_vo_pre",
1156		- "aclk_vio_pre",
1157		- "dclk_vop",
1158		- "dclk_vop0",
1159		- "dclk_vop1",
1160		- "dclk_vopb",
1161		- "dclk_vopl",
	813	+enum {
	814	+ VER_26_BYTE_V0,
	815	+ VER_15_BYTE_V1,
	816	+ VER_12_BYTE_V1,
	817	+ VER_12_BYTE_V2,
1162	818	};
1163	819
1164		-static struct clk **loader_clocks __initdata;
1165		-static int __init rockchip_clocks_loader_protect(void)
	820	+static int check_next_hdr_version(const u8 *next_hdr_db)
1166	821	{
1167		- int nclocks = ARRAY_SIZE(loader_protect_clocks);
1168		- struct clk *clk;
1169		- int i;
	822	+ u16 ver;
1170	823
1171		- loader_clocks = kcalloc(nclocks, sizeof(void *), GFP_KERNEL);
1172		- if (!loader_clocks)
1173		- return -ENOMEM;
	824	+ ver = (next_hdr_db[5] & 0xf0) << 8 \| next_hdr_db[0];
1174	825
1175		- for (i = 0; i < nclocks; i++) {
1176		- clk = __clk_lookup(loader_protect_clocks[i]);
1177		-
1178		- if (clk) {
1179		- loader_clocks[i] = clk;
1180		- clk_prepare_enable(clk);
1181		- }
	826	+ switch (ver) {
	827	+ case 0x00f9:
	828	+ return VER_26_BYTE_V0;
	829	+ case 0x20ee:
	830	+ return VER_15_BYTE_V1;
	831	+ case 0x20eb:
	832	+ return VER_12_BYTE_V1;
	833	+ case 0x40eb:
	834	+ return VER_12_BYTE_V2;
	835	+ default:
	836	+ return -ENOENT;
1182	837	}
1183		-
1184		- return 0;
1185	838	}
1186		-arch_initcall_sync(rockchip_clocks_loader_protect);
1187	839
1188		-static int __init rockchip_clocks_loader_unprotect(void)
	840	+static void parse_ver_26_v0_data(struct ver_26_v0 hdr, const u8 data)
1189	841	{
1190		- int i;
	842	+ hdr->yuv422_12bit = data[5] & BIT(0);
	843	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	844	+ hdr->global_dimming = (data[5] & BIT(2)) >> 2;
1191	845
1192		- if (!loader_clocks)
1193		- return -ENODEV;
	846	+ hdr->dm_major_ver = (data[21] & 0xf0) >> 4;
	847	+ hdr->dm_minor_ver = data[21] & 0xf;
1194	848
1195		- for (i = 0; i < ARRAY_SIZE(loader_protect_clocks); i++) {
1196		- struct clk *clk = loader_clocks[i];
	849	+ hdr->t_min_pq = (data[19] << 4) \| ((data[18] & 0xf0) >> 4);
	850	+ hdr->t_max_pq = (data[20] << 4) \| (data[18] & 0xf);
1197	851
1198		- if (clk)
1199		- clk_disable_unprepare(clk);
	852	+ hdr->rx = (data[7] << 4) \| ((data[6] & 0xf0) >> 4);
	853	+ hdr->ry = (data[8] << 4) \| (data[6] & 0xf);
	854	+ hdr->gx = (data[10] << 4) \| ((data[9] & 0xf0) >> 4);
	855	+ hdr->gy = (data[11] << 4) \| (data[9] & 0xf);
	856	+ hdr->bx = (data[13] << 4) \| ((data[12] & 0xf0) >> 4);
	857	+ hdr->by = (data[14] << 4) \| (data[12] & 0xf);
	858	+ hdr->wx = (data[16] << 4) \| ((data[15] & 0xf0) >> 4);
	859	+ hdr->wy = (data[17] << 4) \| (data[15] & 0xf);
	860	+}
	861	+
	862	+static void parse_ver_15_v1_data(struct ver_15_v1 hdr, const u8 data)
	863	+{
	864	+ hdr->yuv422_12bit = data[5] & BIT(0);
	865	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	866	+ hdr->global_dimming = data[6] & BIT(0);
	867	+
	868	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	869	+
	870	+ hdr->colorimetry = data[7] & BIT(0);
	871	+
	872	+ hdr->t_max_lum = (data[6] & 0xfe) >> 1;
	873	+ hdr->t_min_lum = (data[7] & 0xfe) >> 1;
	874	+
	875	+ hdr->rx = data[9];
	876	+ hdr->ry = data[10];
	877	+ hdr->gx = data[11];
	878	+ hdr->gy = data[12];
	879	+ hdr->bx = data[13];
	880	+ hdr->by = data[14];
	881	+}
	882	+
	883	+static void parse_ver_12_v1_data(struct ver_12_v1 hdr, const u8 data)
	884	+{
	885	+ hdr->yuv422_12bit = data[5] & BIT(0);
	886	+ hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
	887	+ hdr->global_dimming = data[6] & BIT(0);
	888	+
	889	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	890	+
	891	+ hdr->colorimetry = data[7] & BIT(0);
	892	+
	893	+ hdr->t_max_lum = (data[6] & 0xfe) >> 1;
	894	+ hdr->t_min_lum = (data[7] & 0xfe) >> 1;
	895	+
	896	+ hdr->low_latency = data[8] & 0x3;
	897	+
	898	+ hdr->unique_rx = (data[11] & 0xf8) >> 3;
	899	+ hdr->unique_ry = (data[11] & 0x7) << 2 \| (data[10] & BIT(0)) << 1 \|
	900	+ (data[9] & BIT(0));
	901	+ hdr->unique_gx = (data[9] & 0xfe) >> 1;
	902	+ hdr->unique_gy = (data[10] & 0xfe) >> 1;
	903	+ hdr->unique_bx = (data[8] & 0xe0) >> 5;
	904	+ hdr->unique_by = (data[8] & 0x1c) >> 2;
	905	+}
	906	+
	907	+static void parse_ver_12_v2_data(struct ver_12_v2 hdr, const u8 data)
	908	+{
	909	+ hdr->yuv422_12bit = data[5] & BIT(0);
	910	+ hdr->backlt_ctrl = (data[5] & BIT(1)) >> 1;
	911	+ hdr->global_dimming = (data[6] & BIT(2)) >> 2;
	912	+
	913	+ hdr->dm_version = (data[5] & 0x1c) >> 2;
	914	+ hdr->backlt_min_luma = data[6] & 0x3;
	915	+ hdr->interface = data[7] & 0x3;
	916	+ hdr->yuv444_10b_12b = (data[8] & BIT(0)) << 1 \| (data[9] & BIT(0));
	917	+
	918	+ hdr->t_min_pq_v2 = (data[6] & 0xf8) >> 3;
	919	+ hdr->t_max_pq_v2 = (data[7] & 0xf8) >> 3;
	920	+
	921	+ hdr->unique_rx = (data[10] & 0xf8) >> 3;
	922	+ hdr->unique_ry = (data[11] & 0xf8) >> 3;
	923	+ hdr->unique_gx = (data[8] & 0xfe) >> 1;
	924	+ hdr->unique_gy = (data[9] & 0xfe) >> 1;
	925	+ hdr->unique_bx = data[10] & 0x7;
	926	+ hdr->unique_by = data[11] & 0x7;
	927	+}
	928	+
	929	+static
	930	+void parse_next_hdr_block(struct next_hdr_sink_data *sink_data,
	931	+ const u8 *next_hdr_db)
	932	+{
	933	+ int version;
	934	+
	935	+ version = check_next_hdr_version(next_hdr_db);
	936	+ if (version < 0)
	937	+ return;
	938	+
	939	+ sink_data->version = version;
	940	+
	941	+ switch (version) {
	942	+ case VER_26_BYTE_V0:
	943	+ parse_ver_26_v0_data(&sink_data->ver_26_v0, next_hdr_db);
	944	+ break;
	945	+ case VER_15_BYTE_V1:
	946	+ parse_ver_15_v1_data(&sink_data->ver_15_v1, next_hdr_db);
	947	+ break;
	948	+ case VER_12_BYTE_V1:
	949	+ parse_ver_12_v1_data(&sink_data->ver_12_v1, next_hdr_db);
	950	+ break;
	951	+ case VER_12_BYTE_V2:
	952	+ parse_ver_12_v2_data(&sink_data->ver_12_v2, next_hdr_db);
	953	+ break;
	954	+ default:
	955	+ break;
1200	956	}
1201		- kfree(loader_clocks);
1202		-
1203		- return 0;
1204	957	}
1205		-late_initcall_sync(rockchip_clocks_loader_unprotect);
1206		-#endif
1207	958
1208		-int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
1209		- struct device_node *np_crtc,
1210		- u32 type, u32 value)
	959	+int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
	960	+ u8 max_frl_rate_per_lane, u8 max_lanes, u8 *add_func,
	961	+ const struct edid *edid)
1211	962	{
1212		- struct drm_crtc *crtc;
1213		- int pipe = 0;
1214		- struct rockchip_drm_private *priv;
	963	+ const u8 *edid_ext;
	964	+ int i, start, end;
1215	965
1216		- if (!np_crtc \|\| !of_device_is_available(np_crtc))
	966	+ if (!dsc_cap \|\| !max_frl_rate_per_lane \|\| !max_lanes \|\| !edid \|\| !add_func)
1217	967	return -EINVAL;
1218	968
1219		- drm_for_each_crtc(crtc, drm_dev) {
1220		- if (of_get_parent(crtc->port) == np_crtc)
1221		- break;
1222		- }
1223		-
1224		- pipe = drm_crtc_index(crtc);
1225		- if (pipe >= ROCKCHIP_MAX_CRTC)
	969	+ edid_ext = find_cea_extension(edid);
	970	+ if (!edid_ext)
1226	971	return -EINVAL;
1227		- priv = crtc->dev->dev_private;
1228		- if (priv->crtc_funcs[pipe]->crtc_send_mcu_cmd)
1229		- priv->crtc_funcs[pipe]->crtc_send_mcu_cmd(crtc, type, value);
	972	+
	973	+ if (cea_db_offsets(edid_ext, &start, &end))
	974	+ return -EINVAL;
	975	+
	976	+ for_each_cea_db(edid_ext, i, start, end) {
	977	+ const u8 *db = &edid_ext[i];
	978	+
	979	+ if (cea_db_is_hdmi_forum_vsdb(db))
	980	+ parse_edid_forum_vsdb(dsc_cap, max_frl_rate_per_lane,
	981	+ max_lanes, add_func, db);
	982	+ }
1230	983
1231	984	return 0;
1232	985	}
1233		-EXPORT_SYMBOL(rockchip_drm_crtc_send_mcu_cmd);
	986	+EXPORT_SYMBOL(rockchip_drm_parse_cea_ext);
	987	+
	988	+int rockchip_drm_parse_next_hdr(struct next_hdr_sink_data *sink_data,
	989	+ const struct edid *edid)
	990	+{
	991	+ const u8 *edid_ext;
	992	+ int i, start, end;
	993	+
	994	+ if (!sink_data \|\| !edid)
	995	+ return -EINVAL;
	996	+
	997	+ memset(sink_data, 0, sizeof(struct next_hdr_sink_data));
	998	+
	999	+ edid_ext = find_cea_extension(edid);
	1000	+ if (!edid_ext)
	1001	+ return -EINVAL;
	1002	+
	1003	+ if (cea_db_offsets(edid_ext, &start, &end))
	1004	+ return -EINVAL;
	1005	+
	1006	+ for_each_cea_db(edid_ext, i, start, end) {
	1007	+ const u8 *db = &edid_ext[i];
	1008	+
	1009	+ if (cea_db_is_hdmi_next_hdr_block(db))
	1010	+ parse_next_hdr_block(sink_data, db);
	1011	+ }
	1012	+
	1013	+ return 0;
	1014	+}
	1015	+EXPORT_SYMBOL(rockchip_drm_parse_next_hdr);
	1016	+
	1017	+#define COLORIMETRY_DATA_BLOCK 0x5
	1018	+#define USE_EXTENDED_TAG 0x07
	1019	+
	1020	+static bool cea_db_is_hdmi_colorimetry_data_block(const u8 *db)
	1021	+{
	1022	+ if (cea_db_tag(db) != USE_EXTENDED_TAG)
	1023	+ return false;
	1024	+
	1025	+ if (db[1] != COLORIMETRY_DATA_BLOCK)
	1026	+ return false;
	1027	+
	1028	+ return true;
	1029	+}
	1030	+
	1031	+int
	1032	+rockchip_drm_parse_colorimetry_data_block(u8 colorimetry, const struct edid edid)
	1033	+{
	1034	+ const u8 *edid_ext;
	1035	+ int i, start, end;
	1036	+
	1037	+ if (!colorimetry \|\| !edid)
	1038	+ return -EINVAL;
	1039	+
	1040	+ *colorimetry = 0;
	1041	+
	1042	+ edid_ext = find_cea_extension(edid);
	1043	+ if (!edid_ext)
	1044	+ return -EINVAL;
	1045	+
	1046	+ if (cea_db_offsets(edid_ext, &start, &end))
	1047	+ return -EINVAL;
	1048	+
	1049	+ for_each_cea_db(edid_ext, i, start, end) {
	1050	+ const u8 *db = &edid_ext[i];
	1051	+
	1052	+ if (cea_db_is_hdmi_colorimetry_data_block(db))
	1053	+ /* As per CEA 861-G spec */
	1054	+ *colorimetry = ((db[3] & (0x1 << 7)) << 1) \| db[2];
	1055	+ }
	1056	+
	1057	+ return 0;
	1058	+}
	1059	+EXPORT_SYMBOL(rockchip_drm_parse_colorimetry_data_block);
1234	1060
1235	1061	/*
1236	1062	* Attach a (component) device to the shared drm dma mapping from master drm
..	..	@@ -1265,6 +1091,17 @@
1265	1091	return;
1266	1092
1267	1093	iommu_detach_device(domain, dev);
	1094	+}
	1095	+
	1096	+void rockchip_drm_crtc_standby(struct drm_crtc *crtc, bool standby)
	1097	+{
	1098	+ struct rockchip_drm_private *priv = crtc->dev->dev_private;
	1099	+ int pipe = drm_crtc_index(crtc);
	1100	+
	1101	+ if (pipe < ROCKCHIP_MAX_CRTC &&
	1102	+ priv->crtc_funcs[pipe] &&
	1103	+ priv->crtc_funcs[pipe]->crtc_standby)
	1104	+ priv->crtc_funcs[pipe]->crtc_standby(crtc, standby);
1268	1105	}
1269	1106
1270	1107	int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
..	..	@@ -1383,16 +1220,12 @@
1383	1220	struct drm_minor *minor = node->minor;
1384	1221	struct drm_device *drm_dev = minor->dev;
1385	1222	struct rockchip_drm_private *priv = drm_dev->dev_private;
1386		-
1387	1223	struct drm_printer p = drm_seq_file_printer(s);
1388	1224
1389	1225	if (!priv->domain)
1390	1226	return 0;
1391		-
1392	1227	mutex_lock(&priv->mm_lock);
1393		-
1394	1228	drm_mm_print(&priv->mm, &p);
1395		-
1396	1229	mutex_unlock(&priv->mm_lock);
1397	1230
1398	1231	return 0;
..	..	@@ -1462,21 +1295,15 @@
1462	1295	{ "mm_dump", rockchip_drm_mm_dump, 0, NULL },
1463	1296	};
1464	1297
1465		-static int rockchip_drm_debugfs_init(struct drm_minor *minor)
	1298	+static void rockchip_drm_debugfs_init(struct drm_minor *minor)
1466	1299	{
1467	1300	struct drm_device *dev = minor->dev;
1468	1301	struct rockchip_drm_private *priv = dev->dev_private;
1469	1302	struct drm_crtc *crtc;
1470		- int ret;
1471	1303
1472		- ret = drm_debugfs_create_files(rockchip_debugfs_files,
1473		- ARRAY_SIZE(rockchip_debugfs_files),
1474		- minor->debugfs_root,
1475		- minor);
1476		- if (ret) {
1477		- dev_err(dev->dev, "could not install rockchip_debugfs_list\n");
1478		- return ret;
1479		- }
	1304	+ drm_debugfs_create_files(rockchip_debugfs_files,
	1305	+ ARRAY_SIZE(rockchip_debugfs_files),
	1306	+ minor->debugfs_root, minor);
1480	1307
1481	1308	drm_for_each_crtc(crtc, dev) {
1482	1309	int pipe = drm_crtc_index(crtc);
..	..	@@ -1485,10 +1312,14 @@
1485	1312	priv->crtc_funcs[pipe]->debugfs_init)
1486	1313	priv->crtc_funcs[pipe]->debugfs_init(minor, crtc);
1487	1314	}
1488		-
1489		- return 0;
1490	1315	}
1491	1316	#endif
	1317	+
	1318	+static const struct drm_prop_enum_list split_area[] = {
	1319	+ { ROCKCHIP_DRM_SPLIT_UNSET, "UNSET" },
	1320	+ { ROCKCHIP_DRM_SPLIT_LEFT_SIDE, "LEFT" },
	1321	+ { ROCKCHIP_DRM_SPLIT_RIGHT_SIDE, "RIGHT" },
	1322	+};
1492	1323
1493	1324	static int rockchip_drm_create_properties(struct drm_device *dev)
1494	1325	{
..	..	@@ -1508,24 +1339,6 @@
1508	1339	private->color_space_prop = prop;
1509	1340
1510	1341	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1511		- "GLOBAL_ALPHA", 0, 255);
1512		- if (!prop)
1513		- return -ENOMEM;
1514		- private->global_alpha_prop = prop;
1515		-
1516		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1517		- "BLEND_MODE", 0, 1);
1518		- if (!prop)
1519		- return -ENOMEM;
1520		- private->blend_mode_prop = prop;
1521		-
1522		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1523		- "ALPHA_SCALE", 0, 1);
1524		- if (!prop)
1525		- return -ENOMEM;
1526		- private->alpha_scale_prop = prop;
1527		-
1528		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1529	1342	"ASYNC_COMMIT", 0, 1);
1530	1343	if (!prop)
1531	1344	return -ENOMEM;
..	..	@@ -1537,53 +1350,35 @@
1537	1350	return -ENOMEM;
1538	1351	private->share_id_prop = prop;
1539	1352
1540		- prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
	1353	+ prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
1541	1354	"CONNECTOR_ID", 0, 0xf);
1542	1355	if (!prop)
1543	1356	return -ENOMEM;
1544	1357	private->connector_id_prop = prop;
1545	1358
	1359	+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "SPLIT_AREA",
	1360	+ split_area,
	1361	+ ARRAY_SIZE(split_area));
	1362	+ private->split_area_prop = prop;
	1363	+
	1364	+ prop = drm_property_create_object(dev,
	1365	+ DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
	1366	+ "SOC_ID", DRM_MODE_OBJECT_CRTC);
	1367	+ private->soc_id_prop = prop;
	1368	+
	1369	+ prop = drm_property_create_object(dev,
	1370	+ DRM_MODE_PROP_ATOMIC \| DRM_MODE_PROP_IMMUTABLE,
	1371	+ "PORT_ID", DRM_MODE_OBJECT_CRTC);
	1372	+ private->port_id_prop = prop;
	1373	+
	1374	+ private->aclk_prop = drm_property_create_range(dev, 0, "ACLK", 0, UINT_MAX);
	1375	+ private->bg_prop = drm_property_create_range(dev, 0, "BACKGROUND", 0, UINT_MAX);
	1376	+ private->line_flag_prop = drm_property_create_range(dev, 0, "LINE_FLAG1", 0, UINT_MAX);
	1377	+ private->cubic_lut_prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "CUBIC_LUT", 0);
	1378	+ private->cubic_lut_size_prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
	1379	+ "CUBIC_LUT_SIZE", 0, UINT_MAX);
	1380	+
1546	1381	return drm_mode_create_tv_properties(dev, 0, NULL);
1547		-}
1548		-
1549		-static int rockchip_gem_pool_init(struct drm_device *drm)
1550		-{
1551		- struct rockchip_drm_private *private = drm->dev_private;
1552		- struct device_node *np = drm->dev->of_node;
1553		- struct device_node *node;
1554		- phys_addr_t start, size;
1555		- struct resource res;
1556		- int ret;
1557		-
1558		- node = of_parse_phandle(np, "secure-memory-region", 0);
1559		- if (!node)
1560		- return -ENXIO;
1561		-
1562		- ret = of_address_to_resource(node, 0, &res);
1563		- if (ret)
1564		- return ret;
1565		- start = res.start;
1566		- size = resource_size(&res);
1567		- if (!size)
1568		- return -ENOMEM;
1569		-
1570		- private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
1571		- if (!private->secure_buffer_pool)
1572		- return -ENOMEM;
1573		-
1574		- gen_pool_add(private->secure_buffer_pool, start, size, -1);
1575		-
1576		- return 0;
1577		-}
1578		-
1579		-static void rockchip_gem_pool_destroy(struct drm_device *drm)
1580		-{
1581		- struct rockchip_drm_private *private = drm->dev_private;
1582		-
1583		- if (!private->secure_buffer_pool)
1584		- return;
1585		-
1586		- gen_pool_destroy(private->secure_buffer_pool);
1587	1382	}
1588	1383
1589	1384	static void rockchip_attach_connector_property(struct drm_device *drm)
..	..	@@ -1655,20 +1450,44 @@
1655	1450	drm_modeset_unlock_all(drm);
1656	1451	}
1657	1452
1658		-static bool is_support_hotplug(uint32_t output_type)
	1453	+static int rockchip_gem_pool_init(struct drm_device *drm)
1659	1454	{
1660		- switch (output_type) {
1661		- case DRM_MODE_CONNECTOR_DVII:
1662		- case DRM_MODE_CONNECTOR_DVID:
1663		- case DRM_MODE_CONNECTOR_DVIA:
1664		- case DRM_MODE_CONNECTOR_DisplayPort:
1665		- case DRM_MODE_CONNECTOR_HDMIA:
1666		- case DRM_MODE_CONNECTOR_HDMIB:
1667		- case DRM_MODE_CONNECTOR_TV:
1668		- return true;
1669		- default:
1670		- return false;
1671		- }
	1455	+ struct rockchip_drm_private *private = drm->dev_private;
	1456	+ struct device_node *np = drm->dev->of_node;
	1457	+ struct device_node *node;
	1458	+ phys_addr_t start, size;
	1459	+ struct resource res;
	1460	+ int ret;
	1461	+
	1462	+ node = of_parse_phandle(np, "secure-memory-region", 0);
	1463	+ if (!node)
	1464	+ return -ENXIO;
	1465	+
	1466	+ ret = of_address_to_resource(node, 0, &res);
	1467	+ if (ret)
	1468	+ return ret;
	1469	+ start = res.start;
	1470	+ size = resource_size(&res);
	1471	+ if (!size)
	1472	+ return -ENOMEM;
	1473	+
	1474	+ private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
	1475	+ if (!private->secure_buffer_pool)
	1476	+ return -ENOMEM;
	1477	+
	1478	+ gen_pool_add(private->secure_buffer_pool, start, size, -1);
	1479	+
	1480	+ return 0;
	1481	+}
	1482	+
	1483	+static void rockchip_gem_pool_destroy(struct drm_device *drm)
	1484	+{
	1485	+ struct rockchip_drm_private *private = drm->dev_private;
	1486	+
	1487	+ if (!private->secure_buffer_pool)
	1488	+ return;
	1489	+
	1490	+ gen_pool_destroy(private->secure_buffer_pool);
1672	1491	}
1673	1492
1674	1493	static int rockchip_drm_bind(struct device *dev)
..	..	@@ -1676,9 +1495,6 @@
1676	1495	struct drm_device *drm_dev;
1677	1496	struct rockchip_drm_private *private;
1678	1497	int ret;
1679		- struct device_node *np = dev->of_node;
1680		- struct device_node *parent_np;
1681		- struct drm_crtc *crtc;
1682	1498
1683	1499	drm_dev = drm_dev_alloc(&rockchip_drm_driver, dev);
1684	1500	if (IS_ERR(drm_dev))
..	..	@@ -1692,35 +1508,16 @@
1692	1508	goto err_free;
1693	1509	}
1694	1510
1695		- mutex_init(&private->commit_lock);
1696	1511	mutex_init(&private->ovl_lock);
1697		- INIT_WORK(&private->commit_work, rockchip_drm_atomic_work);
	1512	+
1698	1513	drm_dev->dev_private = private;
1699	1514
1700		- private->dmc_support = false;
1701		- private->devfreq = devfreq_get_devfreq_by_phandle(dev, 0);
1702		- if (IS_ERR(private->devfreq)) {
1703		- if (PTR_ERR(private->devfreq) == -EPROBE_DEFER) {
1704		- parent_np = of_parse_phandle(np, "devfreq", 0);
1705		- if (parent_np &&
1706		- of_device_is_available(parent_np)) {
1707		- private->dmc_support = true;
1708		- dev_warn(dev, "defer getting devfreq\n");
1709		- } else {
1710		- dev_info(dev, "dmc is disabled\n");
1711		- }
1712		- } else {
1713		- dev_info(dev, "devfreq is not set\n");
1714		- }
1715		- private->devfreq = NULL;
1716		- } else {
1717		- private->dmc_support = true;
1718		- dev_info(dev, "devfreq is ready\n");
1719		- }
1720		- private->hdmi_pll.pll = devm_clk_get(dev, "hdmi-tmds-pll");
1721		- if (PTR_ERR(private->hdmi_pll.pll) == -ENOENT) {
1722		- private->hdmi_pll.pll = NULL;
1723		- } else if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
	1515	+ INIT_LIST_HEAD(&private->psr_list);
	1516	+ mutex_init(&private->psr_list_lock);
	1517	+ mutex_init(&private->commit_lock);
	1518	+
	1519	+ private->hdmi_pll.pll = devm_clk_get_optional(dev, "hdmi-tmds-pll");
	1520	+ if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
1724	1521	ret = -EPROBE_DEFER;
1725	1522	goto err_free;
1726	1523	} else if (IS_ERR(private->hdmi_pll.pll)) {
..	..	@@ -1728,10 +1525,8 @@
1728	1525	ret = PTR_ERR(private->hdmi_pll.pll);
1729	1526	goto err_free;
1730	1527	}
1731		- private->default_pll.pll = devm_clk_get(dev, "default-vop-pll");
1732		- if (PTR_ERR(private->default_pll.pll) == -ENOENT) {
1733		- private->default_pll.pll = NULL;
1734		- } else if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
	1528	+ private->default_pll.pll = devm_clk_get_optional(dev, "default-vop-pll");
	1529	+ if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
1735	1530	ret = -EPROBE_DEFER;
1736	1531	goto err_free;
1737	1532	} else if (IS_ERR(private->default_pll.pll)) {
..	..	@@ -1740,14 +1535,9 @@
1740	1535	goto err_free;
1741	1536	}
1742	1537
1743		- INIT_LIST_HEAD(&private->psr_list);
1744		- mutex_init(&private->psr_list_lock);
1745		-
1746		- ret = rockchip_drm_init_iommu(drm_dev);
	1538	+ ret = drmm_mode_config_init(drm_dev);
1747	1539	if (ret)
1748	1540	goto err_free;
1749		-
1750		- drm_mode_config_init(drm_dev);
1751	1541
1752	1542	rockchip_drm_mode_config_init(drm_dev);
1753	1543	rockchip_drm_create_properties(drm_dev);
..	..	@@ -1773,48 +1563,40 @@
1773	1563	/* init kms poll for handling hpd */
1774	1564	drm_kms_helper_poll_init(drm_dev);
1775	1565
1776		- private->page_pools = dmabuf_page_pool_create(GFP_HIGHUSER \| __GFP_ZERO \| __GFP_COMP, 0);
	1566	+ ret = rockchip_drm_init_iommu(drm_dev);
	1567	+ if (ret)
	1568	+ goto err_unbind_all;
1777	1569
1778	1570	rockchip_gem_pool_init(drm_dev);
1779		-#ifndef MODULE
1780		- show_loader_logo(drm_dev);
1781		-#endif
1782	1571	ret = of_reserved_mem_device_init(drm_dev->dev);
1783	1572	if (ret)
1784	1573	DRM_DEBUG_KMS("No reserved memory region assign to drm\n");
1785	1574
	1575	+ rockchip_drm_show_logo(drm_dev);
	1576	+
1786	1577	ret = rockchip_drm_fbdev_init(drm_dev);
1787	1578	if (ret)
1788		- goto err_kms_helper_poll_fini;
1789		-
1790		- if (private->fbdev_helper && private->fbdev_helper->fb) {
1791		- drm_for_each_crtc(crtc, drm_dev) {
1792		- struct rockchip_crtc_state *s = NULL;
1793		-
1794		- s = to_rockchip_crtc_state(crtc->state);
1795		- if (is_support_hotplug(s->output_type))
1796		- drm_framebuffer_get(private->fbdev_helper->fb);
1797		- }
1798		- }
	1579	+ goto err_iommu_cleanup;
1799	1580
1800	1581	drm_dev->mode_config.allow_fb_modifiers = true;
1801	1582
1802	1583	ret = drm_dev_register(drm_dev, 0);
1803	1584	if (ret)
1804		- goto err_fbdev_fini;
	1585	+ goto err_kms_helper_poll_fini;
	1586	+
	1587	+ rockchip_clk_unprotect();
1805	1588
1806	1589	return 0;
1807		-err_fbdev_fini:
1808		- rockchip_drm_fbdev_fini(drm_dev);
1809	1590	err_kms_helper_poll_fini:
1810	1591	rockchip_gem_pool_destroy(drm_dev);
1811	1592	drm_kms_helper_poll_fini(drm_dev);
	1593	+ rockchip_drm_fbdev_fini(drm_dev);
	1594	+err_iommu_cleanup:
	1595	+ rockchip_iommu_cleanup(drm_dev);
1812	1596	err_unbind_all:
1813		- dmabuf_page_pool_destroy(private->page_pools);
1814	1597	component_unbind_all(dev, drm_dev);
1815	1598	err_mode_config_cleanup:
1816	1599	drm_mode_config_cleanup(drm_dev);
1817		- rockchip_iommu_cleanup(drm_dev);
1818	1600	err_free:
1819	1601	drm_dev->dev_private = NULL;
1820	1602	dev_set_drvdata(dev, NULL);
..	..	@@ -1971,61 +1753,20 @@
1971	1753	return rockchip_gem_prime_end_cpu_access(obj, dir);
1972	1754	}
1973	1755
1974		-static int rockchip_drm_gem_begin_cpu_access_partial(
1975		- struct dma_buf *dma_buf,
1976		- enum dma_data_direction dir,
1977		- unsigned int offset, unsigned int len)
1978		-{
1979		- struct drm_gem_object *obj = dma_buf->priv;
1980		-
1981		- return rockchip_gem_prime_begin_cpu_access_partial(obj, dir, offset, len);
1982		-}
1983		-
1984		-static int rockchip_drm_gem_end_cpu_access_partial(
1985		- struct dma_buf *dma_buf,
1986		- enum dma_data_direction dir,
1987		- unsigned int offset, unsigned int len)
1988		-{
1989		- struct drm_gem_object *obj = dma_buf->priv;
1990		-
1991		- return rockchip_gem_prime_end_cpu_access_partial(obj, dir, offset, len);
1992		-}
1993		-
1994	1756	static const struct dma_buf_ops rockchip_drm_gem_prime_dmabuf_ops = {
	1757	+ .cache_sgt_mapping = true,
1995	1758	.attach = drm_gem_map_attach,
1996	1759	.detach = drm_gem_map_detach,
1997	1760	.map_dma_buf = drm_gem_map_dma_buf,
1998	1761	.unmap_dma_buf = drm_gem_unmap_dma_buf,
1999	1762	.release = drm_gem_dmabuf_release,
2000		- .map = drm_gem_dmabuf_kmap,
2001		- .unmap = drm_gem_dmabuf_kunmap,
2002	1763	.mmap = drm_gem_dmabuf_mmap,
2003	1764	.vmap = drm_gem_dmabuf_vmap,
2004	1765	.vunmap = drm_gem_dmabuf_vunmap,
	1766	+ .get_uuid = drm_gem_dmabuf_get_uuid,
2005	1767	.begin_cpu_access = rockchip_drm_gem_dmabuf_begin_cpu_access,
2006	1768	.end_cpu_access = rockchip_drm_gem_dmabuf_end_cpu_access,
2007		- .begin_cpu_access_partial = rockchip_drm_gem_begin_cpu_access_partial,
2008		- .end_cpu_access_partial = rockchip_drm_gem_end_cpu_access_partial,
2009	1769	};
2010		-
2011		-#ifdef CONFIG_ARCH_ROCKCHIP
2012		-static void drm_gem_prime_dmabuf_release_callback(void *data)
2013		-{
2014		- struct drm_prime_callback_data *cb_data = data;
2015		-
2016		- if (cb_data && cb_data->obj && cb_data->obj->import_attach) {
2017		- struct dma_buf_attachment *attach = cb_data->obj->import_attach;
2018		- struct sg_table *sgt = cb_data->sgt;
2019		-
2020		- if (sgt)
2021		- dma_buf_unmap_attachment(attach, sgt,
2022		- DMA_BIDIRECTIONAL);
2023		- dma_buf_detach(attach->dmabuf, attach);
2024		- drm_gem_object_put_unlocked(cb_data->obj);
2025		- kfree(cb_data);
2026		- }
2027		-}
2028		-#endif
2029	1770
2030	1771	static struct drm_gem_object rockchip_drm_gem_prime_import_dev(struct drm_device dev,
2031	1772	struct dma_buf *dma_buf,
..	..	@@ -2034,9 +1775,6 @@
2034	1775	struct dma_buf_attachment *attach;
2035	1776	struct sg_table *sgt;
2036	1777	struct drm_gem_object *obj;
2037		-#ifdef CONFIG_ARCH_ROCKCHIP
2038		- struct drm_prime_callback_data *cb_data = NULL;
2039		-#endif
2040	1778	int ret;
2041	1779
2042	1780	if (dma_buf->ops == &rockchip_drm_gem_prime_dmabuf_ops) {
..	..	@@ -2051,15 +1789,6 @@
2051	1789	}
2052	1790	}
2053	1791
2054		-#ifdef CONFIG_ARCH_ROCKCHIP
2055		- cb_data = dma_buf_get_release_callback_data(dma_buf,
2056		- drm_gem_prime_dmabuf_release_callback);
2057		- if (cb_data && cb_data->obj && cb_data->obj->dev == dev) {
2058		- drm_gem_object_get(cb_data->obj);
2059		- return cb_data->obj;
2060		- }
2061		-#endif
2062		-
2063	1792	if (!dev->driver->gem_prime_import_sg_table)
2064	1793	return ERR_PTR(-EINVAL);
2065	1794
..	..	@@ -2068,14 +1797,6 @@
2068	1797	return ERR_CAST(attach);
2069	1798
2070	1799	get_dma_buf(dma_buf);
2071		-
2072		-#ifdef CONFIG_ARCH_ROCKCHIP
2073		- cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
2074		- if (!cb_data) {
2075		- ret = -ENOMEM;
2076		- goto fail_detach;
2077		- }
2078		-#endif
2079	1800
2080	1801	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
2081	1802	if (IS_ERR(sgt)) {
..	..	@@ -2090,24 +1811,13 @@
2090	1811	}
2091	1812
2092	1813	obj->import_attach = attach;
2093		-
2094		-#ifdef CONFIG_ARCH_ROCKCHIP
2095		- cb_data->obj = obj;
2096		- cb_data->sgt = sgt;
2097		- dma_buf_set_release_callback(dma_buf,
2098		- drm_gem_prime_dmabuf_release_callback, cb_data);
2099		- dma_buf_put(dma_buf);
2100		- drm_gem_object_get(obj);
2101		-#endif
	1814	+ obj->resv = dma_buf->resv;
2102	1815
2103	1816	return obj;
2104	1817
2105	1818	fail_unmap:
2106	1819	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
2107	1820	fail_detach:
2108		-#ifdef CONFIG_ARCH_ROCKCHIP
2109		- kfree(cb_data);
2110		-#endif
2111	1821	dma_buf_detach(dma_buf, attach);
2112	1822	dma_buf_put(dma_buf);
2113	1823
..	..	@@ -2120,10 +1830,10 @@
2120	1830	return rockchip_drm_gem_prime_import_dev(dev, dma_buf, dev->dev);
2121	1831	}
2122	1832
2123		-static struct dma_buf rockchip_drm_gem_prime_export(struct drm_device dev,
2124		- struct drm_gem_object *obj,
	1833	+static struct dma_buf rockchip_drm_gem_prime_export(struct drm_gem_object obj,
2125	1834	int flags)
2126	1835	{
	1836	+ struct drm_device *dev = obj->dev;
2127	1837	struct dma_buf_export_info exp_info = {
2128	1838	.exp_name = KBUILD_MODNAME, /* white lie for debug */
2129	1839	.owner = dev->driver->fops->owner,
..	..	@@ -2131,26 +1841,20 @@
2131	1841	.size = obj->size,
2132	1842	.flags = flags,
2133	1843	.priv = obj,
	1844	+ .resv = obj->resv,
2134	1845	};
2135		-
2136		- if (dev->driver->gem_prime_res_obj)
2137		- exp_info.resv = dev->driver->gem_prime_res_obj(obj);
2138	1846
2139	1847	return drm_gem_dmabuf_export(dev, &exp_info);
2140	1848	}
2141	1849
2142	1850	static struct drm_driver rockchip_drm_driver = {
2143		- .driver_features = DRIVER_MODESET \| DRIVER_GEM \|
2144		- DRIVER_PRIME \| DRIVER_ATOMIC \|
2145		- DRIVER_RENDER,
	1851	+ .driver_features = DRIVER_MODESET \| DRIVER_GEM \| DRIVER_ATOMIC \| DRIVER_RENDER,
2146	1852	.postclose = rockchip_drm_postclose,
2147	1853	.lastclose = rockchip_drm_lastclose,
2148	1854	.open = rockchip_drm_open,
2149	1855	.gem_vm_ops = &drm_gem_cma_vm_ops,
2150	1856	.gem_free_object_unlocked = rockchip_gem_free_object,
2151	1857	.dumb_create = rockchip_gem_dumb_create,
2152		- .dumb_map_offset = rockchip_gem_dumb_map_offset,
2153		- .dumb_destroy = drm_gem_dumb_destroy,
2154	1858	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
2155	1859	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
2156	1860	.gem_prime_import = rockchip_drm_gem_prime_import,
..	..	@@ -2171,64 +1875,21 @@
2171	1875	.date = DRIVER_DATE,
2172	1876	.major = DRIVER_MAJOR,
2173	1877	.minor = DRIVER_MINOR,
2174		- .patchlevel = DRIVER_PATCH,
2175	1878	};
2176	1879
2177	1880	#ifdef CONFIG_PM_SLEEP
2178		-static void rockchip_drm_fb_suspend(struct drm_device *drm)
2179		-{
2180		- struct rockchip_drm_private *priv = drm->dev_private;
2181		-
2182		- console_lock();
2183		- drm_fb_helper_set_suspend(priv->fbdev_helper, 1);
2184		- console_unlock();
2185		-}
2186		-
2187		-static void rockchip_drm_fb_resume(struct drm_device *drm)
2188		-{
2189		- struct rockchip_drm_private *priv = drm->dev_private;
2190		-
2191		- console_lock();
2192		- drm_fb_helper_set_suspend(priv->fbdev_helper, 0);
2193		- console_unlock();
2194		-}
2195		-
2196	1881	static int rockchip_drm_sys_suspend(struct device *dev)
2197	1882	{
2198	1883	struct drm_device *drm = dev_get_drvdata(dev);
2199		- struct rockchip_drm_private *priv;
2200	1884
2201		- if (!drm)
2202		- return 0;
2203		-
2204		- drm_kms_helper_poll_disable(drm);
2205		- rockchip_drm_fb_suspend(drm);
2206		-
2207		- priv = drm->dev_private;
2208		- priv->state = drm_atomic_helper_suspend(drm);
2209		- if (IS_ERR(priv->state)) {
2210		- rockchip_drm_fb_resume(drm);
2211		- drm_kms_helper_poll_enable(drm);
2212		- return PTR_ERR(priv->state);
2213		- }
2214		-
2215		- return 0;
	1885	+ return drm_mode_config_helper_suspend(drm);
2216	1886	}
2217	1887
2218	1888	static int rockchip_drm_sys_resume(struct device *dev)
2219	1889	{
2220	1890	struct drm_device *drm = dev_get_drvdata(dev);
2221		- struct rockchip_drm_private *priv;
2222	1891
2223		- if (!drm)
2224		- return 0;
2225		-
2226		- priv = drm->dev_private;
2227		- drm_atomic_helper_resume(drm, priv->state);
2228		- rockchip_drm_fb_resume(drm);
2229		- drm_kms_helper_poll_enable(drm);
2230		-
2231		- return 0;
	1892	+ return drm_mode_config_helper_resume(drm);
2232	1893	}
2233	1894	#endif
2234	1895
..	..	@@ -2240,6 +1901,53 @@
2240	1901	#define MAX_ROCKCHIP_SUB_DRIVERS 16
2241	1902	static struct platform_driver *rockchip_sub_drivers[MAX_ROCKCHIP_SUB_DRIVERS];
2242	1903	static int num_rockchip_sub_drivers;
	1904	+
	1905	+/*
	1906	+ * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
	1907	+ * Should be called from the component bind stage of the drivers
	1908	+ * to ensure that all subdrivers are probed.
	1909	+ *
	1910	+ * @ep: endpoint of a rockchip vop
	1911	+ *
	1912	+ * returns true if subdriver, false if external bridge and -ENODEV
	1913	+ * if remote port does not contain a device.
	1914	+ */
	1915	+int rockchip_drm_endpoint_is_subdriver(struct device_node *ep)
	1916	+{
	1917	+ struct device_node *node = of_graph_get_remote_port_parent(ep);
	1918	+ struct platform_device *pdev;
	1919	+ struct device_driver *drv;
	1920	+ int i;
	1921	+
	1922	+ if (!node)
	1923	+ return -ENODEV;
	1924	+
	1925	+ /* status disabled will prevent creation of platform-devices */
	1926	+ pdev = of_find_device_by_node(node);
	1927	+ of_node_put(node);
	1928	+ if (!pdev)
	1929	+ return -ENODEV;
	1930	+
	1931	+ /*
	1932	+ * All rockchip subdrivers have probed at this point, so
	1933	+ * any device not having a driver now is an external bridge.
	1934	+ */
	1935	+ drv = pdev->dev.driver;
	1936	+ if (!drv) {
	1937	+ platform_device_put(pdev);
	1938	+ return false;
	1939	+ }
	1940	+
	1941	+ for (i = 0; i < num_rockchip_sub_drivers; i++) {
	1942	+ if (rockchip_sub_drivers[i] == to_platform_driver(drv)) {
	1943	+ platform_device_put(pdev);
	1944	+ return true;
	1945	+ }
	1946	+ }
	1947	+
	1948	+ platform_device_put(pdev);
	1949	+ return false;
	1950	+}
2243	1951
2244	1952	static int compare_dev(struct device dev, void data)
2245	1953	{
..	..	@@ -2264,8 +1972,7 @@
2264	1972	struct device p = NULL, d;
2265	1973
2266	1974	do {
2267		- d = bus_find_device(&platform_bus_type, p, &drv->driver,
2268		- (void *)platform_bus_type.match);
	1975	+ d = platform_find_device_by_driver(p, &drv->driver);
2269	1976	put_device(p);
2270	1977	p = d;
2271	1978
..	..	@@ -2311,7 +2018,7 @@
2311	2018	}
2312	2019
2313	2020	iommu = of_parse_phandle(port->parent, "iommus", 0);
2314		- if (!iommu \|\| !of_device_is_available(iommu->parent)) {
	2021	+ if (!iommu \|\| !of_device_is_available(iommu)) {
2315	2022	DRM_DEV_DEBUG(dev,
2316	2023	"no iommu attached for %pOF, using non-iommu buffers\n",
2317	2024	port->parent);
..	..	@@ -2323,8 +2030,8 @@
2323	2030	}
2324	2031
2325	2032	found = true;
2326		- iommu_reserve_map \|= of_property_read_bool(iommu, "rockchip,reserve-map");
2327	2033
	2034	+ iommu_reserve_map \|= of_property_read_bool(iommu, "rockchip,reserve-map");
2328	2035	of_node_put(iommu);
2329	2036	of_node_put(port);
2330	2037	}
..	..	@@ -2359,14 +2066,19 @@
2359	2066	if (IS_ERR(match))
2360	2067	return PTR_ERR(match);
2361	2068
	2069	+ ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
	2070	+ if (ret)
	2071	+ goto err;
	2072	+
2362	2073	ret = component_master_add_with_match(dev, &rockchip_drm_ops, match);
2363		- if (ret < 0) {
2364		- rockchip_drm_match_remove(dev);
2365		- return ret;
2366		- }
2367		- dev->coherent_dma_mask = DMA_BIT_MASK(64);
	2074	+ if (ret < 0)
	2075	+ goto err;
2368	2076
2369	2077	return 0;
	2078	+err:
	2079	+ rockchip_drm_match_remove(dev);
	2080	+
	2081	+ return ret;
2370	2082	}
2371	2083
2372	2084	static int rockchip_drm_platform_remove(struct platform_device *pdev)
..	..	@@ -2382,10 +2094,8 @@
2382	2094	{
2383	2095	struct drm_device *drm = platform_get_drvdata(pdev);
2384	2096
2385		- if (drm) {
2386		- drm_kms_helper_poll_fini(drm);
	2097	+ if (drm)
2387	2098	drm_atomic_helper_shutdown(drm);
2388		- }
2389	2099	}
2390	2100
2391	2101	static const struct of_device_id rockchip_drm_dt_ids[] = {
..	..	@@ -2421,6 +2131,7 @@
2421	2131	#else
2422	2132	ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
2423	2133	ADD_ROCKCHIP_SUB_DRIVER(vop2_platform_driver, CONFIG_ROCKCHIP_VOP2);
	2134	+ ADD_ROCKCHIP_SUB_DRIVER(vconn_platform_driver, CONFIG_ROCKCHIP_VCONN);
2424	2135	ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
2425	2136	CONFIG_ROCKCHIP_LVDS);
2426	2137	ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,
..	..	@@ -2428,12 +2139,17 @@
2428	2139	ADD_ROCKCHIP_SUB_DRIVER(cdn_dp_driver, CONFIG_ROCKCHIP_CDN_DP);
2429	2140	ADD_ROCKCHIP_SUB_DRIVER(dw_hdmi_rockchip_pltfm_driver,
2430	2141	CONFIG_ROCKCHIP_DW_HDMI);
2431		- ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_driver,
	2142	+ ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_rockchip_driver,
	2143	+ CONFIG_ROCKCHIP_DW_MIPI_DSI);
	2144	+ ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi2_rockchip_driver,
2432	2145	CONFIG_ROCKCHIP_DW_MIPI_DSI);
2433	2146	ADD_ROCKCHIP_SUB_DRIVER(inno_hdmi_driver, CONFIG_ROCKCHIP_INNO_HDMI);
2434		- ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver,
2435		- CONFIG_ROCKCHIP_DRM_TVE);
	2147	+ ADD_ROCKCHIP_SUB_DRIVER(rk3066_hdmi_driver,
	2148	+ CONFIG_ROCKCHIP_RK3066_HDMI);
2436	2149	ADD_ROCKCHIP_SUB_DRIVER(rockchip_rgb_driver, CONFIG_ROCKCHIP_RGB);
	2150	+ ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver, CONFIG_ROCKCHIP_DRM_TVE);
	2151	+ ADD_ROCKCHIP_SUB_DRIVER(dw_dp_driver, CONFIG_ROCKCHIP_DW_DP);
	2152	+
2437	2153	#endif
2438	2154	ret = platform_register_drivers(rockchip_sub_drivers,
2439	2155	num_rockchip_sub_drivers);
..	..	@@ -2443,6 +2159,8 @@
2443	2159	ret = platform_driver_register(&rockchip_drm_platform_driver);
2444	2160	if (ret)
2445	2161	goto err_unreg_drivers;
	2162	+
	2163	+ rockchip_gem_get_ddr_info();
2446	2164
2447	2165	return 0;
2448	2166
..	..	@@ -2460,7 +2178,11 @@
2460	2178	num_rockchip_sub_drivers);
2461	2179	}
2462	2180
	2181	+#ifdef CONFIG_VIDEO_REVERSE_IMAGE
	2182	+fs_initcall(rockchip_drm_init);
	2183	+#else
2463	2184	module_init(rockchip_drm_init);
	2185	+#endif
2464	2186	module_exit(rockchip_drm_fini);
2465	2187
2466	2188	MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");