mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/gpio/gpio-uniphier.c
..
..
@@ -1,18 +1,9 @@
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-/*
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- * Copyright (C) 2017 Socionext Inc.
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- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- */
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+// SPDX-License-Identifier: GPL-2.0
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+//
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+// Copyright (C) 2017 Socionext Inc.
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+//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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5
 
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-#include <linux/bitops.h>
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+#include <linux/bits.h>
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 #include <linux/gpio/driver.h>
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 #include <linux/irq.h>
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 #include <linux/irqdomain.h>
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..
@@ -23,9 +14,6 @@
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 #include <linux/platform_device.h>
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 #include <linux/spinlock.h>
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 #include <dt-bindings/gpio/uniphier-gpio.h>
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-
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-#define UNIPHIER_GPIO_BANK_MASK		\
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-				GENMASK((UNIPHIER_GPIO_LINES_PER_BANK) - 1, 0)
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 #define UNIPHIER_GPIO_IRQ_MAX_NUM	24
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..
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@@ -42,7 +30,7 @@
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 	struct irq_domain *domain;
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 	void __iomem *regs;
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 	spinlock_t lock;
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-	u32 saved_vals[0];
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+	u32 saved_vals[];
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 };
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 static unsigned int uniphier_gpio_bank_to_reg(unsigned int bank)
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@@ -122,7 +110,10 @@
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 static int uniphier_gpio_get_direction(struct gpio_chip *chip,
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 				       unsigned int offset)
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 {
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-	return uniphier_gpio_offset_read(chip, offset, UNIPHIER_GPIO_PORT_DIR);
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+	if (uniphier_gpio_offset_read(chip, offset, UNIPHIER_GPIO_PORT_DIR))
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+		return GPIO_LINE_DIRECTION_IN;
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+
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+	return GPIO_LINE_DIRECTION_OUT;
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 }
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 static int uniphier_gpio_direction_input(struct gpio_chip *chip,
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@@ -156,15 +147,11 @@
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 static void uniphier_gpio_set_multiple(struct gpio_chip *chip,
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 				       unsigned long *mask, unsigned long *bits)
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 {
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-	unsigned int bank, shift, bank_mask, bank_bits;
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-	int i;
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+	unsigned long i, bank, bank_mask, bank_bits;
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-	for (i = 0; i < chip->ngpio; i += UNIPHIER_GPIO_LINES_PER_BANK) {
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+	for_each_set_clump8(i, bank_mask, mask, chip->ngpio) {
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 		bank = i / UNIPHIER_GPIO_LINES_PER_BANK;
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-		shift = i % BITS_PER_LONG;
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-		bank_mask = (mask[BIT_WORD(i)] >> shift) &
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-						UNIPHIER_GPIO_BANK_MASK;
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-		bank_bits = bits[BIT_WORD(i)] >> shift;
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+		bank_bits = bitmap_get_value8(bits, i);
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 		uniphier_gpio_bank_write(chip, bank, UNIPHIER_GPIO_PORT_DATA,
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 					 bank_mask, bank_bits);
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@@ -355,7 +342,6 @@
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 	struct uniphier_gpio_priv *priv;
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 	struct gpio_chip *chip;
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 	struct irq_chip *irq_chip;
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-	struct resource *regs;
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 	unsigned int nregs;
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 	u32 ngpios;
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 	int ret;
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@@ -379,8 +365,7 @@
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 	if (!priv)
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 		return -ENOMEM;
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-	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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-	priv->regs = devm_ioremap_resource(dev, regs);
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+	priv->regs = devm_platform_ioremap_resource(pdev, 0);
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 	if (IS_ERR(priv->regs))
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 		return PTR_ERR(priv->regs);
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