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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* Abilis Systems MODULE DESCRIPTION |
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| 2 | 3 | * |
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| 3 | 4 | * Copyright (C) Abilis Systems 2013 |
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| 4 | 5 | * |
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| 5 | 6 | * Authors: Sascha Leuenberger <sascha.leuenberger@abilis.com> |
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| 6 | 7 | * Christian Ruppert <christian.ruppert@abilis.com> |
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| 7 | | - * |
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| 8 | | - * This program is free software; you can redistribute it and/or modify |
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| 9 | | - * it under the terms of the GNU General Public License version 2 as |
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| 10 | | - * published by the Free Software Foundation. |
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| 11 | | - * |
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| 12 | | - * This program is distributed in the hope that it will be useful, |
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| 13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | | - * GNU General Public License for more details. |
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| 16 | | - * |
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| 17 | | - * You should have received a copy of the GNU General Public License |
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| 18 | | - * along with this program; if not, write to the Free Software |
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| 19 | | - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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| 20 | 8 | */ |
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| 21 | 9 | |
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| 22 | 10 | #include <linux/kernel.h> |
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| .. | .. |
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| 45 | 33 | |
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| 46 | 34 | |
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| 47 | 35 | /** |
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| 48 | | - * @spinlock: used for atomic read/modify/write of registers |
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| 49 | 36 | * @base: register base address |
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| 50 | 37 | * @domain: IRQ domain of GPIO generated interrupts managed by this controller |
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| 51 | 38 | * @irq: Interrupt line of parent interrupt controller |
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| 52 | 39 | * @gc: gpio_chip structure associated to this GPIO controller |
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| 53 | 40 | */ |
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| 54 | 41 | struct tb10x_gpio { |
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| 55 | | - spinlock_t spinlock; |
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| 56 | 42 | void __iomem *base; |
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| 57 | 43 | struct irq_domain *domain; |
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| 58 | 44 | int irq; |
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| .. | .. |
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| 76 | 62 | u32 r; |
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| 77 | 63 | unsigned long flags; |
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| 78 | 64 | |
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| 79 | | - spin_lock_irqsave(&gpio->spinlock, flags); |
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| 65 | + spin_lock_irqsave(&gpio->gc.bgpio_lock, flags); |
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| 80 | 66 | |
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| 81 | 67 | r = tb10x_reg_read(gpio, offs); |
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| 82 | 68 | r = (r & ~mask) | (val & mask); |
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| 83 | 69 | |
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| 84 | 70 | tb10x_reg_write(gpio, offs, r); |
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| 85 | 71 | |
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| 86 | | - spin_unlock_irqrestore(&gpio->spinlock, flags); |
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| 87 | | -} |
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| 88 | | - |
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| 89 | | -static int tb10x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) |
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| 90 | | -{ |
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| 91 | | - struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
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| 92 | | - int mask = BIT(offset); |
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| 93 | | - int val = TB10X_GPIO_DIR_IN << offset; |
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| 94 | | - |
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| 95 | | - tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DDR, mask, val); |
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| 96 | | - |
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| 97 | | - return 0; |
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| 98 | | -} |
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| 99 | | - |
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| 100 | | -static int tb10x_gpio_get(struct gpio_chip *chip, unsigned offset) |
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| 101 | | -{ |
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| 102 | | - struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
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| 103 | | - int val; |
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| 104 | | - |
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| 105 | | - val = tb10x_reg_read(tb10x_gpio, OFFSET_TO_REG_DATA); |
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| 106 | | - |
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| 107 | | - if (val & BIT(offset)) |
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| 108 | | - return 1; |
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| 109 | | - else |
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| 110 | | - return 0; |
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| 111 | | -} |
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| 112 | | - |
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| 113 | | -static void tb10x_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
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| 114 | | -{ |
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| 115 | | - struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
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| 116 | | - int mask = BIT(offset); |
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| 117 | | - int val = value << offset; |
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| 118 | | - |
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| 119 | | - tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DATA, mask, val); |
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| 120 | | -} |
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| 121 | | - |
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| 122 | | -static int tb10x_gpio_direction_out(struct gpio_chip *chip, |
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| 123 | | - unsigned offset, int value) |
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| 124 | | -{ |
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| 125 | | - struct tb10x_gpio *tb10x_gpio = gpiochip_get_data(chip); |
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| 126 | | - int mask = BIT(offset); |
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| 127 | | - int val = TB10X_GPIO_DIR_OUT << offset; |
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| 128 | | - |
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| 129 | | - tb10x_gpio_set(chip, offset, value); |
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| 130 | | - tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DDR, mask, val); |
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| 131 | | - |
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| 132 | | - return 0; |
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| 72 | + spin_unlock_irqrestore(&gpio->gc.bgpio_lock, flags); |
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| 133 | 73 | } |
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| 134 | 74 | |
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| 135 | 75 | static int tb10x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
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| .. | .. |
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| 168 | 108 | static int tb10x_gpio_probe(struct platform_device *pdev) |
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| 169 | 109 | { |
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| 170 | 110 | struct tb10x_gpio *tb10x_gpio; |
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| 171 | | - struct resource *mem; |
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| 172 | | - struct device_node *dn = pdev->dev.of_node; |
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| 111 | + struct device *dev = &pdev->dev; |
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| 112 | + struct device_node *np = dev->of_node; |
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| 173 | 113 | int ret = -EBUSY; |
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| 174 | 114 | u32 ngpio; |
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| 175 | 115 | |
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| 176 | | - if (!dn) |
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| 116 | + if (!np) |
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| 177 | 117 | return -EINVAL; |
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| 178 | 118 | |
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| 179 | | - if (of_property_read_u32(dn, "abilis,ngpio", &ngpio)) |
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| 119 | + if (of_property_read_u32(np, "abilis,ngpio", &ngpio)) |
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| 180 | 120 | return -EINVAL; |
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| 181 | 121 | |
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| 182 | | - tb10x_gpio = devm_kzalloc(&pdev->dev, sizeof(*tb10x_gpio), GFP_KERNEL); |
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| 122 | + tb10x_gpio = devm_kzalloc(dev, sizeof(*tb10x_gpio), GFP_KERNEL); |
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| 183 | 123 | if (tb10x_gpio == NULL) |
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| 184 | 124 | return -ENOMEM; |
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| 185 | 125 | |
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| 186 | | - spin_lock_init(&tb10x_gpio->spinlock); |
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| 187 | | - |
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| 188 | | - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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| 189 | | - tb10x_gpio->base = devm_ioremap_resource(&pdev->dev, mem); |
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| 126 | + tb10x_gpio->base = devm_platform_ioremap_resource(pdev, 0); |
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| 190 | 127 | if (IS_ERR(tb10x_gpio->base)) |
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| 191 | 128 | return PTR_ERR(tb10x_gpio->base); |
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| 192 | 129 | |
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| 193 | | - tb10x_gpio->gc.label = |
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| 194 | | - devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOF", pdev->dev.of_node); |
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| 130 | + tb10x_gpio->gc.label = |
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| 131 | + devm_kasprintf(dev, GFP_KERNEL, "%pOF", pdev->dev.of_node); |
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| 195 | 132 | if (!tb10x_gpio->gc.label) |
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| 196 | 133 | return -ENOMEM; |
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| 197 | 134 | |
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| 198 | | - tb10x_gpio->gc.parent = &pdev->dev; |
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| 199 | | - tb10x_gpio->gc.owner = THIS_MODULE; |
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| 200 | | - tb10x_gpio->gc.direction_input = tb10x_gpio_direction_in; |
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| 201 | | - tb10x_gpio->gc.get = tb10x_gpio_get; |
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| 202 | | - tb10x_gpio->gc.direction_output = tb10x_gpio_direction_out; |
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| 203 | | - tb10x_gpio->gc.set = tb10x_gpio_set; |
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| 204 | | - tb10x_gpio->gc.request = gpiochip_generic_request; |
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| 205 | | - tb10x_gpio->gc.free = gpiochip_generic_free; |
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| 206 | | - tb10x_gpio->gc.base = -1; |
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| 207 | | - tb10x_gpio->gc.ngpio = ngpio; |
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| 208 | | - tb10x_gpio->gc.can_sleep = false; |
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| 135 | + /* |
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| 136 | + * Initialize generic GPIO with one single register for reading and setting |
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| 137 | + * the lines, no special set or clear registers and a data direction register |
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| 138 | + * wher 1 means "output". |
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| 139 | + */ |
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| 140 | + ret = bgpio_init(&tb10x_gpio->gc, dev, 4, |
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| 141 | + tb10x_gpio->base + OFFSET_TO_REG_DATA, |
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| 142 | + NULL, |
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| 143 | + NULL, |
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| 144 | + tb10x_gpio->base + OFFSET_TO_REG_DDR, |
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| 145 | + NULL, |
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| 146 | + 0); |
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| 147 | + if (ret) { |
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| 148 | + dev_err(dev, "unable to init generic GPIO\n"); |
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| 149 | + return ret; |
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| 150 | + } |
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| 151 | + tb10x_gpio->gc.base = -1; |
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| 152 | + tb10x_gpio->gc.parent = dev; |
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| 153 | + tb10x_gpio->gc.owner = THIS_MODULE; |
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| 154 | + /* |
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| 155 | + * ngpio is set by bgpio_init() but we override it, this .request() |
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| 156 | + * callback also overrides the one set up by generic GPIO. |
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| 157 | + */ |
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| 158 | + tb10x_gpio->gc.ngpio = ngpio; |
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| 159 | + tb10x_gpio->gc.request = gpiochip_generic_request; |
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| 160 | + tb10x_gpio->gc.free = gpiochip_generic_free; |
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| 209 | 161 | |
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| 210 | | - |
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| 211 | | - ret = devm_gpiochip_add_data(&pdev->dev, &tb10x_gpio->gc, tb10x_gpio); |
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| 162 | + ret = devm_gpiochip_add_data(dev, &tb10x_gpio->gc, tb10x_gpio); |
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| 212 | 163 | if (ret < 0) { |
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| 213 | | - dev_err(&pdev->dev, "Could not add gpiochip.\n"); |
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| 164 | + dev_err(dev, "Could not add gpiochip.\n"); |
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| 214 | 165 | return ret; |
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| 215 | 166 | } |
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| 216 | 167 | |
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| 217 | 168 | platform_set_drvdata(pdev, tb10x_gpio); |
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| 218 | 169 | |
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| 219 | | - if (of_find_property(dn, "interrupt-controller", NULL)) { |
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| 170 | + if (of_find_property(np, "interrupt-controller", NULL)) { |
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| 220 | 171 | struct irq_chip_generic *gc; |
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| 221 | 172 | |
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| 222 | 173 | ret = platform_get_irq(pdev, 0); |
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| 223 | | - if (ret < 0) { |
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| 224 | | - dev_err(&pdev->dev, "No interrupt specified.\n"); |
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| 174 | + if (ret < 0) |
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| 225 | 175 | return ret; |
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| 226 | | - } |
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| 227 | 176 | |
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| 228 | 177 | tb10x_gpio->gc.to_irq = tb10x_gpio_to_irq; |
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| 229 | 178 | tb10x_gpio->irq = ret; |
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| 230 | 179 | |
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| 231 | | - ret = devm_request_irq(&pdev->dev, ret, tb10x_gpio_irq_cascade, |
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| 180 | + ret = devm_request_irq(dev, ret, tb10x_gpio_irq_cascade, |
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| 232 | 181 | IRQF_TRIGGER_NONE | IRQF_SHARED, |
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| 233 | | - dev_name(&pdev->dev), tb10x_gpio); |
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| 182 | + dev_name(dev), tb10x_gpio); |
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| 234 | 183 | if (ret != 0) |
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| 235 | 184 | return ret; |
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| 236 | 185 | |
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| 237 | | - tb10x_gpio->domain = irq_domain_add_linear(dn, |
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| 186 | + tb10x_gpio->domain = irq_domain_add_linear(np, |
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| 238 | 187 | tb10x_gpio->gc.ngpio, |
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| 239 | 188 | &irq_generic_chip_ops, NULL); |
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| 240 | 189 | if (!tb10x_gpio->domain) { |
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| .. | .. |
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| 294 | 243 | module_platform_driver(tb10x_gpio_driver); |
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| 295 | 244 | MODULE_LICENSE("GPL"); |
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| 296 | 245 | MODULE_DESCRIPTION("tb10x gpio."); |
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| 297 | | -MODULE_VERSION("0.0.1"); |
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