mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/dma/xgene-dma.c
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@@ -1,22 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Applied Micro X-Gene SoC DMA engine Driver
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  *
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  * Copyright (c) 2015, Applied Micro Circuits Corporation
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  * Authors: Rameshwar Prasad Sahu <rsahu@apm.com>
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  *	    Loc Ho <lho@apm.com>
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  *
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  * NOTE: PM support is currently not available.
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  */
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@@ -299,6 +287,8 @@
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 /**
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  * struct xgene_dma - internal representation of an X-Gene DMA device
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+ * @dev: reference to this device's struct device
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+ * @clk: reference to this device's clock
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  * @err_irq: DMA error irq number
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  * @ring_num: start id number for DMA ring
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  * @csr_dma: base for DMA register access
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@@ -703,7 +693,7 @@
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 	INIT_LIST_HEAD(&ld_completed);
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-	spin_lock_bh(&chan->lock);
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+	spin_lock(&chan->lock);
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 	/* Clean already completed and acked descriptors */
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 	xgene_dma_clean_completed_descriptor(chan);
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@@ -772,7 +762,7 @@
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 	 */
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 	xgene_chan_xfer_ld_pending(chan);
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-	spin_unlock_bh(&chan->lock);
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+	spin_unlock(&chan->lock);
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 	/* Run the callback for each descriptor, in order */
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 	list_for_each_entry_safe(desc_sw, _desc_sw, &ld_completed, node) {
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@@ -797,7 +787,7 @@
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 		return -ENOMEM;
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 	}
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-	chan_dbg(chan, "Allocate descripto pool\n");
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+	chan_dbg(chan, "Allocate descriptor pool\n");
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 	return 1;
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 }
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@@ -985,9 +975,9 @@
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 	return dma_cookie_status(dchan, cookie, txstate);
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 }
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-static void xgene_dma_tasklet_cb(unsigned long data)
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+static void xgene_dma_tasklet_cb(struct tasklet_struct *t)
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 {
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-	struct xgene_dma_chan *chan = (struct xgene_dma_chan *)data;
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+	struct xgene_dma_chan *chan = from_tasklet(chan, t, tasklet);
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 	/* Run all cleanup for descriptors which have been completed */
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 	xgene_dma_cleanup_descriptors(chan);
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@@ -1208,8 +1198,8 @@
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 	ring->size = ret;
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 	/* Allocate memory for DMA ring descriptor */
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-	ring->desc_vaddr = dma_zalloc_coherent(chan->dev, ring->size,
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-					       &ring->desc_paddr, GFP_KERNEL);
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+	ring->desc_vaddr = dma_alloc_coherent(chan->dev, ring->size,
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+					      &ring->desc_paddr, GFP_KERNEL);
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 	if (!ring->desc_vaddr) {
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 		chan_err(chan, "Failed to allocate ring desc\n");
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 		return -ENOMEM;
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@@ -1549,8 +1539,7 @@
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 	INIT_LIST_HEAD(&chan->ld_pending);
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 	INIT_LIST_HEAD(&chan->ld_running);
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 	INIT_LIST_HEAD(&chan->ld_completed);
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-	tasklet_init(&chan->tasklet, xgene_dma_tasklet_cb,
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-		     (unsigned long)chan);
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+	tasklet_setup(&chan->tasklet, xgene_dma_tasklet_cb);
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 	chan->pending = 0;
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 	chan->desc_pool = NULL;
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@@ -1690,20 +1679,16 @@
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 	/* Get DMA error interrupt */
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 	irq = platform_get_irq(pdev, 0);
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-	if (irq <= 0) {
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-		dev_err(&pdev->dev, "Failed to get Error IRQ\n");
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+	if (irq <= 0)
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 		return -ENXIO;
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-	}
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 	pdma->err_irq = irq;
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 	/* Get DMA Rx ring descriptor interrupts for all DMA channels */
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 	for (i = 1; i <= XGENE_DMA_MAX_CHANNEL; i++) {
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 		irq = platform_get_irq(pdev, i);
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-		if (irq <= 0) {
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-			dev_err(&pdev->dev, "Failed to get Rx IRQ\n");
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+		if (irq <= 0)
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 			return -ENXIO;
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-		}
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 		pdma->chan[i - 1].rx_irq = irq;
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 	}