mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/clocksource/dw_apb_timer_of.c
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@@ -1,20 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (C) 2012 Altera Corporation
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  * Copyright (c) 2011 Picochip Ltd., Jamie Iles
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  *
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  * Modified from mach-picoxcell/time.c
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #include <linux/delay.h>
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 #include <linux/dw_apb_timer.h>
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@@ -22,6 +11,7 @@
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 #include <linux/of_address.h>
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 #include <linux/of_irq.h>
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 #include <linux/clk.h>
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+#include <linux/reset.h>
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 #include <linux/sched_clock.h>
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 static void __init timer_get_base_and_rate(struct device_node *np,
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@@ -29,11 +19,22 @@
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 {
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 	struct clk *timer_clk;
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 	struct clk *pclk;
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+	struct reset_control *rstc;
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 	*base = of_iomap(np, 0);
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 	if (!*base)
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-		panic("Unable to map regs for %s", np->name);
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+		panic("Unable to map regs for %pOFn", np);
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+
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+	/*
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+	 * Reset the timer if the reset control is available, wiping
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+	 * out the state the firmware may have left it
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+	 */
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+	rstc = of_reset_control_get(np, NULL);
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+	if (!IS_ERR(rstc)) {
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+		reset_control_assert(rstc);
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+		reset_control_deassert(rstc);
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+	}
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 	/*
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 	 * Not all implementations use a periphal clock, so don't panic
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@@ -42,8 +43,8 @@
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 	pclk = of_clk_get_by_name(np, "pclk");
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 	if (!IS_ERR(pclk))
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 		if (clk_prepare_enable(pclk))
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-			pr_warn("pclk for %s is present, but could not be activated\n",
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-				np->name);
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+			pr_warn("pclk for %pOFn is present, but could not be activated\n",
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+				np);
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 	timer_clk = of_clk_get_by_name(np, "timer");
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 	if (IS_ERR(timer_clk))
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@@ -57,7 +58,7 @@
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 try_clock_freq:
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 	if (of_property_read_u32(np, "clock-freq", rate) &&
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 	    of_property_read_u32(np, "clock-frequency", rate))
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-		panic("No clock nor clock-frequency property for %s", np->name);
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+		panic("No clock nor clock-frequency property for %pOFn", np);
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 }
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 static void __init add_clockevent(struct device_node *event_timer)
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@@ -72,7 +73,7 @@
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 	timer_get_base_and_rate(event_timer, &iobase, &rate);
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-	ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
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+	ced = dw_apb_clockevent_init(-1, event_timer->name, 300, iobase, irq,
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 				     rate);
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 	if (!ced)
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 		panic("Unable to initialise clockevent device");