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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/clk/zynq/pll.c
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@@ -1,22 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Zynq PLL driver
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  *
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  *  Copyright (C) 2013 Xilinx
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  *
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  *  Sören Brinkmann <soren.brinkmann@xilinx.com>
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- *
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- * This program is free software: you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License v2 as published by
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- * the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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- *
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  */
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 #include <linux/clk/zynq.h>
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 #include <linux/clk-provider.h>
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@@ -90,7 +78,7 @@
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 	 * makes probably sense to redundantly save fbdiv in the struct
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 	 * zynq_pll to save the IO access.
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 	 */
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-	fbdiv = (clk_readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >>
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+	fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >>
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 			PLLCTRL_FBDIV_SHIFT;
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 	return parent_rate * fbdiv;
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@@ -112,7 +100,7 @@
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 	spin_lock_irqsave(clk->lock, flags);
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-	reg = clk_readl(clk->pll_ctrl);
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+	reg = readl(clk->pll_ctrl);
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 	spin_unlock_irqrestore(clk->lock, flags);
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@@ -138,10 +126,10 @@
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 	/* Power up PLL and wait for lock */
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 	spin_lock_irqsave(clk->lock, flags);
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-	reg = clk_readl(clk->pll_ctrl);
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+	reg = readl(clk->pll_ctrl);
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 	reg &= ~(PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK);
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-	clk_writel(reg, clk->pll_ctrl);
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-	while (!(clk_readl(clk->pll_status) & (1 << clk->lockbit)))
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+	writel(reg, clk->pll_ctrl);
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+	while (!(readl(clk->pll_status) & (1 << clk->lockbit)))
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 		;
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 	spin_unlock_irqrestore(clk->lock, flags);
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@@ -168,9 +156,9 @@
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 	/* shut down PLL */
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 	spin_lock_irqsave(clk->lock, flags);
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-	reg = clk_readl(clk->pll_ctrl);
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+	reg = readl(clk->pll_ctrl);
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 	reg |= PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK;
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-	clk_writel(reg, clk->pll_ctrl);
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+	writel(reg, clk->pll_ctrl);
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 	spin_unlock_irqrestore(clk->lock, flags);
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 }
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@@ -223,9 +211,9 @@
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 	spin_lock_irqsave(pll->lock, flags);
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-	reg = clk_readl(pll->pll_ctrl);
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+	reg = readl(pll->pll_ctrl);
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 	reg &= ~PLLCTRL_BPQUAL_MASK;
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-	clk_writel(reg, pll->pll_ctrl);
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+	writel(reg, pll->pll_ctrl);
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 	spin_unlock_irqrestore(pll->lock, flags);
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