forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376 
 kernel/drivers/clk/ti/clkctrl.c
....@@ -24,7 +24,7 @@
2424 #include <linux/timekeeping.h>
2525 #include "clock.h"
2626 
27
-#define NO_IDLEST			0x1
27
+#define NO_IDLEST			0
2828 
2929 #define OMAP4_MODULEMODE_MASK		0x3
3030 
....@@ -33,6 +33,9 @@
3333 
3434 #define OMAP4_IDLEST_MASK		(0x3 << 16)
3535 #define OMAP4_IDLEST_SHIFT		16
36
+
37
+#define OMAP4_STBYST_MASK		BIT(18)
38
+#define OMAP4_STBYST_SHIFT		18
3639 
3740 #define CLKCTRL_IDLEST_FUNCTIONAL	0x0
3841 #define CLKCTRL_IDLEST_INTERFACE_IDLE	0x2
....@@ -159,7 +162,7 @@
159162 
160163 	ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);
161164 
162
-	if (clk->flags & NO_IDLEST)
165
+	if (test_bit(NO_IDLEST, &clk->flags))
163166 		return 0;
164167 
165168 	/* Wait until module is enabled */
....@@ -188,7 +191,7 @@
188191 
189192 	ti_clk_ll_ops->clk_writel(val, &clk->enable_reg);
190193 
191
-	if (clk->flags & NO_IDLEST)
194
+	if (test_bit(NO_IDLEST, &clk->flags))
192195 		goto exit;
193196 
194197 	/* Wait until module is disabled */
....@@ -252,19 +255,53 @@
252255 	return entry->clk;
253256 }
254257 
258
+/* Get clkctrl clock base name based on clkctrl_name or dts node */
259
+static const char * __init clkctrl_get_clock_name(struct device_node *np,
260
+						  const char *clkctrl_name,
261
+						  int offset, int index,
262
+						  bool legacy_naming)
263
+{
264
+	char *clock_name;
265
+
266
+	/* l4per-clkctrl:1234:0 style naming based on clkctrl_name */
267
+	if (clkctrl_name && !legacy_naming) {
268
+		clock_name = kasprintf(GFP_KERNEL, "%s-clkctrl:%04x:%d",
269
+				       clkctrl_name, offset, index);
270
+		strreplace(clock_name, '_', '-');
271
+
272
+		return clock_name;
273
+	}
274
+
275
+	/* l4per:1234:0 old style naming based on clkctrl_name */
276
+	if (clkctrl_name)
277
+		return kasprintf(GFP_KERNEL, "%s_cm:clk:%04x:%d",
278
+				 clkctrl_name, offset, index);
279
+
280
+	/* l4per_cm:1234:0 old style naming based on parent node name */
281
+	if (legacy_naming)
282
+		return kasprintf(GFP_KERNEL, "%pOFn:clk:%04x:%d",
283
+				 np->parent, offset, index);
284
+
285
+	/* l4per-clkctrl:1234:0 style naming based on node name */
286
+	return kasprintf(GFP_KERNEL, "%pOFn:%04x:%d", np, offset, index);
287
+}
288
+
255289 static int __init
256290 _ti_clkctrl_clk_register(struct omap_clkctrl_provider *provider,
257291 			 struct device_node *node, struct clk_hw *clk_hw,
258292 			 u16 offset, u8 bit, const char * const *parents,
259
-			 int num_parents, const struct clk_ops *ops)
293
+			 int num_parents, const struct clk_ops *ops,
294
+			 const char *clkctrl_name)
260295 {
261296 	struct clk_init_data init = { NULL };
262297 	struct clk *clk;
263298 	struct omap_clkctrl_clk *clkctrl_clk;
264299 	int ret = 0;
265300 
266
-	init.name = kasprintf(GFP_KERNEL, "%s:%s:%04x:%d", node->parent->name,
267
-			      node->name, offset, bit);
301
+	init.name = clkctrl_get_clock_name(node, clkctrl_name, offset, bit,
302
+					   ti_clk_get_features()->flags &
303
+					   TI_CLK_CLKCTRL_COMPAT);
304
+
268305 	clkctrl_clk = kzalloc(sizeof(*clkctrl_clk), GFP_KERNEL);
269306 	if (!init.name || !clkctrl_clk) {
270307 		ret = -ENOMEM;
....@@ -275,7 +312,7 @@
275312 	init.parent_names = parents;
276313 	init.num_parents = num_parents;
277314 	init.ops = ops;
278
-	init.flags = CLK_IS_BASIC;
315
+	init.flags = 0;
279316 
280317 	clk = ti_clk_register(NULL, clk_hw, init.name);
281318 	if (IS_ERR_OR_NULL(clk)) {
....@@ -301,7 +338,7 @@
301338 _ti_clkctrl_setup_gate(struct omap_clkctrl_provider *provider,
302339 		       struct device_node *node, u16 offset,
303340 		       const struct omap_clkctrl_bit_data *data,
304
-		       void __iomem *reg)
341
+		       void __iomem *reg, const char *clkctrl_name)
305342 {
306343 	struct clk_hw_omap *clk_hw;
307344 
....@@ -314,7 +351,7 @@
314351 
315352 	if (_ti_clkctrl_clk_register(provider, node, &clk_hw->hw, offset,
316353 				     data->bit, data->parents, 1,
317
-				     &omap_gate_clk_ops))
354
+				     &omap_gate_clk_ops, clkctrl_name))
318355 		kfree(clk_hw);
319356 }
320357 
....@@ -322,7 +359,7 @@
322359 _ti_clkctrl_setup_mux(struct omap_clkctrl_provider *provider,
323360 		      struct device_node *node, u16 offset,
324361 		      const struct omap_clkctrl_bit_data *data,
325
-		      void __iomem *reg)
362
+		      void __iomem *reg, const char *clkctrl_name)
326363 {
327364 	struct clk_omap_mux *mux;
328365 	int num_parents = 0;
....@@ -349,7 +386,7 @@
349386 
350387 	if (_ti_clkctrl_clk_register(provider, node, &mux->hw, offset,
351388 				     data->bit, data->parents, num_parents,
352
-				     &ti_clk_mux_ops))
389
+				     &ti_clk_mux_ops, clkctrl_name))
353390 		kfree(mux);
354391 }
355392 
....@@ -357,7 +394,7 @@
357394 _ti_clkctrl_setup_div(struct omap_clkctrl_provider *provider,
358395 		      struct device_node *node, u16 offset,
359396 		      const struct omap_clkctrl_bit_data *data,
360
-		      void __iomem *reg)
397
+		      void __iomem *reg, const char *clkctrl_name)
361398 {
362399 	struct clk_omap_divider *div;
363400 	const struct omap_clkctrl_div_data *div_data = data->data;
....@@ -376,7 +413,7 @@
376413 
377414 	if (ti_clk_parse_divider_data((int *)div_data->dividers, 0,
378415 				      div_data->max_div, div_flags,
379
-				      &div->width, &div->table)) {
416
+				      div)) {
380417 		pr_err("%s: Data parsing for %pOF:%04x:%d failed\n", __func__,
381418 		       node, offset, data->bit);
382419 		kfree(div);
....@@ -385,7 +422,7 @@
385422 
386423 	if (_ti_clkctrl_clk_register(provider, node, &div->hw, offset,
387424 				     data->bit, data->parents, 1,
388
-				     &ti_clk_divider_ops))
425
+				     &ti_clk_divider_ops, clkctrl_name))
389426 		kfree(div);
390427 }
391428 
....@@ -393,7 +430,7 @@
393430 _ti_clkctrl_setup_subclks(struct omap_clkctrl_provider *provider,
394431 			  struct device_node *node,
395432 			  const struct omap_clkctrl_reg_data *data,
396
-			  void __iomem *reg)
433
+			  void __iomem *reg, const char *clkctrl_name)
397434 {
398435 	const struct omap_clkctrl_bit_data *bits = data->bit_data;
399436 
....@@ -404,17 +441,17 @@
404441 		switch (bits->type) {
405442 		case TI_CLK_GATE:
406443 			_ti_clkctrl_setup_gate(provider, node, data->offset,
407
-					       bits, reg);
444
+					       bits, reg, clkctrl_name);
408445 			break;
409446 
410447 		case TI_CLK_DIVIDER:
411448 			_ti_clkctrl_setup_div(provider, node, data->offset,
412
-					      bits, reg);
449
+					      bits, reg, clkctrl_name);
413450 			break;
414451 
415452 		case TI_CLK_MUX:
416453 			_ti_clkctrl_setup_mux(provider, node, data->offset,
417
-					      bits, reg);
454
+					      bits, reg, clkctrl_name);
418455 			break;
419456 
420457 		default:
....@@ -432,6 +469,31 @@
432469 	of_clk_add_hw_provider(np, _ti_omap4_clkctrl_xlate, data);
433470 }
434471 
472
+/* Get clock name based on compatible string for clkctrl */
473
+static char * __init clkctrl_get_name(struct device_node *np)
474
+{
475
+	struct property *prop;
476
+	const int prefix_len = 11;
477
+	const char *compat;
478
+	char *name;
479
+
480
+	of_property_for_each_string(np, "compatible", prop, compat) {
481
+		if (!strncmp("ti,clkctrl-", compat, prefix_len)) {
482
+			/* Two letter minimum name length for l3, l4 etc */
483
+			if (strnlen(compat + prefix_len, 16) < 2)
484
+				continue;
485
+			name = kasprintf(GFP_KERNEL, "%s", compat + prefix_len);
486
+			if (!name)
487
+				continue;
488
+			strreplace(name, '-', '_');
489
+
490
+			return name;
491
+		}
492
+	}
493
+
494
+	return NULL;
495
+}
496
+
435497 static void __init _ti_omap4_clkctrl_setup(struct device_node *node)
436498 {
437499 	struct omap_clkctrl_provider *provider;
....@@ -440,10 +502,18 @@
440502 	struct clk_init_data init = { NULL };
441503 	struct clk_hw_omap *hw;
442504 	struct clk *clk;
443
-	struct omap_clkctrl_clk *clkctrl_clk;
505
+	struct omap_clkctrl_clk *clkctrl_clk = NULL;
444506 	const __be32 *addrp;
507
+	bool legacy_naming;
508
+	char *clkctrl_name;
445509 	u32 addr;
446510 	int ret;
511
+	char *c;
512
+	u16 soc_mask = 0;
513
+
514
+	if (!(ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT) &&
515
+	    of_node_name_eq(node, "clk"))
516
+		ti_clk_features.flags |= TI_CLK_CLKCTRL_COMPAT;
447517 
448518 	addrp = of_get_address(node, 0, NULL, NULL);
449519 	addr = (u32)of_translate_address(node, addrp);
....@@ -457,18 +527,42 @@
457527 		data = omap5_clkctrl_data;
458528 #endif
459529 #ifdef CONFIG_SOC_DRA7XX
460
-	if (of_machine_is_compatible("ti,dra7"))
461
-		data = dra7_clkctrl_data;
530
+	if (of_machine_is_compatible("ti,dra7")) {
531
+		if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
532
+			data = dra7_clkctrl_compat_data;
533
+		else
534
+			data = dra7_clkctrl_data;
535
+	}
536
+
537
+	if (of_machine_is_compatible("ti,dra72"))
538
+		soc_mask = CLKF_SOC_DRA72;
539
+	if (of_machine_is_compatible("ti,dra74"))
540
+		soc_mask = CLKF_SOC_DRA74;
541
+	if (of_machine_is_compatible("ti,dra76"))
542
+		soc_mask = CLKF_SOC_DRA76;
462543 #endif
463544 #ifdef CONFIG_SOC_AM33XX
464
-	if (of_machine_is_compatible("ti,am33xx"))
465
-		data = am3_clkctrl_data;
545
+	if (of_machine_is_compatible("ti,am33xx")) {
546
+		if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
547
+			data = am3_clkctrl_compat_data;
548
+		else
549
+			data = am3_clkctrl_data;
550
+	}
466551 #endif
467552 #ifdef CONFIG_SOC_AM43XX
468
-	if (of_machine_is_compatible("ti,am4372"))
469
-		data = am4_clkctrl_data;
470
-	if (of_machine_is_compatible("ti,am438x"))
471
-		data = am438x_clkctrl_data;
553
+	if (of_machine_is_compatible("ti,am4372")) {
554
+		if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
555
+			data = am4_clkctrl_compat_data;
556
+		else
557
+			data = am4_clkctrl_data;
558
+	}
559
+
560
+	if (of_machine_is_compatible("ti,am438x")) {
561
+		if (ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT)
562
+			data = am438x_clkctrl_compat_data;
563
+		else
564
+			data = am438x_clkctrl_data;
565
+	}
472566 #endif
473567 #ifdef CONFIG_SOC_TI81XX
474568 	if (of_machine_is_compatible("ti,dm814"))
....@@ -477,6 +571,9 @@
477571 	if (of_machine_is_compatible("ti,dm816"))
478572 		data = dm816_clkctrl_data;
479573 #endif
574
+
575
+	if (ti_clk_get_features()->flags & TI_CLK_DEVICE_TYPE_GP)
576
+		soc_mask |= CLKF_SOC_NONSEC;
480577 
481578 	while (data->addr) {
482579 		if (addr == data->addr)
....@@ -496,27 +593,67 @@
496593 
497594 	provider->base = of_iomap(node, 0);
498595 
499
-	provider->clkdm_name = kmalloc(strlen(node->parent->name) + 3,
500
-				       GFP_KERNEL);
501
-	if (!provider->clkdm_name) {
502
-		kfree(provider);
503
-		return;
596
+	legacy_naming = ti_clk_get_features()->flags & TI_CLK_CLKCTRL_COMPAT;
597
+	clkctrl_name = clkctrl_get_name(node);
598
+	if (clkctrl_name) {
599
+		provider->clkdm_name = kasprintf(GFP_KERNEL,
600
+						 "%s_clkdm", clkctrl_name);
601
+		goto clkdm_found;
504602 	}
505603 
506604 	/*
507
-	 * Create default clkdm name, replace _cm from end of parent node
508
-	 * name with _clkdm
605
+	 * The code below can be removed when all clkctrl nodes use domain
606
+	 * specific compatible proprerty and standard clock node naming
509607 	 */
510
-	strcpy(provider->clkdm_name, node->parent->name);
511
-	provider->clkdm_name[strlen(provider->clkdm_name) - 2] = 0;
608
+	if (legacy_naming) {
609
+		provider->clkdm_name = kasprintf(GFP_KERNEL, "%pOFnxxx", node->parent);
610
+		if (!provider->clkdm_name) {
611
+			kfree(provider);
612
+			return;
613
+		}
614
+
615
+		/*
616
+		 * Create default clkdm name, replace _cm from end of parent
617
+		 * node name with _clkdm
618
+		 */
619
+		provider->clkdm_name[strlen(provider->clkdm_name) - 2] = 0;
620
+	} else {
621
+		provider->clkdm_name = kasprintf(GFP_KERNEL, "%pOFn", node);
622
+		if (!provider->clkdm_name) {
623
+			kfree(provider);
624
+			return;
625
+		}
626
+
627
+		/*
628
+		 * Create default clkdm name, replace _clkctrl from end of
629
+		 * node name with _clkdm
630
+		 */
631
+		provider->clkdm_name[strlen(provider->clkdm_name) - 7] = 0;
632
+	}
633
+
512634 	strcat(provider->clkdm_name, "clkdm");
513635 
636
+	/* Replace any dash from the clkdm name with underscore */
637
+	c = provider->clkdm_name;
638
+
639
+	while (*c) {
640
+		if (*c == '-')
641
+			*c = '_';
642
+		c++;
643
+	}
644
+clkdm_found:
514645 	INIT_LIST_HEAD(&provider->clocks);
515646 
516647 	/* Generate clocks */
517648 	reg_data = data->regs;
518649 
519650 	while (reg_data->parent) {
651
+		if ((reg_data->flags & CLKF_SOC_MASK) &&
652
+		    (reg_data->flags & soc_mask) == 0) {
653
+			reg_data++;
654
+			continue;
655
+		}
656
+
520657 		hw = kzalloc(sizeof(*hw), GFP_KERNEL);
521658 		if (!hw)
522659 			return;
....@@ -524,14 +661,14 @@
524661 		hw->enable_reg.ptr = provider->base + reg_data->offset;
525662 
526663 		_ti_clkctrl_setup_subclks(provider, node, reg_data,
527
-					  hw->enable_reg.ptr);
664
+					  hw->enable_reg.ptr, clkctrl_name);
528665 
529666 		if (reg_data->flags & CLKF_SW_SUP)
530667 			hw->enable_bit = MODULEMODE_SWCTRL;
531668 		if (reg_data->flags & CLKF_HW_SUP)
532669 			hw->enable_bit = MODULEMODE_HWCTRL;
533670 		if (reg_data->flags & CLKF_NO_IDLEST)
534
-			hw->flags |= NO_IDLEST;
671
+			set_bit(NO_IDLEST, &hw->flags);
535672 
536673 		if (reg_data->clkdm_name)
537674 			hw->clkdm_name = reg_data->clkdm_name;
....@@ -543,17 +680,21 @@
543680 		init.flags = 0;
544681 		if (reg_data->flags & CLKF_SET_RATE_PARENT)
545682 			init.flags |= CLK_SET_RATE_PARENT;
546
-		init.name = kasprintf(GFP_KERNEL, "%s:%s:%04x:%d",
547
-				      node->parent->name, node->name,
548
-				      reg_data->offset, 0);
683
+
684
+		init.name = clkctrl_get_clock_name(node, clkctrl_name,
685
+						   reg_data->offset, 0,
686
+						   legacy_naming);
687
+		if (!init.name)
688
+			goto cleanup;
689
+
549690 		clkctrl_clk = kzalloc(sizeof(*clkctrl_clk), GFP_KERNEL);
550
-		if (!init.name || !clkctrl_clk)
691
+		if (!clkctrl_clk)
551692 			goto cleanup;
552693 
553694 		init.ops = &omap4_clkctrl_clk_ops;
554695 		hw->hw.init = &init;
555696 
556
-		clk = ti_clk_register(NULL, &hw->hw, init.name);
697
+		clk = ti_clk_register_omap_hw(NULL, &hw->hw, init.name);
557698 		if (IS_ERR_OR_NULL(clk))
558699 			goto cleanup;
559700 
....@@ -569,12 +710,45 @@
569710 	if (ret == -EPROBE_DEFER)
570711 		ti_clk_retry_init(node, provider, _clkctrl_add_provider);
571712 
713
+	kfree(clkctrl_name);
714
+
572715 	return;
573716 
574717 cleanup:
575718 	kfree(hw);
576719 	kfree(init.name);
720
+	kfree(clkctrl_name);
577721 	kfree(clkctrl_clk);
578722 }
579723 CLK_OF_DECLARE(ti_omap4_clkctrl_clock, "ti,clkctrl",
580724 	       _ti_omap4_clkctrl_setup);
725
+
726
+/**
727
+ * ti_clk_is_in_standby - Check if clkctrl clock is in standby or not
728
+ * @clk: clock to check standby status for
729
+ *
730
+ * Finds whether the provided clock is in standby mode or not. Returns
731
+ * true if the provided clock is a clkctrl type clock and it is in standby,
732
+ * false otherwise.
733
+ */
734
+bool ti_clk_is_in_standby(struct clk *clk)
735
+{
736
+	struct clk_hw *hw;
737
+	struct clk_hw_omap *hwclk;
738
+	u32 val;
739
+
740
+	hw = __clk_get_hw(clk);
741
+
742
+	if (!omap2_clk_is_hw_omap(hw))
743
+		return false;
744
+
745
+	hwclk = to_clk_hw_omap(hw);
746
+
747
+	val = ti_clk_ll_ops->clk_readl(&hwclk->enable_reg);
748
+
749
+	if (val & OMAP4_STBYST_MASK)
750
+		return true;
751
+
752
+	return false;
753
+}
754
+EXPORT_SYMBOL_GPL(ti_clk_is_in_standby);