mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/drivers/clk/ti/clk-44xx.c
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@@ -1,13 +1,10 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * OMAP4 Clock init
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  *
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  * Copyright (C) 2013 Texas Instruments, Inc.
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  *
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  * Tero Kristo (t-kristo@ti.com)
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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 #include <linux/kernel.h>
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@@ -40,7 +37,7 @@
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 };
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 static const struct omap_clkctrl_reg_data omap4_tesla_clkctrl_regs[] __initconst = {
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-	{ OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_m4x2_ck" },
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+	{ OMAP4_DSP_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_m4x2_ck" },
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 	{ 0 },
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 };
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@@ -222,7 +219,7 @@
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 };
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 static const struct omap_clkctrl_reg_data omap4_ducati_clkctrl_regs[] __initconst = {
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-	{ OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP, "ducati_clk_mux_ck" },
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+	{ OMAP4_IPU_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "ducati_clk_mux_ck" },
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 	{ 0 },
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 };
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@@ -607,6 +604,18 @@
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 	{ 0 },
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 };
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+static const struct
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+omap_clkctrl_reg_data omap4_l4_secure_clkctrl_regs[] __initconst = {
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+	{ OMAP4_AES1_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" },
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+	{ OMAP4_AES2_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" },
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+	{ OMAP4_DES3DES_CLKCTRL, NULL, CLKF_SW_SUP, "l4_div_ck" },
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+	{ OMAP4_PKA_CLKCTRL, NULL, CLKF_SW_SUP, "l4_div_ck" },
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+	{ OMAP4_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l4_div_ck" },
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+	{ OMAP4_SHA2MD5_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" },
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+	{ OMAP4_CRYPTODMA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l3_div_ck" },
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+	{ 0 },
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+};
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+
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 static const struct omap_clkctrl_bit_data omap4_gpio1_bit_data[] __initconst = {
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 	{ 8, TI_CLK_GATE, omap4_gpio2_dbclk_parents, NULL },
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 	{ 0 },
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@@ -694,6 +703,7 @@
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 	{ 0x4a009220, omap4_l3_gfx_clkctrl_regs },
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 	{ 0x4a009320, omap4_l3_init_clkctrl_regs },
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 	{ 0x4a009420, omap4_l4_per_clkctrl_regs },
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+	{ 0x4a0095a0, omap4_l4_secure_clkctrl_regs },
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 	{ 0x4a307820, omap4_l4_wkup_clkctrl_regs },
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 	{ 0x4a307a20, omap4_emu_sys_clkctrl_regs },
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 	{ 0 },