| .. | .. |
|---|
| 20 | 20 | Low level power management driver for CCI400 cache coherent |
|---|
| 21 | 21 | interconnect for ARM platforms. |
|---|
| 22 | 22 | |
|---|
| 23 | +config ARM_INTEGRATOR_LM |
|---|
| 24 | + bool "ARM Integrator Logic Module bus" |
|---|
| 25 | + depends on HAS_IOMEM |
|---|
| 26 | + depends on ARCH_INTEGRATOR || COMPILE_TEST |
|---|
| 27 | + default ARCH_INTEGRATOR |
|---|
| 28 | + help |
|---|
| 29 | + Say y here to enable support for the ARM Logic Module bus |
|---|
| 30 | + found on the ARM Integrator AP (Application Platform) |
|---|
| 31 | + |
|---|
| 23 | 32 | config BRCMSTB_GISB_ARB |
|---|
| 24 | 33 | bool "Broadcom STB GISB bus arbiter" |
|---|
| 25 | 34 | depends on ARM || ARM64 || MIPS |
|---|
| .. | .. |
|---|
| 29 | 38 | arbiter. This driver provides timeout and target abort error handling |
|---|
| 30 | 39 | and internal bus master decoding. |
|---|
| 31 | 40 | |
|---|
| 41 | +config BT1_APB |
|---|
| 42 | + bool "Baikal-T1 APB-bus driver" |
|---|
| 43 | + depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
|---|
| 44 | + select REGMAP_MMIO |
|---|
| 45 | + help |
|---|
| 46 | + Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. |
|---|
| 47 | + IO requests are routed to this bus by means of the DW AMBA 3 AXI |
|---|
| 48 | + Interconnect. In case of any APB protocol collisions, slave device |
|---|
| 49 | + not responding on timeout an IRQ is raised with an erroneous address |
|---|
| 50 | + reported to the APB terminator (APB Errors Handler Block). This |
|---|
| 51 | + driver provides the interrupt handler to detect the erroneous |
|---|
| 52 | + address, prints an error message about the address fault, updates an |
|---|
| 53 | + errors counter. The counter and the APB-bus operations timeout can be |
|---|
| 54 | + accessed via corresponding sysfs nodes. |
|---|
| 55 | + |
|---|
| 56 | +config BT1_AXI |
|---|
| 57 | + bool "Baikal-T1 AXI-bus driver" |
|---|
| 58 | + depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
|---|
| 59 | + select MFD_SYSCON |
|---|
| 60 | + help |
|---|
| 61 | + AXI3-bus is the main communication bus connecting all high-speed |
|---|
| 62 | + peripheral IP-cores with RAM controller and with MIPS P5600 cores on |
|---|
| 63 | + Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI |
|---|
| 64 | + Interconnect (so called AXI Main Interconnect) routing IO requests |
|---|
| 65 | + from one SoC block to another. This driver provides a way to detect |
|---|
| 66 | + any bus protocol errors and device not responding situations by |
|---|
| 67 | + means of an embedded on top of the interconnect errors handler |
|---|
| 68 | + block (EHB). AXI Interconnect QoS arbitration tuning is currently |
|---|
| 69 | + unsupported. |
|---|
| 70 | + |
|---|
| 71 | +config MOXTET |
|---|
| 72 | + tristate "CZ.NIC Turris Mox module configuration bus" |
|---|
| 73 | + depends on SPI_MASTER && OF |
|---|
| 74 | + help |
|---|
| 75 | + Say yes here to add support for the module configuration bus found |
|---|
| 76 | + on CZ.NIC's Turris Mox. This is needed for the ability to discover |
|---|
| 77 | + the order in which the modules are connected and to get/set some of |
|---|
| 78 | + their settings. For example the GPIOs on Mox SFP module are |
|---|
| 79 | + configured through this bus. |
|---|
| 80 | + |
|---|
| 32 | 81 | config HISILICON_LPC |
|---|
| 33 | 82 | bool "Support for ISA I/O space on HiSilicon Hip06/7" |
|---|
| 34 | | - depends on ARM64 && (ARCH_HISI || COMPILE_TEST) |
|---|
| 35 | | - select INDIRECT_PIO |
|---|
| 83 | + depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X) |
|---|
| 84 | + depends on HAS_IOMEM |
|---|
| 85 | + select INDIRECT_PIO if ARM64 |
|---|
| 36 | 86 | help |
|---|
| 37 | 87 | Driver to enable I/O access to devices attached to the Low Pin |
|---|
| 38 | 88 | Count bus on the HiSilicon Hip06/7 SoC. |
|---|
| .. | .. |
|---|
| 47 | 97 | |
|---|
| 48 | 98 | config MIPS_CDMM |
|---|
| 49 | 99 | bool "MIPS Common Device Memory Map (CDMM) Driver" |
|---|
| 50 | | - depends on CPU_MIPSR2 |
|---|
| 100 | + depends on CPU_MIPSR2 || CPU_MIPSR5 |
|---|
| 51 | 101 | help |
|---|
| 52 | 102 | Driver needed for the MIPS Common Device Memory Map bus in MIPS |
|---|
| 53 | 103 | cores. This bus is for per-CPU tightly coupled devices such as the |
|---|
| .. | .. |
|---|
| 128 | 178 | tristate "Tegra ACONNECT Bus Driver" |
|---|
| 129 | 179 | depends on ARCH_TEGRA_210_SOC |
|---|
| 130 | 180 | depends on OF && PM |
|---|
| 131 | | - select PM_CLK |
|---|
| 132 | 181 | help |
|---|
| 133 | 182 | Driver for the Tegra ACONNECT bus which is used to interface with |
|---|
| 134 | 183 | the devices inside the Audio Processing Engine (APE) for Tegra210. |
|---|
| .. | .. |
|---|
| 139 | 188 | help |
|---|
| 140 | 189 | Driver for the Tegra Generic Memory Interface bus which can be used |
|---|
| 141 | 190 | to attach devices such as NOR, UART, FPGA and more. |
|---|
| 191 | + |
|---|
| 192 | +config TI_PWMSS |
|---|
| 193 | + bool |
|---|
| 194 | + default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) |
|---|
| 195 | + help |
|---|
| 196 | + PWM Subsystem driver support for AM33xx SOC. |
|---|
| 197 | + |
|---|
| 198 | + PWM submodules require PWM config space access from submodule |
|---|
| 199 | + drivers and require common parent driver support. |
|---|
| 142 | 200 | |
|---|
| 143 | 201 | config TI_SYSC |
|---|
| 144 | 202 | bool "TI sysc interconnect target module driver" |
|---|
| .. | .. |
|---|
| 164 | 222 | needed to use on-board devices connected to UniPhier SoCs. |
|---|
| 165 | 223 | |
|---|
| 166 | 224 | config VEXPRESS_CONFIG |
|---|
| 167 | | - bool "Versatile Express configuration bus" |
|---|
| 225 | + tristate "Versatile Express configuration bus" |
|---|
| 168 | 226 | default y if ARCH_VEXPRESS |
|---|
| 169 | 227 | depends on ARM || ARM64 |
|---|
| 170 | 228 | depends on OF |
|---|
| .. | .. |
|---|
| 182 | 240 | peripherals. |
|---|
| 183 | 241 | |
|---|
| 184 | 242 | source "drivers/bus/fsl-mc/Kconfig" |
|---|
| 243 | +source "drivers/bus/mhi/Kconfig" |
|---|
| 185 | 244 | |
|---|
| 186 | 245 | endmenu |
|---|