| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * libahci.c - Common AHCI SATA low-level routines |
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| 3 | 4 | * |
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| .. | .. |
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| 7 | 8 | * |
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| 8 | 9 | * Copyright 2004-2005 Red Hat, Inc. |
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| 9 | 10 | * |
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| 10 | | - * |
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| 11 | | - * This program is free software; you can redistribute it and/or modify |
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| 12 | | - * it under the terms of the GNU General Public License as published by |
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| 13 | | - * the Free Software Foundation; either version 2, or (at your option) |
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| 14 | | - * any later version. |
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| 15 | | - * |
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| 16 | | - * This program is distributed in the hope that it will be useful, |
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| 17 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 18 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 19 | | - * GNU General Public License for more details. |
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| 20 | | - * |
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| 21 | | - * You should have received a copy of the GNU General Public License |
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| 22 | | - * along with this program; see the file COPYING. If not, write to |
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| 23 | | - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 24 | | - * |
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| 25 | | - * |
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| 26 | 11 | * libata documentation is available via 'make {ps|pdf}docs', |
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| 27 | 12 | * as Documentation/driver-api/libata.rst |
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| 28 | 13 | * |
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| 29 | 14 | * AHCI hardware documentation: |
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| 30 | 15 | * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf |
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| 31 | 16 | * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf |
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| 32 | | - * |
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| 33 | 17 | */ |
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| 34 | 18 | |
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| 35 | 19 | #include <linux/kernel.h> |
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| .. | .. |
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| 507 | 491 | if (!(cap & HOST_CAP_ALPM) && (hpriv->flags & AHCI_HFLAG_YES_ALPM)) { |
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| 508 | 492 | dev_info(dev, "controller can do ALPM, turning on CAP_ALPM\n"); |
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| 509 | 493 | cap |= HOST_CAP_ALPM; |
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| 494 | + } |
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| 495 | + |
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| 496 | + if ((cap & HOST_CAP_SXS) && (hpriv->flags & AHCI_HFLAG_NO_SXS)) { |
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| 497 | + dev_info(dev, "controller does not support SXS, disabling CAP_SXS\n"); |
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| 498 | + cap &= ~HOST_CAP_SXS; |
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| 510 | 499 | } |
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| 511 | 500 | |
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| 512 | 501 | if (hpriv->force_port_map && port_map != hpriv->force_port_map) { |
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| .. | .. |
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| 1465 | 1454 | *class = ahci_dev_classify(ap); |
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| 1466 | 1455 | |
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| 1467 | 1456 | /* re-enable FBS if disabled before */ |
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| 1468 | | - if (fbs_disabled) |
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| 1457 | + if (fbs_disabled || (!ata_is_host_link(link) && pp->fbs_supported)) |
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| 1469 | 1458 | ahci_enable_fbs(ap); |
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| 1470 | 1459 | |
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| 1471 | 1460 | DPRINTK("EXIT, class=%u\n", *class); |
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| .. | .. |
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| 2382 | 2371 | mem = dmam_alloc_coherent(dev, dma_sz, &mem_dma, GFP_KERNEL); |
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| 2383 | 2372 | if (!mem) |
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| 2384 | 2373 | return -ENOMEM; |
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| 2385 | | - memset(mem, 0, dma_sz); |
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| 2386 | 2374 | |
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| 2387 | 2375 | /* |
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| 2388 | 2376 | * First item in chunk of DMA memory: 32-slot command table, |
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| .. | .. |
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| 2600 | 2588 | int rc; |
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| 2601 | 2589 | |
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| 2602 | 2590 | if (hpriv->flags & AHCI_HFLAG_MULTI_MSI) { |
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| 2603 | | - if (hpriv->irq_handler) |
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| 2591 | + if (hpriv->irq_handler && |
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| 2592 | + hpriv->irq_handler != ahci_single_level_irq_intr) |
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| 2604 | 2593 | dev_warn(host->dev, |
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| 2605 | 2594 | "both AHCI_HFLAG_MULTI_MSI flag set and custom irq handler implemented\n"); |
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| 2606 | 2595 | if (!hpriv->get_irq_vector) { |
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