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| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 1 | 2 | /* |
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| 2 | 3 | * ahci.h - Common AHCI SATA definitions and declarations |
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| 3 | 4 | * |
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| .. | .. |
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| 7 | 8 | * |
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| 8 | 9 | * Copyright 2004-2005 Red Hat, Inc. |
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| 9 | 10 | * |
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| 10 | | - * |
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| 11 | | - * This program is free software; you can redistribute it and/or modify |
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| 12 | | - * it under the terms of the GNU General Public License as published by |
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| 13 | | - * the Free Software Foundation; either version 2, or (at your option) |
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| 14 | | - * any later version. |
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| 15 | | - * |
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| 16 | | - * This program is distributed in the hope that it will be useful, |
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| 17 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 18 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 19 | | - * GNU General Public License for more details. |
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| 20 | | - * |
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| 21 | | - * You should have received a copy of the GNU General Public License |
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| 22 | | - * along with this program; see the file COPYING. If not, write to |
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| 23 | | - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
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| 24 | | - * |
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| 25 | | - * |
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| 26 | 11 | * libata documentation is available via 'make {ps|pdf}docs', |
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| 27 | 12 | * as Documentation/driver-api/libata.rst |
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| 28 | 13 | * |
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| 29 | 14 | * AHCI hardware documentation: |
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| 30 | 15 | * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf |
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| 31 | 16 | * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf |
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| 32 | | - * |
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| 33 | 17 | */ |
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| 34 | 18 | |
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| 35 | 19 | #ifndef _AHCI_H |
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| .. | .. |
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| 254 | 238 | AHCI_HFLAG_IS_MOBILE = (1 << 25), /* mobile chipset, use |
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| 255 | 239 | SATA_MOBILE_LPM_POLICY |
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| 256 | 240 | as default lpm_policy */ |
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| 241 | + AHCI_HFLAG_SUSPEND_PHYS = (1 << 26), /* handle PHYs during |
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| 242 | + suspend/resume */ |
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| 243 | + AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = (1 << 27), /* ignore -EOPNOTSUPP |
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| 244 | + from phy_power_on() */ |
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| 245 | + AHCI_HFLAG_NO_SXS = (1 << 28), /* SXS not supported */ |
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| 257 | 246 | |
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| 258 | 247 | /* ap->flags bits */ |
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| 259 | 248 | |
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| .. | .. |
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| 265 | 254 | PCS_7 = 0x94, /* 7+ port PCS (Denverton) */ |
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| 266 | 255 | |
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| 267 | 256 | /* em constants */ |
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| 268 | | - EM_MAX_SLOTS = 8, |
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| 257 | + EM_MAX_SLOTS = SATA_PMP_MAX_PORTS, |
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| 269 | 258 | EM_MAX_RETRY = 5, |
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| 270 | 259 | |
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| 271 | 260 | /* em_ctl bits */ |
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| .. | .. |
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| 350 | 339 | u32 em_loc; /* enclosure management location */ |
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| 351 | 340 | u32 em_buf_sz; /* EM buffer size in byte */ |
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| 352 | 341 | u32 em_msg_type; /* EM message type */ |
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| 342 | + u32 remapped_nvme; /* NVMe remapped device count */ |
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| 353 | 343 | bool got_runtime_pm; /* Did we do pm_runtime_get? */ |
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| 354 | 344 | struct clk *clks[AHCI_MAX_CLKS]; /* Optional */ |
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| 355 | 345 | struct reset_control *rsts; /* Optional */ |
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| 356 | 346 | struct regulator **target_pwrs; /* Optional */ |
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| 347 | + struct regulator *ahci_regulator;/* Optional */ |
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| 348 | + struct regulator *phy_regulator;/* Optional */ |
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| 357 | 349 | /* |
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| 358 | 350 | * If platform uses PHYs. There is a 1:1 relation between the port number and |
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| 359 | 351 | * the PHY position in this array. |
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