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hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/x86/kvm/lapic.h
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..
@@ -10,11 +10,15 @@
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 #define KVM_APIC_SIPI		1
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 #define KVM_APIC_LVT_NUM	6
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12
 
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-#define KVM_APIC_SHORT_MASK	0xc0000
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-#define KVM_APIC_DEST_MASK	0x800
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+#define APIC_SHORT_MASK			0xc0000
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+#define APIC_DEST_NOSHORT		0x0
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+#define APIC_DEST_MASK			0x800
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 #define APIC_BUS_CYCLE_NS       1
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 #define APIC_BUS_FREQUENCY      (1000000000ULL / APIC_BUS_CYCLE_NS)
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+
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+#define APIC_BROADCAST			0xFF
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+#define X2APIC_BROADCAST		0xFFFFFFFFul
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22
 
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 enum lapic_mode {
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 	LAPIC_MODE_DISABLED = 0,
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@@ -31,6 +35,8 @@
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 	u32 timer_mode_mask;
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 	u64 tscdeadline;
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 	u64 expired_tscdeadline;
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+	u32 timer_advance_ns;
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+	s64 advance_expire_delta;
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 	atomic_t pending;			/* accumulated triggered timers */
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 	bool hv_timer_in_use;
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 };
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@@ -62,7 +68,7 @@
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 struct dest_map;
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-int kvm_create_lapic(struct kvm_vcpu *vcpu);
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+int kvm_create_lapic(struct kvm_vcpu *vcpu, int timer_advance_ns);
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 void kvm_free_lapic(struct kvm_vcpu *vcpu);
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 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
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@@ -75,22 +81,26 @@
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 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
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 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
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 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
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+void kvm_recalculate_apic_map(struct kvm *kvm);
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 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
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 int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val);
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 int kvm_lapic_reg_read(struct kvm_lapic *apic, u32 offset, int len,
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 		       void *data);
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 bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
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-			   int short_hand, unsigned int dest, int dest_mode);
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-
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+			   int shorthand, unsigned int dest, int dest_mode);
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+int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
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+void kvm_apic_clear_irr(struct kvm_vcpu *vcpu, int vec);
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 bool __kvm_apic_update_irr(u32 *pir, void *regs, int *max_irr);
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 bool kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir, int *max_irr);
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 void kvm_apic_update_ppr(struct kvm_vcpu *vcpu);
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 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
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 		     struct dest_map *dest_map);
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 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
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+void kvm_apic_update_apicv(struct kvm_vcpu *vcpu);
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 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
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 		struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map);
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+void kvm_apic_send_ipi(struct kvm_lapic *apic, u32 icr_low, u32 icr_high);
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 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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@@ -127,6 +137,11 @@
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 #define VEC_POS(v) ((v) & (32 - 1))
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 #define REG_POS(v) (((v) >> 5) << 4)
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+static inline void kvm_lapic_clear_vector(int vec, void *bitmap)
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+{
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+	clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
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+}
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+
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 static inline void kvm_lapic_set_vector(int vec, void *bitmap)
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 {
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 	set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
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@@ -147,9 +162,14 @@
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 	return *((u32 *) (apic->regs + reg_off));
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 }
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+static inline void __kvm_lapic_set_reg(char *regs, int reg_off, u32 val)
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+{
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+	*((u32 *) (regs + reg_off)) = val;
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+}
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+
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 static inline void kvm_lapic_set_reg(struct kvm_lapic *apic, int reg_off, u32 val)
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 {
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-	*((u32 *) (apic->regs + reg_off)) = val;
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+	__kvm_lapic_set_reg(apic->regs, reg_off, val);
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 }
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 extern struct static_key kvm_no_apic_vcpu;
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@@ -217,7 +237,10 @@
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237
 
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 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
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-void wait_lapic_expire(struct kvm_vcpu *vcpu);
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+void kvm_wait_lapic_expire(struct kvm_vcpu *vcpu);
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+
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+void kvm_bitmap_or_dest_vcpus(struct kvm *kvm, struct kvm_lapic_irq *irq,
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+			      unsigned long *vcpu_bitmap);
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 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
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 			struct kvm_vcpu **dest_vcpu);
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@@ -228,10 +251,16 @@
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 void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
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 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);
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 void kvm_lapic_restart_hv_timer(struct kvm_vcpu *vcpu);
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+bool kvm_can_use_hv_timer(struct kvm_vcpu *vcpu);
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 static inline enum lapic_mode kvm_apic_mode(u64 apic_base)
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 {
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 	return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
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 }
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+static inline u8 kvm_xapic_id(struct kvm_lapic *apic)
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+{
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+	return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
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+}
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+
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 #endif