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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/x86/crypto/poly1305_glue.c
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@@ -6,16 +6,17 @@
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 #include <crypto/algapi.h>
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 #include <crypto/internal/hash.h>
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 #include <crypto/internal/poly1305.h>
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+#include <crypto/internal/simd.h>
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 #include <linux/crypto.h>
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 #include <linux/jump_label.h>
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 #include <linux/kernel.h>
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 #include <linux/module.h>
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-#include <asm/fpu/api.h>
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-#include <asm/simd.h>
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+#include <linux/sizes.h>
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 #include <asm/intel-family.h>
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+#include <asm/simd.h>
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 asmlinkage void poly1305_init_x86_64(void *ctx,
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-				     const u8 key[POLY1305_KEY_SIZE]);
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+				     const u8 key[POLY1305_BLOCK_SIZE]);
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 asmlinkage void poly1305_blocks_x86_64(void *ctx, const u8 *inp,
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 				       const size_t len, const u32 padbit);
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 asmlinkage void poly1305_emit_x86_64(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
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@@ -80,7 +81,7 @@
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 	state->is_base2_26 = 0;
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 }
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-static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_KEY_SIZE])
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+static void poly1305_simd_init(void *ctx, const u8 key[POLY1305_BLOCK_SIZE])
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 {
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 	poly1305_init_x86_64(ctx, key);
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 }
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@@ -94,9 +95,9 @@
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 	BUILD_BUG_ON(SZ_4K < POLY1305_BLOCK_SIZE ||
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 		     SZ_4K % POLY1305_BLOCK_SIZE);
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-	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx) ||
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+	if (!static_branch_likely(&poly1305_use_avx) ||
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 	    (len < (POLY1305_BLOCK_SIZE * 18) && !state->is_base2_26) ||
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-	    !may_use_simd()) {
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+	    !crypto_simd_usable()) {
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 		convert_to_base2_64(ctx);
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 		poly1305_blocks_x86_64(ctx, inp, len, padbit);
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 		return;
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@@ -108,7 +109,7 @@
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 		kernel_fpu_begin();
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 		if (IS_ENABLED(CONFIG_AS_AVX512) && static_branch_likely(&poly1305_use_avx512))
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 			poly1305_blocks_avx512(ctx, inp, bytes, padbit);
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-		else if (IS_ENABLED(CONFIG_AS_AVX2) && static_branch_likely(&poly1305_use_avx2))
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+		else if (static_branch_likely(&poly1305_use_avx2))
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 			poly1305_blocks_avx2(ctx, inp, bytes, padbit);
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 		else
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 			poly1305_blocks_avx(ctx, inp, bytes, padbit);
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@@ -122,13 +123,13 @@
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 static void poly1305_simd_emit(void *ctx, u8 mac[POLY1305_DIGEST_SIZE],
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 			       const u32 nonce[4])
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 {
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-	if (!IS_ENABLED(CONFIG_AS_AVX) || !static_branch_likely(&poly1305_use_avx))
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+	if (!static_branch_likely(&poly1305_use_avx))
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 		poly1305_emit_x86_64(ctx, mac, nonce);
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 	else
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 		poly1305_emit_avx(ctx, mac, nonce);
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 }
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-void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 *key)
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+void poly1305_init_arch(struct poly1305_desc_ctx *dctx, const u8 key[POLY1305_KEY_SIZE])
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 {
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 	poly1305_simd_init(&dctx->h, key);
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 	dctx->s[0] = get_unaligned_le32(&key[16]);
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@@ -157,8 +158,6 @@
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 			dctx->s[1] = get_unaligned_le32(&inp[4]);
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 			dctx->s[2] = get_unaligned_le32(&inp[8]);
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 			dctx->s[3] = get_unaligned_le32(&inp[12]);
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-			inp += POLY1305_BLOCK_SIZE;
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-			len -= POLY1305_BLOCK_SIZE;
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 			acc += POLY1305_BLOCK_SIZE;
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 			dctx->sset = true;
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 		}
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@@ -260,11 +259,10 @@
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 static int __init poly1305_simd_mod_init(void)
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 {
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-	if (IS_ENABLED(CONFIG_AS_AVX) && boot_cpu_has(X86_FEATURE_AVX) &&
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+	if (boot_cpu_has(X86_FEATURE_AVX) &&
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 	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
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 		static_branch_enable(&poly1305_use_avx);
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-	if (IS_ENABLED(CONFIG_AS_AVX2) && boot_cpu_has(X86_FEATURE_AVX) &&
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-	    boot_cpu_has(X86_FEATURE_AVX2) &&
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+	if (boot_cpu_has(X86_FEATURE_AVX) && boot_cpu_has(X86_FEATURE_AVX2) &&
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 	    cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL))
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 		static_branch_enable(&poly1305_use_avx2);
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 	if (IS_ENABLED(CONFIG_AS_AVX512) && boot_cpu_has(X86_FEATURE_AVX) &&