mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/mips/sni/rm200.c
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@@ -356,11 +356,6 @@
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 /*
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  * IRQ2 is cascade interrupt to second interrupt controller
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  */
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-static struct irqaction sni_rm200_irq2 = {
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-	.handler = no_action,
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-	.name = "cascade",
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-	.flags = IRQF_NO_THREAD,
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-};
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 static struct resource sni_rm200_pic1_resource = {
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 	.name = "onboard ISA pic1",
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@@ -389,20 +384,14 @@
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 	return IRQ_HANDLED;
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 }
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-struct irqaction sni_rm200_i8259A_irq = {
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-	.handler = sni_rm200_i8259A_irq_handler,
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-	.name = "onboard ISA",
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-	.flags = IRQF_SHARED
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-};
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-
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 void __init sni_rm200_i8259_irqs(void)
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 {
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 	int i;
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-	rm200_pic_master = ioremap_nocache(0x16000020, 4);
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+	rm200_pic_master = ioremap(0x16000020, 4);
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 	if (!rm200_pic_master)
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 		return;
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-	rm200_pic_slave = ioremap_nocache(0x160000a0, 4);
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+	rm200_pic_slave = ioremap(0x160000a0, 4);
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 	if (!rm200_pic_slave) {
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 		iounmap(rm200_pic_master);
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 		return;
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@@ -417,7 +406,9 @@
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 		irq_set_chip_and_handler(i, &sni_rm200_i8259A_chip,
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 					 handle_level_irq);
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-	setup_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, &sni_rm200_irq2);
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+	if (request_irq(RM200_I8259A_IRQ_BASE + PIC_CASCADE_IR, no_action,
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+			IRQF_NO_THREAD, "cascade", NULL))
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+		pr_err("Failed to register cascade interrupt\n");
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 }
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@@ -481,8 +472,12 @@
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 		irq_set_chip_and_handler(i, &rm200_irq_type, handle_level_irq);
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 	sni_hwint = sni_rm200_hwint;
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 	change_c0_status(ST0_IM, IE_IRQ0);
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-	setup_irq(SNI_RM200_INT_START + 0, &sni_rm200_i8259A_irq);
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-	setup_irq(SNI_RM200_INT_START + 1, &sni_isa_irq);
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+	if (request_irq(SNI_RM200_INT_START + 0, sni_rm200_i8259A_irq_handler,
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+			0, "onboard ISA", NULL))
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+		pr_err("Failed to register onboard ISA interrupt\n");
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+	if (request_irq(SNI_RM200_INT_START + 1, sni_isa_irq_handler, 0, "ISA",
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+			NULL))
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+		pr_err("Failed to register ISA interrupt\n");
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 }
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 void __init sni_rm200_init(void)