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2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
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@@ -45,7 +45,6 @@
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 #define cpu_has_ic_fills_f_dc	0
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 #define cpu_has_64bits		1
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 #define cpu_has_octeon_cache	1
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-#define cpu_has_saa		octeon_has_saa()
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 #define cpu_has_mips32r1	1
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 #define cpu_has_mips32r2	1
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 #define cpu_has_mips64r1	1
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@@ -60,7 +59,6 @@
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 #define cpu_has_rixi		(cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
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-#define ARCH_HAS_IRQ_PER_CPU	1
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 #define ARCH_HAS_SPINLOCK_PREFETCH 1
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 #define spin_lock_prefetch(x) prefetch(x)
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 #define PREFETCH_STRIDE 128
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@@ -72,13 +70,6 @@
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  */
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 #define ARCH_HAS_USABLE_BUILTIN_POPCOUNT 1
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 #endif
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-
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-static inline int octeon_has_saa(void)
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-{
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-	int id;
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-	asm volatile ("mfc0 %0, $15,0" : "=r" (id));
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-	return id >= 0x000d0300;
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-}
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 /*
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  * The last 256MB are reserved for device to device mappings and the