| .. | .. |
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| 131 | 131 | */ |
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| 132 | 132 | mfc0 t0,CP0_CAUSE # get pending interrupts |
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| 133 | 133 | mfc0 t1,CP0_STATUS |
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| 134 | | -#ifdef CONFIG_32BIT |
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| 134 | +#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT) |
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| 135 | 135 | lw t2,cpu_fpu_mask |
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| 136 | 136 | #endif |
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| 137 | 137 | andi t0,ST0_IM # CAUSE.CE may be non-zero! |
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| .. | .. |
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| 139 | 139 | |
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| 140 | 140 | beqz t0,spurious |
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| 141 | 141 | |
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| 142 | | -#ifdef CONFIG_32BIT |
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| 142 | +#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT) |
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| 143 | 143 | and t2,t0 |
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| 144 | 144 | bnez t2,fpu # handle FPU immediately |
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| 145 | 145 | #endif |
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| .. | .. |
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| 280 | 280 | j dec_irq_dispatch |
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| 281 | 281 | nop |
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| 282 | 282 | |
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| 283 | | -#ifdef CONFIG_32BIT |
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| 283 | +#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT) |
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| 284 | 284 | fpu: |
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| 285 | 285 | lw t0,fpu_kstat_irq |
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| 286 | 286 | nop |
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| .. | .. |
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| 304 | 304 | */ |
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| 305 | 305 | FEXPORT(dec_intr_unimplemented) |
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| 306 | 306 | move a1,t0 # cheats way of printing an arg! |
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| 307 | | - PANIC("Unimplemented cpu interrupt! CP0_CAUSE: 0x%08x"); |
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| 307 | + ASM_PANIC("Unimplemented cpu interrupt! CP0_CAUSE: 0x%08x"); |
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| 308 | 308 | |
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| 309 | 309 | FEXPORT(asic_intr_unimplemented) |
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| 310 | 310 | move a1,t0 # cheats way of printing an arg! |
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| 311 | | - PANIC("Unimplemented asic interrupt! ASIC ISR: 0x%08x"); |
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| 311 | + ASM_PANIC("Unimplemented asic interrupt! ASIC ISR: 0x%08x"); |
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