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hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/ia64/kernel/smp.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * SMP Support
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  *
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@@ -35,18 +36,16 @@
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 #include <linux/atomic.h>
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 #include <asm/current.h>
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 #include <asm/delay.h>
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-#include <asm/machvec.h>
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 #include <asm/io.h>
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 #include <asm/irq.h>
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 #include <asm/page.h>
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-#include <asm/pgalloc.h>
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-#include <asm/pgtable.h>
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 #include <asm/processor.h>
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 #include <asm/ptrace.h>
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 #include <asm/sal.h>
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 #include <asm/tlbflush.h>
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 #include <asm/unistd.h>
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 #include <asm/mca.h>
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+#include <asm/xtp.h>
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 /*
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  * Note: alignment of 4 entries/cacheline was empirically determined
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@@ -145,7 +144,7 @@
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 send_IPI_single (int dest_cpu, int op)
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 {
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 	set_bit(op, &per_cpu(ipi_operation, dest_cpu));
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-	platform_send_ipi(dest_cpu, IA64_IPI_VECTOR, IA64_IPI_DM_INT, 0);
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+	ia64_send_ipi(dest_cpu, IA64_IPI_VECTOR, IA64_IPI_DM_INT, 0);
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 }
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 /*
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@@ -212,7 +211,7 @@
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 	for_each_online_cpu(cpu) {
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 		if (cpu != self_cpu) {
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 			if(kdump_status[cpu] == 0)
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-				platform_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0);
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+				ia64_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0);
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 		}
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 	}
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 }
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@@ -223,7 +222,7 @@
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 void
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 smp_send_reschedule (int cpu)
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 {
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-	platform_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0);
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+	ia64_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0);
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 }
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 EXPORT_SYMBOL_GPL(smp_send_reschedule);
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@@ -233,7 +232,7 @@
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 static void
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 smp_send_local_flush_tlb (int cpu)
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 {
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-	platform_send_ipi(cpu, IA64_IPI_LOCAL_TLB_FLUSH, IA64_IPI_DM_INT, 0);
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+	ia64_send_ipi(cpu, IA64_IPI_LOCAL_TLB_FLUSH, IA64_IPI_DM_INT, 0);
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 }
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 void