| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (C) 2017 ARM Ltd. |
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| 3 | 4 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify |
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| 6 | | - * it under the terms of the GNU General Public License version 2 as |
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| 7 | | - * published by the Free Software Foundation. |
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| 8 | | - * |
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| 9 | | - * This program is distributed in the hope that it will be useful, |
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| 10 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 11 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 12 | | - * GNU General Public License for more details. |
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| 13 | | - * |
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| 14 | | - * You should have received a copy of the GNU General Public License |
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| 15 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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| 16 | 5 | */ |
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| 17 | 6 | |
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| 18 | 7 | #include <linux/kvm_host.h> |
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| .. | .. |
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| 22 | 11 | #include <asm/debug-monitors.h> |
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| 23 | 12 | #include <asm/insn.h> |
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| 24 | 13 | #include <asm/kvm_mmu.h> |
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| 14 | +#include <asm/memory.h> |
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| 25 | 15 | |
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| 26 | 16 | /* |
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| 27 | | - * The LSB of the random hyp VA tag or 0 if no randomization is used. |
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| 17 | + * The LSB of the HYP VA tag |
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| 28 | 18 | */ |
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| 29 | 19 | static u8 tag_lsb; |
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| 30 | 20 | /* |
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| 31 | | - * The random hyp VA tag value with the region bit if hyp randomization is used |
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| 21 | + * The HYP VA tag value with the region bit |
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| 32 | 22 | */ |
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| 33 | 23 | static u64 tag_val; |
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| 34 | 24 | static u64 va_mask; |
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| 35 | 25 | |
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| 26 | +/* |
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| 27 | + * Compute HYP VA by using the same computation as kern_hyp_va(). |
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| 28 | + */ |
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| 29 | +static u64 __early_kern_hyp_va(u64 addr) |
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| 30 | +{ |
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| 31 | + addr &= va_mask; |
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| 32 | + addr |= tag_val << tag_lsb; |
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| 33 | + return addr; |
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| 34 | +} |
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| 35 | + |
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| 36 | +/* |
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| 37 | + * Store a hyp VA <-> PA offset into a EL2-owned variable. |
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| 38 | + */ |
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| 39 | +static void init_hyp_physvirt_offset(void) |
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| 40 | +{ |
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| 41 | + u64 kern_va, hyp_va; |
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| 42 | + |
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| 43 | + /* Compute the offset from the hyp VA and PA of a random symbol. */ |
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| 44 | + kern_va = (u64)lm_alias(__hyp_text_start); |
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| 45 | + hyp_va = __early_kern_hyp_va(kern_va); |
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| 46 | + hyp_physvirt_offset = (s64)__pa(kern_va) - (s64)hyp_va; |
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| 47 | +} |
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| 48 | + |
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| 49 | +/* |
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| 50 | + * We want to generate a hyp VA with the following format (with V == |
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| 51 | + * vabits_actual): |
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| 52 | + * |
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| 53 | + * 63 ... V | V-1 | V-2 .. tag_lsb | tag_lsb - 1 .. 0 |
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| 54 | + * --------------------------------------------------------- |
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| 55 | + * | 0000000 | hyp_va_msb | random tag | kern linear VA | |
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| 56 | + * |--------- tag_val -----------|----- va_mask ---| |
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| 57 | + * |
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| 58 | + * which does not conflict with the idmap regions. |
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| 59 | + */ |
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| 36 | 60 | __init void kvm_compute_layout(void) |
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| 37 | 61 | { |
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| 38 | 62 | phys_addr_t idmap_addr = __pa_symbol(__hyp_idmap_text_start); |
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| 39 | 63 | u64 hyp_va_msb; |
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| 40 | | - int kva_msb; |
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| 41 | 64 | |
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| 42 | 65 | /* Where is my RAM region? */ |
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| 43 | | - hyp_va_msb = idmap_addr & BIT(VA_BITS - 1); |
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| 44 | | - hyp_va_msb ^= BIT(VA_BITS - 1); |
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| 66 | + hyp_va_msb = idmap_addr & BIT(vabits_actual - 1); |
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| 67 | + hyp_va_msb ^= BIT(vabits_actual - 1); |
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| 45 | 68 | |
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| 46 | | - kva_msb = fls64((u64)phys_to_virt(memblock_start_of_DRAM()) ^ |
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| 69 | + tag_lsb = fls64((u64)phys_to_virt(memblock_start_of_DRAM()) ^ |
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| 47 | 70 | (u64)(high_memory - 1)); |
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| 48 | 71 | |
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| 49 | | - if (kva_msb == (VA_BITS - 1)) { |
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| 72 | + va_mask = GENMASK_ULL(tag_lsb - 1, 0); |
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| 73 | + tag_val = hyp_va_msb; |
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| 74 | + |
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| 75 | + if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && tag_lsb != (vabits_actual - 1)) { |
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| 76 | + /* We have some free bits to insert a random tag. */ |
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| 77 | + tag_val |= get_random_long() & GENMASK_ULL(vabits_actual - 2, tag_lsb); |
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| 78 | + } |
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| 79 | + tag_val >>= tag_lsb; |
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| 80 | + |
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| 81 | + init_hyp_physvirt_offset(); |
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| 82 | +} |
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| 83 | + |
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| 84 | +/* |
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| 85 | + * The .hyp.reloc ELF section contains a list of kimg positions that |
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| 86 | + * contains kimg VAs but will be accessed only in hyp execution context. |
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| 87 | + * Convert them to hyp VAs. See gen-hyprel.c for more details. |
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| 88 | + */ |
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| 89 | +__init void kvm_apply_hyp_relocations(void) |
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| 90 | +{ |
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| 91 | + int32_t *rel; |
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| 92 | + int32_t *begin = (int32_t *)__hyp_reloc_begin; |
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| 93 | + int32_t *end = (int32_t *)__hyp_reloc_end; |
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| 94 | + |
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| 95 | + for (rel = begin; rel < end; ++rel) { |
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| 96 | + uintptr_t *ptr, kimg_va; |
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| 97 | + |
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| 50 | 98 | /* |
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| 51 | | - * No space in the address, let's compute the mask so |
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| 52 | | - * that it covers (VA_BITS - 1) bits, and the region |
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| 53 | | - * bit. The tag stays set to zero. |
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| 99 | + * Each entry contains a 32-bit relative offset from itself |
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| 100 | + * to a kimg VA position. |
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| 54 | 101 | */ |
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| 55 | | - va_mask = BIT(VA_BITS - 1) - 1; |
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| 56 | | - va_mask |= hyp_va_msb; |
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| 57 | | - } else { |
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| 58 | | - /* |
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| 59 | | - * We do have some free bits to insert a random tag. |
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| 60 | | - * Hyp VAs are now created from kernel linear map VAs |
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| 61 | | - * using the following formula (with V == VA_BITS): |
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| 62 | | - * |
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| 63 | | - * 63 ... V | V-1 | V-2 .. tag_lsb | tag_lsb - 1 .. 0 |
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| 64 | | - * --------------------------------------------------------- |
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| 65 | | - * | 0000000 | hyp_va_msb | random tag | kern linear VA | |
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| 66 | | - */ |
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| 67 | | - tag_lsb = kva_msb; |
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| 68 | | - va_mask = GENMASK_ULL(tag_lsb - 1, 0); |
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| 69 | | - tag_val = get_random_long() & GENMASK_ULL(VA_BITS - 2, tag_lsb); |
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| 70 | | - tag_val |= hyp_va_msb; |
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| 71 | | - tag_val >>= tag_lsb; |
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| 102 | + ptr = (uintptr_t *)lm_alias((char *)rel + *rel); |
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| 103 | + |
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| 104 | + /* Read the kimg VA value at the relocation address. */ |
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| 105 | + kimg_va = *ptr; |
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| 106 | + |
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| 107 | + /* Convert to hyp VA and store back to the relocation address. */ |
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| 108 | + *ptr = __early_kern_hyp_va((uintptr_t)lm_alias(kimg_va)); |
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| 72 | 109 | } |
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| 73 | 110 | } |
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| 74 | 111 | |
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| .. | .. |
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| 121 | 158 | |
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| 122 | 159 | BUG_ON(nr_inst != 5); |
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| 123 | 160 | |
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| 124 | | - |
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| 125 | 161 | for (i = 0; i < nr_inst; i++) { |
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| 126 | 162 | u32 rd, rn, insn, oinsn; |
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| 127 | 163 | |
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| .. | .. |
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| 129 | 165 | * VHE doesn't need any address translation, let's NOP |
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| 130 | 166 | * everything. |
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| 131 | 167 | * |
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| 132 | | - * Alternatively, if we don't have any spare bits in |
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| 133 | | - * the address, NOP everything after masking that |
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| 134 | | - * kernel VA. |
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| 168 | + * Alternatively, if the tag is zero (because the layout |
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| 169 | + * dictates it and we don't have any spare bits in the |
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| 170 | + * address), NOP everything after masking the kernel VA. |
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| 135 | 171 | */ |
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| 136 | | - if (has_vhe() || (!tag_lsb && i > 0)) { |
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| 172 | + if (has_vhe() || (!tag_val && i > 0)) { |
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| 137 | 173 | updptr[i] = cpu_to_le32(aarch64_insn_gen_nop()); |
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| 138 | 174 | continue; |
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| 139 | 175 | } |
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| .. | .. |
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| 149 | 185 | } |
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| 150 | 186 | } |
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| 151 | 187 | |
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| 152 | | -void *__kvm_bp_vect_base; |
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| 153 | | -int __kvm_harden_el2_vector_slot; |
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| 154 | | - |
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| 155 | 188 | void kvm_patch_vector_branch(struct alt_instr *alt, |
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| 156 | 189 | __le32 *origptr, __le32 *updptr, int nr_inst) |
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| 157 | 190 | { |
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| 158 | 191 | u64 addr; |
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| 159 | 192 | u32 insn; |
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| 160 | 193 | |
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| 161 | | - BUG_ON(nr_inst != 5); |
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| 194 | + BUG_ON(nr_inst != 4); |
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| 162 | 195 | |
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| 163 | | - if (has_vhe() || !cpus_have_const_cap(ARM64_HARDEN_EL2_VECTORS)) { |
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| 164 | | - WARN_ON_ONCE(cpus_have_const_cap(ARM64_HARDEN_EL2_VECTORS)); |
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| 196 | + if (!cpus_have_const_cap(ARM64_SPECTRE_V3A) || WARN_ON_ONCE(has_vhe())) |
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| 165 | 197 | return; |
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| 166 | | - } |
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| 167 | 198 | |
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| 168 | 199 | /* |
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| 169 | 200 | * Compute HYP VA by using the same computation as kern_hyp_va() |
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| 170 | 201 | */ |
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| 171 | | - addr = (uintptr_t)kvm_ksym_ref(__kvm_hyp_vector); |
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| 172 | | - addr &= va_mask; |
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| 173 | | - addr |= tag_val << tag_lsb; |
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| 202 | + addr = __early_kern_hyp_va((u64)kvm_ksym_ref(__kvm_hyp_vector)); |
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| 174 | 203 | |
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| 175 | 204 | /* Use PC[10:7] to branch to the same vector in KVM */ |
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| 176 | 205 | addr |= ((u64)origptr & GENMASK_ULL(10, 7)); |
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| 177 | 206 | |
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| 178 | 207 | /* |
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| 179 | | - * Branch to the second instruction in the vectors in order to |
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| 180 | | - * avoid the initial store on the stack (which we already |
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| 181 | | - * perform in the hardening vectors). |
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| 208 | + * Branch over the preamble in order to avoid the initial store on |
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| 209 | + * the stack (which we already perform in the hardening vectors). |
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| 182 | 210 | */ |
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| 183 | | - addr += AARCH64_INSN_SIZE; |
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| 184 | | - |
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| 185 | | - /* stp x0, x1, [sp, #-16]! */ |
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| 186 | | - insn = aarch64_insn_gen_load_store_pair(AARCH64_INSN_REG_0, |
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| 187 | | - AARCH64_INSN_REG_1, |
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| 188 | | - AARCH64_INSN_REG_SP, |
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| 189 | | - -16, |
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| 190 | | - AARCH64_INSN_VARIANT_64BIT, |
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| 191 | | - AARCH64_INSN_LDST_STORE_PAIR_PRE_INDEX); |
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| 192 | | - *updptr++ = cpu_to_le32(insn); |
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| 211 | + addr += KVM_VECTOR_PREAMBLE; |
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| 193 | 212 | |
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| 194 | 213 | /* movz x0, #(addr & 0xffff) */ |
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| 195 | 214 | insn = aarch64_insn_gen_movewide(AARCH64_INSN_REG_0, |
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| .. | .. |
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| 220 | 239 | AARCH64_INSN_BRANCH_NOLINK); |
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| 221 | 240 | *updptr++ = cpu_to_le32(insn); |
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| 222 | 241 | } |
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| 242 | + |
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| 243 | +static void generate_mov_q(u64 val, __le32 *origptr, __le32 *updptr, int nr_inst) |
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| 244 | +{ |
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| 245 | + u32 insn, oinsn, rd; |
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| 246 | + |
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| 247 | + BUG_ON(nr_inst != 4); |
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| 248 | + |
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| 249 | + /* Compute target register */ |
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| 250 | + oinsn = le32_to_cpu(*origptr); |
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| 251 | + rd = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RD, oinsn); |
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| 252 | + |
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| 253 | + /* movz rd, #(val & 0xffff) */ |
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| 254 | + insn = aarch64_insn_gen_movewide(rd, |
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| 255 | + (u16)val, |
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| 256 | + 0, |
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| 257 | + AARCH64_INSN_VARIANT_64BIT, |
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| 258 | + AARCH64_INSN_MOVEWIDE_ZERO); |
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| 259 | + *updptr++ = cpu_to_le32(insn); |
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| 260 | + |
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| 261 | + /* movk rd, #((val >> 16) & 0xffff), lsl #16 */ |
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| 262 | + insn = aarch64_insn_gen_movewide(rd, |
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| 263 | + (u16)(val >> 16), |
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| 264 | + 16, |
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| 265 | + AARCH64_INSN_VARIANT_64BIT, |
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| 266 | + AARCH64_INSN_MOVEWIDE_KEEP); |
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| 267 | + *updptr++ = cpu_to_le32(insn); |
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| 268 | + |
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| 269 | + /* movk rd, #((val >> 32) & 0xffff), lsl #32 */ |
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| 270 | + insn = aarch64_insn_gen_movewide(rd, |
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| 271 | + (u16)(val >> 32), |
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| 272 | + 32, |
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| 273 | + AARCH64_INSN_VARIANT_64BIT, |
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| 274 | + AARCH64_INSN_MOVEWIDE_KEEP); |
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| 275 | + *updptr++ = cpu_to_le32(insn); |
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| 276 | + |
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| 277 | + /* movk rd, #((val >> 48) & 0xffff), lsl #48 */ |
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| 278 | + insn = aarch64_insn_gen_movewide(rd, |
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| 279 | + (u16)(val >> 48), |
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| 280 | + 48, |
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| 281 | + AARCH64_INSN_VARIANT_64BIT, |
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| 282 | + AARCH64_INSN_MOVEWIDE_KEEP); |
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| 283 | + *updptr++ = cpu_to_le32(insn); |
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| 284 | +} |
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| 285 | + |
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| 286 | +void kvm_get_kimage_voffset(struct alt_instr *alt, |
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| 287 | + __le32 *origptr, __le32 *updptr, int nr_inst) |
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| 288 | +{ |
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| 289 | + generate_mov_q(kimage_voffset, origptr, updptr, nr_inst); |
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| 290 | +} |
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| 291 | + |
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| 292 | +void kvm_compute_final_ctr_el0(struct alt_instr *alt, |
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| 293 | + __le32 *origptr, __le32 *updptr, int nr_inst) |
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| 294 | +{ |
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| 295 | + generate_mov_q(read_sanitised_ftr_reg(SYS_CTR_EL0), |
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| 296 | + origptr, updptr, nr_inst); |
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| 297 | +} |
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