mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/arm/mm/proc-arm926.S
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@@ -1,24 +1,10 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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 /*
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  *  linux/arch/arm/mm/proc-arm926.S: MMU functions for ARM926EJ-S
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  *
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  *  Copyright (C) 1999-2001 ARM Limited
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  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
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  *  hacked for non-paged-MM by Hyok S. Choi, 2003.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License as published by
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- * the Free Software Foundation; either version 2 of the License, or
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- * (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, write to the Free Software
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- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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- *
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  *
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  * These are the low level assembler for performing cache and TLB
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  * functions on the arm926.
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@@ -27,10 +13,10 @@
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  */
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 #include <linux/linkage.h>
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 #include <linux/init.h>
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+#include <linux/pgtable.h>
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 #include <asm/assembler.h>
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 #include <asm/hwcap.h>
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 #include <asm/pgtable-hwdef.h>
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-#include <asm/pgtable.h>
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 #include <asm/page.h>
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 #include <asm/ptrace.h>
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 #include "proc-macros.S"
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@@ -145,7 +131,7 @@
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 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
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 	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
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 #else
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-1:	mrc	p15, 0, r15, c7, c14, 3 	@ test,clean,invalidate
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+1:	mrc	p15, 0, APSR_nzcv, c7, c14, 3 	@ test,clean,invalidate
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 	bne	1b
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 #endif
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 	tst	r2, #VM_EXEC
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@@ -372,7 +358,7 @@
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 	mcr	p15, 0, ip, c7, c6, 0		@ invalidate D cache
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 #else
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 @ && 'Clean & Invalidate whole DCache'
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-1:	mrc	p15, 0, r15, c7, c14, 3 	@ test,clean,invalidate
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+1:	mrc	p15, 0, APSR_nzcv, c7, c14, 3 	@ test,clean,invalidate
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 	bne	1b
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 #endif
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 	mcr	p15, 0, ip, c7, c5, 0		@ invalidate I cache
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@@ -474,7 +460,7 @@
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 	.align
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-	.section ".proc.info.init", #alloc
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+	.section ".proc.info.init", "a"
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 	.type	__arm926_proc_info,#object
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 __arm926_proc_info: