mk-rootfs.sh

hc

2023-12-11 072de836f53be56a70cecf70b43ae43b7ce17376

 kernel/arch/arm/mach-zynq/platsmp.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * This file contains Xilinx specific SMP code, used to start up
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  * the second processor.
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@@ -7,15 +8,6 @@
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  * based on linux/arch/arm/mach-realview/platsmp.c
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  *
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  * Copyright (C) 2002 ARM Ltd.
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- *
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- * This software is licensed under the terms of the GNU General Public
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- * License version 2, as published by the Free Software Foundation, and
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- * may be copied, distributed, and modified under those terms.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #include <linux/export.h>
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@@ -23,6 +15,7 @@
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 #include <linux/init.h>
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 #include <linux/io.h>
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 #include <asm/cacheflush.h>
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+#include <asm/smp_plat.h>
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 #include <asm/smp_scu.h>
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 #include <linux/irqchip/arm-gic.h>
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 #include "common.h"
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 {
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 	u32 trampoline_code_size = &zynq_secondary_trampoline_end -
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 						&zynq_secondary_trampoline;
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+	u32 phy_cpuid = cpu_logical_map(cpu);
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 	/* MS: Expectation that SLCR are directly map and accessible */
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 	/* Not possible to jump to non aligned address */
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@@ -47,7 +41,7 @@
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 		u32 trampoline_size = &zynq_secondary_trampoline_jump -
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 						&zynq_secondary_trampoline;
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-		zynq_slcr_cpu_stop(cpu);
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+		zynq_slcr_cpu_stop(phy_cpuid);
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 		if (address) {
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 			if (__pa(PAGE_OFFSET)) {
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 				zero = ioremap(0, trampoline_code_size);
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@@ -76,7 +70,7 @@
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 			if (__pa(PAGE_OFFSET))
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 				iounmap(zero);
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 		}
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-		zynq_slcr_cpu_start(cpu);
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+		zynq_slcr_cpu_start(phy_cpuid);
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 		return 0;
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 	}
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@@ -89,7 +83,7 @@
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 static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle)
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 {
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-	return zynq_cpun_start(__pa_symbol(secondary_startup), cpu);
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+	return zynq_cpun_start(__pa_symbol(secondary_startup_arm), cpu);
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 }
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 /*