| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) |
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| 5 | | - * |
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| 6 | | - * This program is free software; you can redistribute it and/or modify |
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| 7 | | - * it under the terms of the GNU General Public License version 2 as |
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| 8 | | - * published by the Free Software Foundation. |
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| 9 | 6 | */ |
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| 10 | 7 | |
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| 11 | 8 | #include <linux/linkage.h> /* ARC_{EXTRY,EXIT} */ |
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| .. | .. |
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| 70 | 67 | |
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| 71 | 68 | ENTRY(handle_interrupt) |
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| 72 | 69 | |
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| 73 | | - INTERRUPT_PROLOGUE irq |
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| 70 | + INTERRUPT_PROLOGUE |
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| 74 | 71 | |
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| 75 | 72 | # irq control APIs local_irq_save/restore/disable/enable fiddle with |
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| 76 | 73 | # global interrupt enable bits in STATUS32 (.IE for 1 prio, .E[] for 2 prio) |
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| .. | .. |
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| 82 | 79 | # |
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| 83 | 80 | # Note this disable is only for consistent book-keeping as further interrupts |
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| 84 | 81 | # will be disabled anyways even w/o this. Hardware tracks active interrupts |
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| 85 | | - # seperately in AUX_IRQ_ACTIVE.active and will not take new interrupts |
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| 82 | + # seperately in AUX_IRQ_ACT.active and will not take new interrupts |
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| 86 | 83 | # unless this one returns (or higher prio becomes pending in 2-prio scheme) |
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| 87 | 84 | |
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| 88 | 85 | IRQ_DISABLE |
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| .. | .. |
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| 203 | 200 | ld r0, [sp, PT_status32] ; U/K mode at time of entry |
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| 204 | 201 | lr r10, [AUX_IRQ_ACT] |
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| 205 | 202 | |
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| 206 | | - bmsk r11, r10, 15 ; AUX_IRQ_ACT.ACTIVE |
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| 203 | + bmsk r11, r10, 15 ; extract AUX_IRQ_ACT.active |
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| 207 | 204 | breq r11, 0, .Lexcept_ret ; No intr active, ret from Exception |
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| 208 | 205 | |
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| 209 | 206 | ;####### Return from Intr ####### |
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| 207 | + |
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| 208 | +.Lisr_ret: |
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| 210 | 209 | |
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| 211 | 210 | debug_marker_l1: |
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| 212 | 211 | ; bbit1.nt r0, STATUS_DE_BIT, .Lintr_ret_to_delay_slot |
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| 213 | 212 | btst r0, STATUS_DE_BIT ; Z flag set if bit clear |
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| 214 | 213 | bnz .Lintr_ret_to_delay_slot ; branch if STATUS_DE_BIT set |
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| 215 | 214 | |
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| 216 | | -.Lisr_ret_fast_path: |
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| 217 | 215 | ; Handle special case #1: (Entry via Exception, Return via IRQ) |
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| 218 | 216 | ; |
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| 219 | 217 | ; Exception in U mode, preempted in kernel, Intr taken (K mode), orig |
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| .. | .. |
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| 226 | 224 | bset.nz r11, r11, AUX_IRQ_ACT_BIT_U ; NZ means U |
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| 227 | 225 | sr r11, [AUX_IRQ_ACT] |
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| 228 | 226 | |
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| 229 | | - INTERRUPT_EPILOGUE irq |
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| 227 | + INTERRUPT_EPILOGUE |
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| 230 | 228 | rtie |
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| 231 | 229 | |
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| 232 | 230 | ;####### Return from Exception / pure kernel mode ####### |
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| .. | .. |
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| 247 | 245 | ; |
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| 248 | 246 | ; IRQ RTIE won't reliably restore DE bit and/or BTA, needs workaround |
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| 249 | 247 | ; |
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| 250 | | -; Solution is return from Intr w/o any delay slot quirks into a kernel trampoline |
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| 251 | | -; and from pure kernel mode return to delay slot which handles DS bit/BTA correctly |
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| 248 | +; Solution is to drop out of interrupt context into pure kernel mode |
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| 249 | +; and return from pure kernel mode which does right things for delay slot |
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| 252 | 250 | |
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| 253 | 251 | .Lintr_ret_to_delay_slot: |
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| 254 | 252 | debug_marker_ds: |
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| .. | .. |
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| 257 | 255 | add r2, r2, 1 |
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| 258 | 256 | st r2, [@intr_to_DE_cnt] |
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| 259 | 257 | |
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| 260 | | - ld r2, [sp, PT_ret] |
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| 261 | | - ld r3, [sp, PT_status32] |
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| 262 | | - |
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| 263 | | - ; STAT32 for Int return created from scratch |
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| 264 | | - ; (No delay dlot, disable Further intr in trampoline) |
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| 265 | | - |
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| 266 | | - bic r0, r3, STATUS_U_MASK|STATUS_DE_MASK|STATUS_IE_MASK|STATUS_L_MASK |
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| 267 | | - st r0, [sp, PT_status32] |
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| 268 | | - |
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| 269 | | - mov r1, .Lintr_ret_to_delay_slot_2 |
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| 270 | | - st r1, [sp, PT_ret] |
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| 271 | | - |
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| 272 | | - ; Orig exception PC/STAT32 safekept @orig_r0 and @event stack slots |
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| 273 | | - st r2, [sp, 0] |
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| 274 | | - st r3, [sp, 4] |
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| 275 | | - |
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| 276 | | - b .Lisr_ret_fast_path |
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| 277 | | - |
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| 278 | | -.Lintr_ret_to_delay_slot_2: |
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| 279 | | - ; Trampoline to restore orig exception PC/STAT32/BTA/AUX_USER_SP |
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| 280 | | - sub sp, sp, SZ_PT_REGS |
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| 281 | | - st r9, [sp, -4] |
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| 282 | | - |
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| 283 | | - ld r9, [sp, 0] |
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| 284 | | - sr r9, [eret] |
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| 285 | | - |
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| 286 | | - ld r9, [sp, 4] |
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| 287 | | - sr r9, [erstatus] |
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| 288 | | - |
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| 289 | | - ; restore AUX_USER_SP if returning to U mode |
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| 290 | | - bbit0 r9, STATUS_U_BIT, 1f |
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| 291 | | - ld r9, [sp, PT_sp] |
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| 292 | | - sr r9, [AUX_USER_SP] |
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| 293 | | - |
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| 294 | | -1: |
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| 295 | | - ld r9, [sp, 8] |
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| 296 | | - sr r9, [erbta] |
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| 297 | | - |
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| 298 | | - ld r9, [sp, -4] |
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| 299 | | - add sp, sp, SZ_PT_REGS |
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| 300 | | - |
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| 301 | | - ; return from pure kernel mode to delay slot |
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| 302 | | - rtie |
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| 258 | + ; drop out of interrupt context (clear AUX_IRQ_ACT.active) |
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| 259 | + bmskn r11, r10, 15 |
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| 260 | + sr r11, [AUX_IRQ_ACT] |
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| 261 | + b .Lexcept_ret |
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| 303 | 262 | |
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| 304 | 263 | END(ret_from_exception) |
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