| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * intel_pt.c: Intel Processor Trace support |
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| 3 | 4 | * Copyright (c) 2013-2015, Intel Corporation. |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify it |
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| 6 | | - * under the terms and conditions of the GNU General Public License, |
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| 7 | | - * version 2, as published by the Free Software Foundation. |
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| 8 | | - * |
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| 9 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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| 10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 12 | | - * more details. |
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| 13 | | - * |
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| 14 | 5 | */ |
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| 15 | 6 | |
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| 16 | 7 | #include <errno.h> |
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| .. | .. |
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| 19 | 10 | #include <linux/types.h> |
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| 20 | 11 | #include <linux/bitops.h> |
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| 21 | 12 | #include <linux/log2.h> |
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| 13 | +#include <linux/zalloc.h> |
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| 22 | 14 | #include <cpuid.h> |
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| 23 | 15 | |
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| 24 | | -#include "../../perf.h" |
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| 25 | | -#include "../../util/session.h" |
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| 26 | | -#include "../../util/event.h" |
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| 27 | | -#include "../../util/evlist.h" |
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| 28 | | -#include "../../util/evsel.h" |
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| 29 | | -#include "../../util/cpumap.h" |
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| 16 | +#include "../../../util/session.h" |
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| 17 | +#include "../../../util/event.h" |
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| 18 | +#include "../../../util/evlist.h" |
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| 19 | +#include "../../../util/evsel.h" |
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| 20 | +#include "../../../util/evsel_config.h" |
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| 21 | +#include "../../../util/cpumap.h" |
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| 22 | +#include "../../../util/mmap.h" |
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| 30 | 23 | #include <subcmd/parse-options.h> |
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| 31 | | -#include "../../util/parse-events.h" |
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| 32 | | -#include "../../util/pmu.h" |
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| 33 | | -#include "../../util/debug.h" |
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| 34 | | -#include "../../util/auxtrace.h" |
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| 35 | | -#include "../../util/tsc.h" |
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| 36 | | -#include "../../util/intel-pt.h" |
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| 24 | +#include "../../../util/parse-events.h" |
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| 25 | +#include "../../../util/pmu.h" |
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| 26 | +#include "../../../util/debug.h" |
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| 27 | +#include "../../../util/auxtrace.h" |
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| 28 | +#include "../../../util/perf_api_probe.h" |
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| 29 | +#include "../../../util/record.h" |
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| 30 | +#include "../../../util/target.h" |
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| 31 | +#include "../../../util/tsc.h" |
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| 32 | +#include <internal/lib.h> // page_size |
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| 33 | +#include "../../../util/intel-pt.h" |
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| 37 | 34 | |
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| 38 | 35 | #define KiB(x) ((x) * 1024) |
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| 39 | 36 | #define MiB(x) ((x) * 1024 * 1024) |
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| .. | .. |
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| 52 | 49 | struct auxtrace_record itr; |
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| 53 | 50 | struct perf_pmu *intel_pt_pmu; |
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| 54 | 51 | int have_sched_switch; |
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| 55 | | - struct perf_evlist *evlist; |
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| 52 | + struct evlist *evlist; |
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| 56 | 53 | bool snapshot_mode; |
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| 57 | 54 | bool snapshot_init_done; |
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| 58 | 55 | size_t snapshot_size; |
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| .. | .. |
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| 62 | 59 | size_t priv_size; |
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| 63 | 60 | }; |
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| 64 | 61 | |
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| 65 | | -static int intel_pt_parse_terms_with_default(struct list_head *formats, |
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| 62 | +static int intel_pt_parse_terms_with_default(const char *pmu_name, |
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| 63 | + struct list_head *formats, |
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| 66 | 64 | const char *str, |
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| 67 | 65 | u64 *config) |
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| 68 | 66 | { |
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| .. | .. |
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| 81 | 79 | goto out_free; |
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| 82 | 80 | |
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| 83 | 81 | attr.config = *config; |
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| 84 | | - err = perf_pmu__config_terms(formats, &attr, terms, true, NULL); |
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| 82 | + err = perf_pmu__config_terms(pmu_name, formats, &attr, terms, true, |
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| 83 | + NULL); |
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| 85 | 84 | if (err) |
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| 86 | 85 | goto out_free; |
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| 87 | 86 | |
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| .. | .. |
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| 91 | 90 | return err; |
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| 92 | 91 | } |
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| 93 | 92 | |
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| 94 | | -static int intel_pt_parse_terms(struct list_head *formats, const char *str, |
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| 95 | | - u64 *config) |
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| 93 | +static int intel_pt_parse_terms(const char *pmu_name, struct list_head *formats, |
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| 94 | + const char *str, u64 *config) |
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| 96 | 95 | { |
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| 97 | 96 | *config = 0; |
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| 98 | | - return intel_pt_parse_terms_with_default(formats, str, config); |
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| 97 | + return intel_pt_parse_terms_with_default(pmu_name, formats, str, |
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| 98 | + config); |
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| 99 | 99 | } |
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| 100 | 100 | |
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| 101 | 101 | static u64 intel_pt_masked_bits(u64 mask, u64 bits) |
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| .. | .. |
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| 118 | 118 | } |
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| 119 | 119 | |
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| 120 | 120 | static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str, |
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| 121 | | - struct perf_evlist *evlist, u64 *res) |
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| 121 | + struct evlist *evlist, u64 *res) |
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| 122 | 122 | { |
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| 123 | | - struct perf_evsel *evsel; |
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| 123 | + struct evsel *evsel; |
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| 124 | 124 | u64 mask; |
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| 125 | 125 | |
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| 126 | 126 | *res = 0; |
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| .. | .. |
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| 130 | 130 | return -EINVAL; |
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| 131 | 131 | |
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| 132 | 132 | evlist__for_each_entry(evlist, evsel) { |
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| 133 | | - if (evsel->attr.type == intel_pt_pmu->type) { |
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| 134 | | - *res = intel_pt_masked_bits(mask, evsel->attr.config); |
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| 133 | + if (evsel->core.attr.type == intel_pt_pmu->type) { |
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| 134 | + *res = intel_pt_masked_bits(mask, evsel->core.attr.config); |
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| 135 | 135 | return 0; |
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| 136 | 136 | } |
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| 137 | 137 | } |
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| .. | .. |
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| 140 | 140 | } |
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| 141 | 141 | |
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| 142 | 142 | static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu, |
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| 143 | | - struct perf_evlist *evlist) |
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| 143 | + struct evlist *evlist) |
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| 144 | 144 | { |
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| 145 | 145 | u64 val; |
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| 146 | 146 | int err, topa_multiple_entries; |
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| .. | .. |
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| 232 | 232 | |
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| 233 | 233 | pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf); |
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| 234 | 234 | |
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| 235 | | - intel_pt_parse_terms(&intel_pt_pmu->format, buf, &config); |
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| 235 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, buf, |
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| 236 | + &config); |
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| 236 | 237 | |
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| 237 | 238 | return config; |
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| 238 | 239 | } |
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| .. | .. |
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| 276 | 277 | return attr; |
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| 277 | 278 | } |
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| 278 | 279 | |
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| 279 | | -static const char *intel_pt_find_filter(struct perf_evlist *evlist, |
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| 280 | +static const char *intel_pt_find_filter(struct evlist *evlist, |
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| 280 | 281 | struct perf_pmu *intel_pt_pmu) |
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| 281 | 282 | { |
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| 282 | | - struct perf_evsel *evsel; |
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| 283 | + struct evsel *evsel; |
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| 283 | 284 | |
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| 284 | 285 | evlist__for_each_entry(evlist, evsel) { |
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| 285 | | - if (evsel->attr.type == intel_pt_pmu->type) |
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| 286 | + if (evsel->core.attr.type == intel_pt_pmu->type) |
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| 286 | 287 | return evsel->filter; |
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| 287 | 288 | } |
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| 288 | 289 | |
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| .. | .. |
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| 297 | 298 | } |
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| 298 | 299 | |
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| 299 | 300 | static size_t |
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| 300 | | -intel_pt_info_priv_size(struct auxtrace_record *itr, struct perf_evlist *evlist) |
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| 301 | +intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist) |
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| 301 | 302 | { |
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| 302 | 303 | struct intel_pt_recording *ptr = |
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| 303 | 304 | container_of(itr, struct intel_pt_recording, itr); |
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| .. | .. |
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| 320 | 321 | |
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| 321 | 322 | static int intel_pt_info_fill(struct auxtrace_record *itr, |
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| 322 | 323 | struct perf_session *session, |
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| 323 | | - struct auxtrace_info_event *auxtrace_info, |
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| 324 | + struct perf_record_auxtrace_info *auxtrace_info, |
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| 324 | 325 | size_t priv_size) |
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| 325 | 326 | { |
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| 326 | 327 | struct intel_pt_recording *ptr = |
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| .. | .. |
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| 334 | 335 | unsigned long max_non_turbo_ratio; |
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| 335 | 336 | size_t filter_str_len; |
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| 336 | 337 | const char *filter; |
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| 337 | | - u64 *info; |
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| 338 | + __u64 *info; |
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| 338 | 339 | int err; |
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| 339 | 340 | |
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| 340 | 341 | if (priv_size != ptr->priv_size) |
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| 341 | 342 | return -EINVAL; |
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| 342 | 343 | |
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| 343 | | - intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit); |
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| 344 | | - intel_pt_parse_terms(&intel_pt_pmu->format, "noretcomp", |
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| 345 | | - &noretcomp_bit); |
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| 346 | | - intel_pt_parse_terms(&intel_pt_pmu->format, "mtc", &mtc_bit); |
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| 344 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, |
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| 345 | + "tsc", &tsc_bit); |
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| 346 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, |
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| 347 | + "noretcomp", &noretcomp_bit); |
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| 348 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, |
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| 349 | + "mtc", &mtc_bit); |
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| 347 | 350 | mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format, |
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| 348 | 351 | "mtc_period"); |
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| 349 | | - intel_pt_parse_terms(&intel_pt_pmu->format, "cyc", &cyc_bit); |
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| 352 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, |
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| 353 | + "cyc", &cyc_bit); |
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| 350 | 354 | |
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| 351 | 355 | intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d); |
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| 352 | 356 | |
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| .. | .. |
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| 357 | 361 | filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu); |
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| 358 | 362 | filter_str_len = filter ? strlen(filter) : 0; |
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| 359 | 363 | |
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| 360 | | - if (!session->evlist->nr_mmaps) |
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| 364 | + if (!session->evlist->core.nr_mmaps) |
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| 361 | 365 | return -EINVAL; |
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| 362 | 366 | |
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| 363 | | - pc = session->evlist->mmap[0].base; |
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| 367 | + pc = session->evlist->mmap[0].core.base; |
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| 364 | 368 | if (pc) { |
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| 365 | 369 | err = perf_read_tsc_conversion(pc, &tc); |
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| 366 | 370 | if (err) { |
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| .. | .. |
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| 373 | 377 | ui__warning("Intel Processor Trace: TSC not available\n"); |
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| 374 | 378 | } |
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| 375 | 379 | |
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| 376 | | - per_cpu_mmaps = !cpu_map__empty(session->evlist->cpus); |
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| 380 | + per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.cpus); |
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| 377 | 381 | |
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| 378 | 382 | auxtrace_info->type = PERF_AUXTRACE_INTEL_PT; |
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| 379 | 383 | auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type; |
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| .. | .. |
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| 406 | 410 | return 0; |
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| 407 | 411 | } |
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| 408 | 412 | |
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| 409 | | -static int intel_pt_track_switches(struct perf_evlist *evlist) |
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| 413 | +static int intel_pt_track_switches(struct evlist *evlist) |
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| 410 | 414 | { |
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| 411 | 415 | const char *sched_switch = "sched:sched_switch"; |
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| 412 | | - struct perf_evsel *evsel; |
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| 416 | + struct evsel *evsel; |
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| 413 | 417 | int err; |
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| 414 | 418 | |
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| 415 | 419 | if (!perf_evlist__can_select_event(evlist, sched_switch)) |
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| .. | .. |
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| 422 | 426 | return err; |
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| 423 | 427 | } |
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| 424 | 428 | |
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| 425 | | - evsel = perf_evlist__last(evlist); |
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| 429 | + evsel = evlist__last(evlist); |
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| 426 | 430 | |
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| 427 | | - perf_evsel__set_sample_bit(evsel, CPU); |
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| 428 | | - perf_evsel__set_sample_bit(evsel, TIME); |
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| 431 | + evsel__set_sample_bit(evsel, CPU); |
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| 432 | + evsel__set_sample_bit(evsel, TIME); |
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| 429 | 433 | |
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| 430 | | - evsel->system_wide = true; |
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| 434 | + evsel->core.system_wide = true; |
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| 431 | 435 | evsel->no_aux_samples = true; |
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| 432 | 436 | evsel->immediate = true; |
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| 433 | 437 | |
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| .. | .. |
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| 521 | 525 | } |
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| 522 | 526 | |
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| 523 | 527 | static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu, |
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| 524 | | - struct perf_evsel *evsel) |
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| 528 | + struct evsel *evsel) |
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| 525 | 529 | { |
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| 526 | 530 | int err; |
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| 527 | 531 | char c; |
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| .. | .. |
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| 534 | 538 | * sets pt=0, which avoids senseless kernel errors. |
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| 535 | 539 | */ |
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| 536 | 540 | if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 && |
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| 537 | | - !(evsel->attr.config & 1)) { |
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| 541 | + !(evsel->core.attr.config & 1)) { |
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| 538 | 542 | pr_warning("pt=0 doesn't make sense, forcing pt=1\n"); |
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| 539 | | - evsel->attr.config |= 1; |
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| 543 | + evsel->core.attr.config |= 1; |
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| 540 | 544 | } |
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| 541 | 545 | |
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| 542 | 546 | err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds", |
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| 543 | 547 | "cyc_thresh", "caps/psb_cyc", |
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| 544 | | - evsel->attr.config); |
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| 548 | + evsel->core.attr.config); |
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| 545 | 549 | if (err) |
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| 546 | 550 | return err; |
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| 547 | 551 | |
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| 548 | 552 | err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods", |
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| 549 | 553 | "mtc_period", "caps/mtc", |
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| 550 | | - evsel->attr.config); |
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| 554 | + evsel->core.attr.config); |
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| 551 | 555 | if (err) |
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| 552 | 556 | return err; |
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| 553 | 557 | |
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| 554 | 558 | return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods", |
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| 555 | 559 | "psb_period", "caps/psb_cyc", |
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| 556 | | - evsel->attr.config); |
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| 560 | + evsel->core.attr.config); |
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| 561 | +} |
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| 562 | + |
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| 563 | +static void intel_pt_config_sample_mode(struct perf_pmu *intel_pt_pmu, |
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| 564 | + struct evsel *evsel) |
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| 565 | +{ |
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| 566 | + u64 user_bits = 0, bits; |
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| 567 | + struct evsel_config_term *term = evsel__get_config_term(evsel, CFG_CHG); |
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| 568 | + |
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| 569 | + if (term) |
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| 570 | + user_bits = term->val.cfg_chg; |
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| 571 | + |
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| 572 | + bits = perf_pmu__format_bits(&intel_pt_pmu->format, "psb_period"); |
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| 573 | + |
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| 574 | + /* Did user change psb_period */ |
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| 575 | + if (bits & user_bits) |
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| 576 | + return; |
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| 577 | + |
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| 578 | + /* Set psb_period to 0 */ |
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| 579 | + evsel->core.attr.config &= ~bits; |
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| 580 | +} |
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| 581 | + |
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| 582 | +static void intel_pt_min_max_sample_sz(struct evlist *evlist, |
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| 583 | + size_t *min_sz, size_t *max_sz) |
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| 584 | +{ |
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| 585 | + struct evsel *evsel; |
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| 586 | + |
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| 587 | + evlist__for_each_entry(evlist, evsel) { |
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| 588 | + size_t sz = evsel->core.attr.aux_sample_size; |
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| 589 | + |
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| 590 | + if (!sz) |
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| 591 | + continue; |
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| 592 | + if (min_sz && (sz < *min_sz || !*min_sz)) |
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| 593 | + *min_sz = sz; |
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| 594 | + if (max_sz && sz > *max_sz) |
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| 595 | + *max_sz = sz; |
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| 596 | + } |
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| 597 | +} |
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| 598 | + |
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| 599 | +/* |
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| 600 | + * Currently, there is not enough information to disambiguate different PEBS |
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| 601 | + * events, so only allow one. |
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| 602 | + */ |
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| 603 | +static bool intel_pt_too_many_aux_output(struct evlist *evlist) |
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| 604 | +{ |
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| 605 | + struct evsel *evsel; |
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| 606 | + int aux_output_cnt = 0; |
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| 607 | + |
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| 608 | + evlist__for_each_entry(evlist, evsel) |
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| 609 | + aux_output_cnt += !!evsel->core.attr.aux_output; |
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| 610 | + |
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| 611 | + if (aux_output_cnt > 1) { |
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| 612 | + pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n"); |
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| 613 | + return true; |
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| 614 | + } |
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| 615 | + |
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| 616 | + return false; |
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| 557 | 617 | } |
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| 558 | 618 | |
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| 559 | 619 | static int intel_pt_recording_options(struct auxtrace_record *itr, |
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| 560 | | - struct perf_evlist *evlist, |
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| 620 | + struct evlist *evlist, |
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| 561 | 621 | struct record_opts *opts) |
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| 562 | 622 | { |
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| 563 | 623 | struct intel_pt_recording *ptr = |
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| 564 | 624 | container_of(itr, struct intel_pt_recording, itr); |
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| 565 | 625 | struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu; |
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| 566 | 626 | bool have_timing_info, need_immediate = false; |
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| 567 | | - struct perf_evsel *evsel, *intel_pt_evsel = NULL; |
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| 568 | | - const struct cpu_map *cpus = evlist->cpus; |
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| 569 | | - bool privileged = geteuid() == 0 || perf_event_paranoid() < 0; |
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| 627 | + struct evsel *evsel, *intel_pt_evsel = NULL; |
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| 628 | + const struct perf_cpu_map *cpus = evlist->core.cpus; |
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| 629 | + bool privileged = perf_event_paranoid_check(-1); |
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| 570 | 630 | u64 tsc_bit; |
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| 571 | 631 | int err; |
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| 572 | 632 | |
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| .. | .. |
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| 574 | 634 | ptr->snapshot_mode = opts->auxtrace_snapshot_mode; |
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| 575 | 635 | |
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| 576 | 636 | evlist__for_each_entry(evlist, evsel) { |
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| 577 | | - if (evsel->attr.type == intel_pt_pmu->type) { |
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| 637 | + if (evsel->core.attr.type == intel_pt_pmu->type) { |
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| 578 | 638 | if (intel_pt_evsel) { |
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| 579 | 639 | pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n"); |
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| 580 | 640 | return -EINVAL; |
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| 581 | 641 | } |
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| 582 | | - evsel->attr.freq = 0; |
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| 583 | | - evsel->attr.sample_period = 1; |
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| 642 | + evsel->core.attr.freq = 0; |
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| 643 | + evsel->core.attr.sample_period = 1; |
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| 644 | + evsel->no_aux_samples = true; |
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| 584 | 645 | intel_pt_evsel = evsel; |
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| 585 | 646 | opts->full_auxtrace = true; |
|---|
| 586 | 647 | } |
|---|
| .. | .. |
|---|
| 591 | 652 | return -EINVAL; |
|---|
| 592 | 653 | } |
|---|
| 593 | 654 | |
|---|
| 655 | + if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) { |
|---|
| 656 | + pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n"); |
|---|
| 657 | + return -EINVAL; |
|---|
| 658 | + } |
|---|
| 659 | + |
|---|
| 594 | 660 | if (opts->use_clockid) { |
|---|
| 595 | 661 | pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n"); |
|---|
| 596 | 662 | return -EINVAL; |
|---|
| 597 | 663 | } |
|---|
| 598 | 664 | |
|---|
| 665 | + if (intel_pt_too_many_aux_output(evlist)) |
|---|
| 666 | + return -EINVAL; |
|---|
| 667 | + |
|---|
| 599 | 668 | if (!opts->full_auxtrace) |
|---|
| 600 | 669 | return 0; |
|---|
| 670 | + |
|---|
| 671 | + if (opts->auxtrace_sample_mode) |
|---|
| 672 | + intel_pt_config_sample_mode(intel_pt_pmu, intel_pt_evsel); |
|---|
| 601 | 673 | |
|---|
| 602 | 674 | err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel); |
|---|
| 603 | 675 | if (err) |
|---|
| .. | .. |
|---|
| 648 | 720 | opts->auxtrace_snapshot_size, psb_period); |
|---|
| 649 | 721 | } |
|---|
| 650 | 722 | |
|---|
| 723 | + /* Set default sizes for sample mode */ |
|---|
| 724 | + if (opts->auxtrace_sample_mode) { |
|---|
| 725 | + size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist); |
|---|
| 726 | + size_t min_sz = 0, max_sz = 0; |
|---|
| 727 | + |
|---|
| 728 | + intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz); |
|---|
| 729 | + if (!opts->auxtrace_mmap_pages && !privileged && |
|---|
| 730 | + opts->mmap_pages == UINT_MAX) |
|---|
| 731 | + opts->mmap_pages = KiB(256) / page_size; |
|---|
| 732 | + if (!opts->auxtrace_mmap_pages) { |
|---|
| 733 | + size_t sz = round_up(max_sz, page_size) / page_size; |
|---|
| 734 | + |
|---|
| 735 | + opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); |
|---|
| 736 | + } |
|---|
| 737 | + if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) { |
|---|
| 738 | + pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n", |
|---|
| 739 | + max_sz, |
|---|
| 740 | + opts->auxtrace_mmap_pages * (size_t)page_size); |
|---|
| 741 | + return -EINVAL; |
|---|
| 742 | + } |
|---|
| 743 | + pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n", |
|---|
| 744 | + min_sz, max_sz); |
|---|
| 745 | + if (psb_period && |
|---|
| 746 | + min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR) |
|---|
| 747 | + ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n", |
|---|
| 748 | + min_sz, psb_period); |
|---|
| 749 | + } |
|---|
| 750 | + |
|---|
| 651 | 751 | /* Set default sizes for full trace mode */ |
|---|
| 652 | 752 | if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) { |
|---|
| 653 | 753 | if (privileged) { |
|---|
| .. | .. |
|---|
| 664 | 764 | size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size; |
|---|
| 665 | 765 | size_t min_sz; |
|---|
| 666 | 766 | |
|---|
| 667 | | - if (opts->auxtrace_snapshot_mode) |
|---|
| 767 | + if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode) |
|---|
| 668 | 768 | min_sz = KiB(4); |
|---|
| 669 | 769 | else |
|---|
| 670 | 770 | min_sz = KiB(8); |
|---|
| .. | .. |
|---|
| 676 | 776 | } |
|---|
| 677 | 777 | } |
|---|
| 678 | 778 | |
|---|
| 679 | | - intel_pt_parse_terms(&intel_pt_pmu->format, "tsc", &tsc_bit); |
|---|
| 779 | + intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, |
|---|
| 780 | + "tsc", &tsc_bit); |
|---|
| 680 | 781 | |
|---|
| 681 | | - if (opts->full_auxtrace && (intel_pt_evsel->attr.config & tsc_bit)) |
|---|
| 782 | + if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit)) |
|---|
| 682 | 783 | have_timing_info = true; |
|---|
| 683 | 784 | else |
|---|
| 684 | 785 | have_timing_info = false; |
|---|
| .. | .. |
|---|
| 687 | 788 | * Per-cpu recording needs sched_switch events to distinguish different |
|---|
| 688 | 789 | * threads. |
|---|
| 689 | 790 | */ |
|---|
| 690 | | - if (have_timing_info && !cpu_map__empty(cpus)) { |
|---|
| 791 | + if (have_timing_info && !perf_cpu_map__empty(cpus) && |
|---|
| 792 | + !record_opts__no_switch_events(opts)) { |
|---|
| 691 | 793 | if (perf_can_record_switch_events()) { |
|---|
| 692 | 794 | bool cpu_wide = !target__none(&opts->target) && |
|---|
| 693 | 795 | !target__has_task(&opts->target); |
|---|
| 694 | 796 | |
|---|
| 695 | 797 | if (!cpu_wide && perf_can_record_cpu_wide()) { |
|---|
| 696 | | - struct perf_evsel *switch_evsel; |
|---|
| 798 | + struct evsel *switch_evsel; |
|---|
| 697 | 799 | |
|---|
| 698 | 800 | err = parse_events(evlist, "dummy:u", NULL); |
|---|
| 699 | 801 | if (err) |
|---|
| 700 | 802 | return err; |
|---|
| 701 | 803 | |
|---|
| 702 | | - switch_evsel = perf_evlist__last(evlist); |
|---|
| 804 | + switch_evsel = evlist__last(evlist); |
|---|
| 703 | 805 | |
|---|
| 704 | | - switch_evsel->attr.freq = 0; |
|---|
| 705 | | - switch_evsel->attr.sample_period = 1; |
|---|
| 706 | | - switch_evsel->attr.context_switch = 1; |
|---|
| 806 | + switch_evsel->core.attr.freq = 0; |
|---|
| 807 | + switch_evsel->core.attr.sample_period = 1; |
|---|
| 808 | + switch_evsel->core.attr.context_switch = 1; |
|---|
| 707 | 809 | |
|---|
| 708 | | - switch_evsel->system_wide = true; |
|---|
| 810 | + switch_evsel->core.system_wide = true; |
|---|
| 709 | 811 | switch_evsel->no_aux_samples = true; |
|---|
| 710 | 812 | switch_evsel->immediate = true; |
|---|
| 711 | 813 | |
|---|
| 712 | | - perf_evsel__set_sample_bit(switch_evsel, TID); |
|---|
| 713 | | - perf_evsel__set_sample_bit(switch_evsel, TIME); |
|---|
| 714 | | - perf_evsel__set_sample_bit(switch_evsel, CPU); |
|---|
| 715 | | - perf_evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); |
|---|
| 814 | + evsel__set_sample_bit(switch_evsel, TID); |
|---|
| 815 | + evsel__set_sample_bit(switch_evsel, TIME); |
|---|
| 816 | + evsel__set_sample_bit(switch_evsel, CPU); |
|---|
| 817 | + evsel__reset_sample_bit(switch_evsel, BRANCH_STACK); |
|---|
| 716 | 818 | |
|---|
| 717 | 819 | opts->record_switch_events = false; |
|---|
| 718 | 820 | ptr->have_sched_switch = 3; |
|---|
| .. | .. |
|---|
| 735 | 837 | } |
|---|
| 736 | 838 | } |
|---|
| 737 | 839 | |
|---|
| 840 | + if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel && |
|---|
| 841 | + perf_can_record_text_poke_events() && perf_can_record_cpu_wide()) |
|---|
| 842 | + opts->text_poke = true; |
|---|
| 843 | + |
|---|
| 738 | 844 | if (intel_pt_evsel) { |
|---|
| 739 | 845 | /* |
|---|
| 740 | 846 | * To obtain the auxtrace buffer file descriptor, the auxtrace |
|---|
| .. | .. |
|---|
| 745 | 851 | * In the case of per-cpu mmaps, we need the CPU on the |
|---|
| 746 | 852 | * AUX event. |
|---|
| 747 | 853 | */ |
|---|
| 748 | | - if (!cpu_map__empty(cpus)) |
|---|
| 749 | | - perf_evsel__set_sample_bit(intel_pt_evsel, CPU); |
|---|
| 854 | + if (!perf_cpu_map__empty(cpus)) |
|---|
| 855 | + evsel__set_sample_bit(intel_pt_evsel, CPU); |
|---|
| 750 | 856 | } |
|---|
| 751 | 857 | |
|---|
| 752 | 858 | /* Add dummy event to keep tracking */ |
|---|
| 753 | 859 | if (opts->full_auxtrace) { |
|---|
| 754 | | - struct perf_evsel *tracking_evsel; |
|---|
| 860 | + struct evsel *tracking_evsel; |
|---|
| 755 | 861 | |
|---|
| 756 | 862 | err = parse_events(evlist, "dummy:u", NULL); |
|---|
| 757 | 863 | if (err) |
|---|
| 758 | 864 | return err; |
|---|
| 759 | 865 | |
|---|
| 760 | | - tracking_evsel = perf_evlist__last(evlist); |
|---|
| 866 | + tracking_evsel = evlist__last(evlist); |
|---|
| 761 | 867 | |
|---|
| 762 | 868 | perf_evlist__set_tracking_event(evlist, tracking_evsel); |
|---|
| 763 | 869 | |
|---|
| 764 | | - tracking_evsel->attr.freq = 0; |
|---|
| 765 | | - tracking_evsel->attr.sample_period = 1; |
|---|
| 870 | + tracking_evsel->core.attr.freq = 0; |
|---|
| 871 | + tracking_evsel->core.attr.sample_period = 1; |
|---|
| 766 | 872 | |
|---|
| 767 | 873 | tracking_evsel->no_aux_samples = true; |
|---|
| 768 | 874 | if (need_immediate) |
|---|
| 769 | 875 | tracking_evsel->immediate = true; |
|---|
| 770 | 876 | |
|---|
| 771 | 877 | /* In per-cpu case, always need the time of mmap events etc */ |
|---|
| 772 | | - if (!cpu_map__empty(cpus)) { |
|---|
| 773 | | - perf_evsel__set_sample_bit(tracking_evsel, TIME); |
|---|
| 878 | + if (!perf_cpu_map__empty(cpus)) { |
|---|
| 879 | + evsel__set_sample_bit(tracking_evsel, TIME); |
|---|
| 774 | 880 | /* And the CPU for switch events */ |
|---|
| 775 | | - perf_evsel__set_sample_bit(tracking_evsel, CPU); |
|---|
| 881 | + evsel__set_sample_bit(tracking_evsel, CPU); |
|---|
| 776 | 882 | } |
|---|
| 777 | | - perf_evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK); |
|---|
| 883 | + evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK); |
|---|
| 778 | 884 | } |
|---|
| 779 | 885 | |
|---|
| 780 | 886 | /* |
|---|
| 781 | 887 | * Warn the user when we do not have enough information to decode i.e. |
|---|
| 782 | 888 | * per-cpu with no sched_switch (except workload-only). |
|---|
| 783 | 889 | */ |
|---|
| 784 | | - if (!ptr->have_sched_switch && !cpu_map__empty(cpus) && |
|---|
| 785 | | - !target__none(&opts->target)) |
|---|
| 890 | + if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) && |
|---|
| 891 | + !target__none(&opts->target) && |
|---|
| 892 | + !intel_pt_evsel->core.attr.exclude_user) |
|---|
| 786 | 893 | ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n"); |
|---|
| 787 | 894 | |
|---|
| 788 | 895 | return 0; |
|---|
| .. | .. |
|---|
| 792 | 899 | { |
|---|
| 793 | 900 | struct intel_pt_recording *ptr = |
|---|
| 794 | 901 | container_of(itr, struct intel_pt_recording, itr); |
|---|
| 795 | | - struct perf_evsel *evsel; |
|---|
| 902 | + struct evsel *evsel; |
|---|
| 796 | 903 | |
|---|
| 797 | 904 | evlist__for_each_entry(ptr->evlist, evsel) { |
|---|
| 798 | | - if (evsel->attr.type == ptr->intel_pt_pmu->type) |
|---|
| 799 | | - return perf_evsel__disable(evsel); |
|---|
| 905 | + if (evsel->core.attr.type == ptr->intel_pt_pmu->type) |
|---|
| 906 | + return evsel__disable(evsel); |
|---|
| 800 | 907 | } |
|---|
| 801 | 908 | return -EINVAL; |
|---|
| 802 | 909 | } |
|---|
| .. | .. |
|---|
| 805 | 912 | { |
|---|
| 806 | 913 | struct intel_pt_recording *ptr = |
|---|
| 807 | 914 | container_of(itr, struct intel_pt_recording, itr); |
|---|
| 808 | | - struct perf_evsel *evsel; |
|---|
| 915 | + struct evsel *evsel; |
|---|
| 809 | 916 | |
|---|
| 810 | 917 | evlist__for_each_entry(ptr->evlist, evsel) { |
|---|
| 811 | | - if (evsel->attr.type == ptr->intel_pt_pmu->type) |
|---|
| 812 | | - return perf_evsel__enable(evsel); |
|---|
| 918 | + if (evsel->core.attr.type == ptr->intel_pt_pmu->type) |
|---|
| 919 | + return evsel__enable(evsel); |
|---|
| 813 | 920 | } |
|---|
| 814 | 921 | return -EINVAL; |
|---|
| 815 | 922 | } |
|---|
| .. | .. |
|---|
| 1074 | 1181 | return rdtsc(); |
|---|
| 1075 | 1182 | } |
|---|
| 1076 | 1183 | |
|---|
| 1077 | | -static int intel_pt_read_finish(struct auxtrace_record *itr, int idx) |
|---|
| 1078 | | -{ |
|---|
| 1079 | | - struct intel_pt_recording *ptr = |
|---|
| 1080 | | - container_of(itr, struct intel_pt_recording, itr); |
|---|
| 1081 | | - struct perf_evsel *evsel; |
|---|
| 1082 | | - |
|---|
| 1083 | | - evlist__for_each_entry(ptr->evlist, evsel) { |
|---|
| 1084 | | - if (evsel->attr.type == ptr->intel_pt_pmu->type) |
|---|
| 1085 | | - return perf_evlist__enable_event_idx(ptr->evlist, evsel, |
|---|
| 1086 | | - idx); |
|---|
| 1087 | | - } |
|---|
| 1088 | | - return -EINVAL; |
|---|
| 1089 | | -} |
|---|
| 1090 | | - |
|---|
| 1091 | 1184 | struct auxtrace_record *intel_pt_recording_init(int *err) |
|---|
| 1092 | 1185 | { |
|---|
| 1093 | 1186 | struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME); |
|---|
| .. | .. |
|---|
| 1108 | 1201 | } |
|---|
| 1109 | 1202 | |
|---|
| 1110 | 1203 | ptr->intel_pt_pmu = intel_pt_pmu; |
|---|
| 1204 | + ptr->itr.pmu = intel_pt_pmu; |
|---|
| 1111 | 1205 | ptr->itr.recording_options = intel_pt_recording_options; |
|---|
| 1112 | 1206 | ptr->itr.info_priv_size = intel_pt_info_priv_size; |
|---|
| 1113 | 1207 | ptr->itr.info_fill = intel_pt_info_fill; |
|---|
| .. | .. |
|---|
| 1117 | 1211 | ptr->itr.find_snapshot = intel_pt_find_snapshot; |
|---|
| 1118 | 1212 | ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options; |
|---|
| 1119 | 1213 | ptr->itr.reference = intel_pt_reference; |
|---|
| 1120 | | - ptr->itr.read_finish = intel_pt_read_finish; |
|---|
| 1214 | + ptr->itr.read_finish = auxtrace_record__read_finish; |
|---|
| 1215 | + /* |
|---|
| 1216 | + * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K |
|---|
| 1217 | + * should give at least 1 PSB per sample. |
|---|
| 1218 | + */ |
|---|
| 1219 | + ptr->itr.default_aux_sample_size = 4096; |
|---|
| 1121 | 1220 | return &ptr->itr; |
|---|
| 1122 | 1221 | } |
|---|