change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/include/linux/platform_data/ti-sysc.h
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@@ -1,3 +1,5 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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+
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 #ifndef __TI_SYSC_DATA_H__
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 #define __TI_SYSC_DATA_H__
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@@ -15,10 +17,12 @@
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 	TI_SYSC_OMAP4_MCASP,
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 	TI_SYSC_OMAP4_USB_HOST_FS,
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 	TI_SYSC_DRA7_MCAN,
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+	TI_SYSC_PRUSS,
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 };
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 struct ti_sysc_cookie {
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 	void *data;
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+	void *clkdm;
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 };
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 /**
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@@ -46,9 +50,28 @@
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 	s8 emufree_shift;
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 };
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-#define SYSC_QUIRK_RESOURCE_PROVIDER	BIT(9)
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-#define SYSC_QUIRK_LEGACY_IDLE		BIT(8)
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-#define SYSC_QUIRK_RESET_STATUS		BIT(7)
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+#define SYSC_QUIRK_REINIT_ON_CTX_LOST	BIT(28)
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+#define SYSC_QUIRK_REINIT_ON_RESUME	BIT(27)
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+#define SYSC_QUIRK_GPMC_DEBUG		BIT(26)
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+#define SYSC_MODULE_QUIRK_ENA_RESETDONE	BIT(25)
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+#define SYSC_MODULE_QUIRK_PRUSS		BIT(24)
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+#define SYSC_MODULE_QUIRK_DSS_RESET	BIT(23)
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+#define SYSC_MODULE_QUIRK_RTC_UNLOCK	BIT(22)
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+#define SYSC_QUIRK_CLKDM_NOAUTO		BIT(21)
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+#define SYSC_QUIRK_FORCE_MSTANDBY	BIT(20)
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+#define SYSC_MODULE_QUIRK_AESS		BIT(19)
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+#define SYSC_MODULE_QUIRK_SGX		BIT(18)
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+#define SYSC_MODULE_QUIRK_HDQ1W		BIT(17)
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+#define SYSC_MODULE_QUIRK_I2C		BIT(16)
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+#define SYSC_MODULE_QUIRK_WDT		BIT(15)
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+#define SYSS_QUIRK_RESETDONE_INVERTED	BIT(14)
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+#define SYSC_QUIRK_SWSUP_MSTANDBY	BIT(13)
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+#define SYSC_QUIRK_SWSUP_SIDLE_ACT	BIT(12)
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+#define SYSC_QUIRK_SWSUP_SIDLE		BIT(11)
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+#define SYSC_QUIRK_EXT_OPT_CLOCK	BIT(10)
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+#define SYSC_QUIRK_LEGACY_IDLE		BIT(9)
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+#define SYSC_QUIRK_RESET_STATUS		BIT(8)
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+#define SYSC_QUIRK_NO_IDLE		BIT(7)
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 #define SYSC_QUIRK_NO_IDLE_ON_INIT	BIT(6)
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 #define SYSC_QUIRK_NO_RESET_ON_INIT	BIT(5)
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 #define SYSC_QUIRK_OPT_CLKS_NEEDED	BIT(4)
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@@ -61,7 +84,7 @@
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 /**
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  * struct sysc_capabilities - capabilities for an interconnect target module
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- *
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+ * @type: sysc type identifier for the module
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  * @sysc_mask: bitmask of supported SYSCONFIG register bits
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  * @regbits: bitmask of SYSCONFIG register bits
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  * @mod_quirks: bitmask of module specific quirks
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@@ -76,8 +99,9 @@
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 /**
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  * struct sysc_config - configuration for an interconnect target module
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  * @sysc_val: configured value for sysc register
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+ * @syss_mask: configured mask value for SYSSTATUS register
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  * @midlemodes: bitmask of supported master idle modes
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- * @sidlemodes: bitmask of supported master idle modes
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+ * @sidlemodes: bitmask of supported slave idle modes
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  * @srst_udelay: optional delay needed after OCP soft reset
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  * @quirks: bitmask of enabled quirks
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  */
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@@ -121,9 +145,17 @@
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 };
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 struct device;
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+struct clk;
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 struct ti_sysc_platform_data {
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 	struct of_dev_auxdata *auxdata;
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+	bool (*soc_type_gp)(void);
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+	int (*init_clockdomain)(struct device *dev, struct clk *fck,
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+				struct clk *ick, struct ti_sysc_cookie *cookie);
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+	void (*clkdm_deny_idle)(struct device *dev,
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+				const struct ti_sysc_cookie *cookie);
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+	void (*clkdm_allow_idle)(struct device *dev,
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+				 const struct ti_sysc_cookie *cookie);
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 	int (*init_module)(struct device *dev,
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 			   const struct ti_sysc_module_data *data,
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 			   struct ti_sysc_cookie *cookie);