change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/include/linux/fsl/ptp_qoriq.h
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@@ -7,6 +7,7 @@
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 #define __PTP_QORIQ_H__
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 #include <linux/io.h>
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+#include <linux/interrupt.h>
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 #include <linux/ptp_clock_kernel.h>
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 /*
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@@ -49,7 +50,7 @@
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 	u32 tmr_etts2_l;  /* Timestamp of general purpose external trigger */
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 };
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-struct qoriq_ptp_registers {
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+struct ptp_qoriq_registers {
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 	struct ctrl_regs __iomem *ctrl_regs;
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 	struct alarm_regs __iomem *alarm_regs;
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 	struct fiper_regs __iomem *fiper_regs;
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@@ -57,15 +58,15 @@
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 };
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 /* Offset definitions for the four register groups */
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-#define CTRL_REGS_OFFSET	0x0
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-#define ALARM_REGS_OFFSET	0x40
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-#define FIPER_REGS_OFFSET	0x80
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-#define ETTS_REGS_OFFSET	0xa0
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+#define ETSEC_CTRL_REGS_OFFSET	0x0
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+#define ETSEC_ALARM_REGS_OFFSET	0x40
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+#define ETSEC_FIPER_REGS_OFFSET	0x80
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+#define ETSEC_ETTS_REGS_OFFSET	0xa0
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-#define FMAN_CTRL_REGS_OFFSET	0x80
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-#define FMAN_ALARM_REGS_OFFSET	0xb8
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-#define FMAN_FIPER_REGS_OFFSET	0xd0
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-#define FMAN_ETTS_REGS_OFFSET	0xe0
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+#define CTRL_REGS_OFFSET	0x80
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+#define ALARM_REGS_OFFSET	0xb8
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+#define FIPER_REGS_OFFSET	0xd0
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+#define ETTS_REGS_OFFSET	0xe0
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 /* Bit definitions for the TMR_CTRL register */
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@@ -120,6 +121,8 @@
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 /* Bit definitions for the TMR_STAT register */
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 #define STAT_VEC_SHIFT        (0) /* Timer general purpose status vector */
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 #define STAT_VEC_MASK         (0x3f)
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+#define ETS1_VLD              (1<<24)
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+#define ETS2_VLD              (1<<25)
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 /* Bit definitions for the TMR_PRSC register */
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 #define PRSC_OCK_SHIFT        (0) /* Output clock division/prescale factor. */
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@@ -132,38 +135,73 @@
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 #define DEFAULT_CKSEL		1
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 #define DEFAULT_TMR_PRSC	2
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 #define DEFAULT_FIPER1_PERIOD	1000000000
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-#define DEFAULT_FIPER2_PERIOD	100000
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+#define DEFAULT_FIPER2_PERIOD	1000000000
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+#define DEFAULT_FIPER3_PERIOD	1000000000
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-struct qoriq_ptp {
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+struct ptp_qoriq {
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 	void __iomem *base;
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-	struct qoriq_ptp_registers regs;
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+	struct ptp_qoriq_registers regs;
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 	spinlock_t lock; /* protects regs */
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 	struct ptp_clock *clock;
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 	struct ptp_clock_info caps;
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 	struct resource *rsrc;
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+	struct dentry *debugfs_root;
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+	struct device *dev;
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+	bool extts_fifo_support;
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+	bool fiper3_support;
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 	int irq;
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 	int phc_index;
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-	u64 alarm_interval; /* for periodic alarm */
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-	u64 alarm_value;
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 	u32 tclk_period;  /* nanoseconds */
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 	u32 tmr_prsc;
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 	u32 tmr_add;
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 	u32 cksel;
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 	u32 tmr_fiper1;
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 	u32 tmr_fiper2;
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+	u32 tmr_fiper3;
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+	u32 (*read)(unsigned __iomem *addr);
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+	void (*write)(unsigned __iomem *addr, u32 val);
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 };
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-static inline u32 qoriq_read(unsigned __iomem *addr)
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+static inline u32 qoriq_read_be(unsigned __iomem *addr)
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 {
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-	u32 val;
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-
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-	val = ioread32be(addr);
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-	return val;
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+	return ioread32be(addr);
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 }
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-static inline void qoriq_write(unsigned __iomem *addr, u32 val)
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+static inline void qoriq_write_be(unsigned __iomem *addr, u32 val)
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 {
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 	iowrite32be(val, addr);
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 }
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+static inline u32 qoriq_read_le(unsigned __iomem *addr)
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+{
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+	return ioread32(addr);
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+}
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+
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+static inline void qoriq_write_le(unsigned __iomem *addr, u32 val)
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+{
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+	iowrite32(val, addr);
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+}
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+
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+irqreturn_t ptp_qoriq_isr(int irq, void *priv);
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+int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
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+		   const struct ptp_clock_info *caps);
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+void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq);
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+int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm);
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+int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta);
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+int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts);
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+int ptp_qoriq_settime(struct ptp_clock_info *ptp,
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+		      const struct timespec64 *ts);
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+int ptp_qoriq_enable(struct ptp_clock_info *ptp,
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+		     struct ptp_clock_request *rq, int on);
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+int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event);
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+#ifdef CONFIG_DEBUG_FS
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+void ptp_qoriq_create_debugfs(struct ptp_qoriq *ptp_qoriq);
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+void ptp_qoriq_remove_debugfs(struct ptp_qoriq *ptp_qoriq);
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+#else
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+static inline void ptp_qoriq_create_debugfs(struct ptp_qoriq *ptp_qoriq)
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+{ }
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+static inline void ptp_qoriq_remove_debugfs(struct ptp_qoriq *ptp_qoriq)
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+{ }
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+#endif
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+
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 #endif