forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/drivers/video/rockchip/mpp/mpp_rkvdec.c
....@@ -36,6 +36,7 @@
3636 #include "mpp_debug.h"
3737 #include "mpp_common.h"
3838 #include "mpp_iommu.h"
39
+#include <soc/rockchip/rockchip_iommu.h>
3940 
4041 #include "hack/mpp_hack_px30.h"
4142 
....@@ -593,6 +594,7 @@
593594 		mem_region = mpp_task_attach_fd(&task->mpp_task,
594595 						scaling_fd);
595596 		if (IS_ERR(mem_region)) {
597
+			mpp_err("scaling list fd %d attach failed\n", scaling_fd);
596598 			ret = PTR_ERR(mem_region);
597599 			goto done;
598600 		}
....@@ -727,8 +729,11 @@
727729 			offset = task->reg[idx] >> 10 << 4;
728730 		}
729731 		mem_region = mpp_task_attach_fd(&task->mpp_task, fd);
730
-		if (IS_ERR(mem_region))
732
+		if (IS_ERR(mem_region)) {
733
+			mpp_err("reg[%03d]: %08x fd %d attach failed\n",
734
+				idx, task->reg[idx], fd);
731735 			return -EFAULT;
736
+		}
732737 
733738 		iova = mem_region->iova;
734739 		task->reg[idx] = iova + offset;
....@@ -887,6 +892,7 @@
887892 	int i;
888893 	u32 reg_en;
889894 	struct rkvdec_task *task = NULL;
895
+	u32 timing_en = mpp->srv->timing_en;
890896 
891897 	mpp_debug_enter();
892898 
....@@ -918,10 +924,13 @@
918924 		}
919925 		/* init current task */
920926 		mpp->cur_task = mpp_task;
927
+		mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY);
921928 		/* Flush the register before the start the device */
922929 		wmb();
923930 		mpp_write(mpp, RKVDEC_REG_INT_EN,
924931 			  task->reg[reg_en] | RKVDEC_DEC_START);
932
+
933
+		mpp_task_run_end(mpp_task, timing_en);
925934 	} break;
926935 	default:
927936 		break;
....@@ -969,6 +978,13 @@
969978 	if (task->link_mode == RKVDEC_MODE_ONEFRAME)
970979 		mpp_iommu_flush_tlb(mpp->iommu_info);
971980 
981
+	return rkvdec_run(mpp, mpp_task);
982
+}
983
+
984
+static int rkvdec_px30_run(struct mpp_dev *mpp,
985
+		    struct mpp_task *mpp_task)
986
+{
987
+	mpp_iommu_flush_tlb(mpp->iommu_info);
972988 	return rkvdec_run(mpp, mpp_task);
973989 }
974990 
....@@ -1265,6 +1281,13 @@
12651281 	return px30_workaround_combo_init(mpp);
12661282 }
12671283 
1284
+static int rkvdec_3036_init(struct mpp_dev *mpp)
1285
+{
1286
+	rkvdec_init(mpp);
1287
+	set_bit(mpp->var->device_type, &mpp->queue->dev_active_flags);
1288
+	return 0;
1289
+}
1290
+
12681291 static int rkvdec_3328_iommu_hdl(struct iommu_domain *iommu,
12691292 				 struct device *iommu_dev,
12701293 				 unsigned long iova,
....@@ -1315,7 +1338,7 @@
13151338 	struct rkvdec_dev *dec = to_rkvdec_dev(mpp);
13161339 
13171340 	mutex_init(&dec->set_clk_lock);
1318
-	dec->parent_devfreq = devfreq_get_devfreq_by_phandle(mpp->dev, 0);
1341
+	dec->parent_devfreq = devfreq_get_devfreq_by_phandle(mpp->dev, "rkvdec_devfreq", 0);
13191342 	if (IS_ERR_OR_NULL(dec->parent_devfreq)) {
13201343 		if (PTR_ERR(dec->parent_devfreq) == -EPROBE_DEFER) {
13211344 			dev_warn(mpp->dev, "parent devfreq is not ready, retry\n");
....@@ -1406,7 +1429,7 @@
14061429 		goto done;
14071430 	}
14081431 	dec->aux_iova = -1;
1409
-	mpp->iommu_info->hdl = rkvdec_3328_iommu_hdl;
1432
+	mpp->fault_handler = rkvdec_3328_iommu_hdl;
14101433 
14111434 	ret = rkvdec_devfreq_init(mpp);
14121435 done:
....@@ -1514,6 +1537,52 @@
15141537 
15151538 	dec->grf_changed = mpp_grf_is_changed(mpp->grf_info);
15161539 	mpp_set_grf(mpp->grf_info);
1540
+
1541
+	return 0;
1542
+}
1543
+
1544
+static int rkvdec_3036_set_grf(struct mpp_dev *mpp)
1545
+{
1546
+	int grf_changed;
1547
+	struct mpp_dev *loop = NULL, *n;
1548
+	struct mpp_taskqueue *queue = mpp->queue;
1549
+	bool pd_is_on;
1550
+
1551
+	grf_changed = mpp_grf_is_changed(mpp->grf_info);
1552
+	if (grf_changed) {
1553
+
1554
+		/*
1555
+		 * in this case, devices share the queue also share the same pd&clk,
1556
+		 * so use mpp->dev's pd to control all the process is okay
1557
+		 */
1558
+		pd_is_on = rockchip_pmu_pd_is_on(mpp->dev);
1559
+		if (!pd_is_on)
1560
+			rockchip_pmu_pd_on(mpp->dev);
1561
+		mpp->hw_ops->clk_on(mpp);
1562
+
1563
+		list_for_each_entry_safe(loop, n, &queue->dev_list, queue_link) {
1564
+			if (test_bit(loop->var->device_type, &queue->dev_active_flags)) {
1565
+				mpp_set_grf(loop->grf_info);
1566
+				if (loop->hw_ops->clk_on)
1567
+					loop->hw_ops->clk_on(loop);
1568
+				if (loop->hw_ops->reset)
1569
+					loop->hw_ops->reset(loop);
1570
+				rockchip_iommu_disable(loop->dev);
1571
+				if (loop->hw_ops->clk_off)
1572
+					loop->hw_ops->clk_off(loop);
1573
+				clear_bit(loop->var->device_type, &queue->dev_active_flags);
1574
+			}
1575
+		}
1576
+
1577
+		mpp_set_grf(mpp->grf_info);
1578
+		rockchip_iommu_enable(mpp->dev);
1579
+		set_bit(mpp->var->device_type, &queue->dev_active_flags);
1580
+
1581
+		mpp->hw_ops->clk_off(mpp);
1582
+		if (!pd_is_on)
1583
+			rockchip_pmu_pd_off(mpp->dev);
1584
+	}
1585
+
15171586 
15181587 	return 0;
15191588 }
....@@ -1658,18 +1727,18 @@
16581727 
16591728 static int rkvdec_sip_reset(struct mpp_dev *mpp)
16601729 {
1661
-	struct rkvdec_dev *dec = to_rkvdec_dev(mpp);
1730
+	if (IS_REACHABLE(CONFIG_ROCKCHIP_SIP)) {
1731
+		/* The reset flow in arm trustzone firmware */
1732
+		struct rkvdec_dev *dec = to_rkvdec_dev(mpp);
16621733 
1663
-/* The reset flow in arm trustzone firmware */
1664
-#if IS_ENABLED(CONFIG_ROCKCHIP_SIP)
1665
-	mutex_lock(&dec->sip_reset_lock);
1666
-	sip_smc_vpu_reset(0, 0, 0);
1667
-	mutex_unlock(&dec->sip_reset_lock);
1734
+		mutex_lock(&dec->sip_reset_lock);
1735
+		sip_smc_vpu_reset(0, 0, 0);
1736
+		mutex_unlock(&dec->sip_reset_lock);
16681737 
1669
-	return 0;
1670
-#else
1671
-	return rkvdec_reset(mpp);
1672
-#endif
1738
+		return 0;
1739
+	} else {
1740
+		return rkvdec_reset(mpp);
1741
+	}
16731742 }
16741743 
16751744 static struct mpp_hw_ops rkvdec_v1_hw_ops = {
....@@ -1691,6 +1760,17 @@
16911760 	.reduce_freq = rkvdec_reduce_freq,
16921761 	.reset = rkvdec_reset,
16931762 	.set_grf = px30_workaround_combo_switch_grf,
1763
+};
1764
+
1765
+static struct mpp_hw_ops rkvdec_3036_hw_ops = {
1766
+	.init = rkvdec_3036_init,
1767
+	.clk_on = rkvdec_clk_on,
1768
+	.clk_off = rkvdec_clk_off,
1769
+	.get_freq = rkvdec_get_freq,
1770
+	.set_freq = rkvdec_set_freq,
1771
+	.reduce_freq = rkvdec_reduce_freq,
1772
+	.reset = rkvdec_reset,
1773
+	.set_grf = rkvdec_3036_set_grf,
16941774 };
16951775 
16961776 static struct mpp_hw_ops rkvdec_3399_hw_ops = {
....@@ -1717,6 +1797,16 @@
17171797 static struct mpp_dev_ops rkvdec_v1_dev_ops = {
17181798 	.alloc_task = rkvdec_alloc_task,
17191799 	.run = rkvdec_run,
1800
+	.irq = rkvdec_irq,
1801
+	.isr = rkvdec_isr,
1802
+	.finish = rkvdec_finish,
1803
+	.result = rkvdec_result,
1804
+	.free_task = rkvdec_free_task,
1805
+};
1806
+
1807
+static struct mpp_dev_ops rkvdec_px30_dev_ops = {
1808
+	.alloc_task = rkvdec_alloc_task,
1809
+	.run = rkvdec_px30_run,
17201810 	.irq = rkvdec_irq,
17211811 	.isr = rkvdec_isr,
17221812 	.finish = rkvdec_finish,
....@@ -1773,6 +1863,14 @@
17731863 	.dev_ops = &rkvdec_v1_dev_ops,
17741864 };
17751865 
1866
+static const struct mpp_dev_var rk_hevcdec_3036_data = {
1867
+	.device_type = MPP_DEVICE_HEVC_DEC,
1868
+	.hw_info = &rk_hevcdec_hw_info,
1869
+	.trans_info = rk_hevcdec_trans,
1870
+	.hw_ops = &rkvdec_3036_hw_ops,
1871
+	.dev_ops = &rkvdec_v1_dev_ops,
1872
+};
1873
+
17761874 static const struct mpp_dev_var rk_hevcdec_3368_data = {
17771875 	.device_type = MPP_DEVICE_HEVC_DEC,
17781876 	.hw_info = &rk_hevcdec_hw_info,
....@@ -1786,7 +1884,7 @@
17861884 	.hw_info = &rk_hevcdec_hw_info,
17871885 	.trans_info = rk_hevcdec_trans,
17881886 	.hw_ops = &rkvdec_px30_hw_ops,
1789
-	.dev_ops = &rkvdec_v1_dev_ops,
1887
+	.dev_ops = &rkvdec_px30_dev_ops,
17901888 };
17911889 
17921890 static const struct mpp_dev_var rkvdec_v1_data = {
....@@ -1830,6 +1928,12 @@
18301928 	{
18311929 		.compatible = "rockchip,hevc-decoder-px30",
18321930 		.data = &rk_hevcdec_px30_data,
1931
+	},
1932
+#endif
1933
+#ifdef CONFIG_CPU_RK3036
1934
+	{
1935
+		.compatible = "rockchip,hevc-decoder-rk3036",
1936
+		.data = &rk_hevcdec_3036_data,
18331937 	},
18341938 #endif
18351939 #ifdef CONFIG_CPU_RK3368
....@@ -1877,7 +1981,7 @@
18771981 		return -ENOMEM;
18781982 
18791983 	mpp = &dec->mpp;
1880
-	platform_set_drvdata(pdev, dec);
1984
+	platform_set_drvdata(pdev, mpp);
18811985 
18821986 	if (pdev->dev.of_node) {
18831987 		match = of_match_node(mpp_rkvdec_dt_match,
....@@ -1923,28 +2027,10 @@
19232027 	return 0;
19242028 }
19252029 
1926
-static void rkvdec_shutdown(struct platform_device *pdev)
1927
-{
1928
-	int ret;
1929
-	int val;
1930
-	struct device *dev = &pdev->dev;
1931
-	struct rkvdec_dev *dec = platform_get_drvdata(pdev);
1932
-	struct mpp_dev *mpp = &dec->mpp;
1933
-
1934
-	dev_info(dev, "shutdown device\n");
1935
-
1936
-	atomic_inc(&mpp->srv->shutdown_request);
1937
-	ret = readx_poll_timeout(atomic_read,
1938
-				 &mpp->task_count,
1939
-				 val, val == 0, 20000, 200000);
1940
-	if (ret == -ETIMEDOUT)
1941
-		dev_err(dev, "wait total running time out\n");
1942
-}
1943
-
19442030 struct platform_driver rockchip_rkvdec_driver = {
19452031 	.probe = rkvdec_probe,
19462032 	.remove = rkvdec_remove,
1947
-	.shutdown = rkvdec_shutdown,
2033
+	.shutdown = mpp_dev_shutdown,
19482034 	.driver = {
19492035 		.name = RKVDEC_DRIVER_NAME,
19502036 		.of_match_table = of_match_ptr(mpp_rkvdec_dt_match),