| .. | .. |
|---|
| 1030 | 1030 | return -ENXIO; |
|---|
| 1031 | 1031 | } |
|---|
| 1032 | 1032 | |
|---|
| 1033 | | - ret = clk_prepare_enable(cclk); |
|---|
| 1034 | | - if (ret) { |
|---|
| 1035 | | - dev_err(dev, "cannot enable core clock\n"); |
|---|
| 1036 | | - return ret; |
|---|
| 1037 | | - } |
|---|
| 1038 | | - |
|---|
| 1039 | | - ret = clk_prepare_enable(iclk); |
|---|
| 1040 | | - if (ret) { |
|---|
| 1041 | | - clk_disable_unprepare(cclk); |
|---|
| 1042 | | - dev_err(dev, "cannot enable iface clock\n"); |
|---|
| 1043 | | - return ret; |
|---|
| 1044 | | - } |
|---|
| 1045 | | - |
|---|
| 1046 | 1033 | master = spi_alloc_master(dev, sizeof(struct spi_qup)); |
|---|
| 1047 | 1034 | if (!master) { |
|---|
| 1048 | | - clk_disable_unprepare(cclk); |
|---|
| 1049 | | - clk_disable_unprepare(iclk); |
|---|
| 1050 | 1035 | dev_err(dev, "cannot allocate master\n"); |
|---|
| 1051 | 1036 | return -ENOMEM; |
|---|
| 1052 | 1037 | } |
|---|
| .. | .. |
|---|
| 1092 | 1077 | spin_lock_init(&controller->lock); |
|---|
| 1093 | 1078 | init_completion(&controller->done); |
|---|
| 1094 | 1079 | |
|---|
| 1080 | + ret = clk_prepare_enable(cclk); |
|---|
| 1081 | + if (ret) { |
|---|
| 1082 | + dev_err(dev, "cannot enable core clock\n"); |
|---|
| 1083 | + goto error_dma; |
|---|
| 1084 | + } |
|---|
| 1085 | + |
|---|
| 1086 | + ret = clk_prepare_enable(iclk); |
|---|
| 1087 | + if (ret) { |
|---|
| 1088 | + clk_disable_unprepare(cclk); |
|---|
| 1089 | + dev_err(dev, "cannot enable iface clock\n"); |
|---|
| 1090 | + goto error_dma; |
|---|
| 1091 | + } |
|---|
| 1092 | + |
|---|
| 1095 | 1093 | iomode = readl_relaxed(base + QUP_IO_M_MODES); |
|---|
| 1096 | 1094 | |
|---|
| 1097 | 1095 | size = QUP_IO_M_OUTPUT_BLOCK_SIZE(iomode); |
|---|
| .. | .. |
|---|
| 1121 | 1119 | ret = spi_qup_set_state(controller, QUP_STATE_RESET); |
|---|
| 1122 | 1120 | if (ret) { |
|---|
| 1123 | 1121 | dev_err(dev, "cannot set RESET state\n"); |
|---|
| 1124 | | - goto error_dma; |
|---|
| 1122 | + goto error_clk; |
|---|
| 1125 | 1123 | } |
|---|
| 1126 | 1124 | |
|---|
| 1127 | 1125 | writel_relaxed(0, base + QUP_OPERATIONAL); |
|---|
| .. | .. |
|---|
| 1145 | 1143 | ret = devm_request_irq(dev, irq, spi_qup_qup_irq, |
|---|
| 1146 | 1144 | IRQF_TRIGGER_HIGH, pdev->name, controller); |
|---|
| 1147 | 1145 | if (ret) |
|---|
| 1148 | | - goto error_dma; |
|---|
| 1146 | + goto error_clk; |
|---|
| 1149 | 1147 | |
|---|
| 1150 | 1148 | pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC); |
|---|
| 1151 | 1149 | pm_runtime_use_autosuspend(dev); |
|---|
| .. | .. |
|---|
| 1160 | 1158 | |
|---|
| 1161 | 1159 | disable_pm: |
|---|
| 1162 | 1160 | pm_runtime_disable(&pdev->dev); |
|---|
| 1161 | +error_clk: |
|---|
| 1162 | + clk_disable_unprepare(cclk); |
|---|
| 1163 | + clk_disable_unprepare(iclk); |
|---|
| 1163 | 1164 | error_dma: |
|---|
| 1164 | 1165 | spi_qup_release_dma(master); |
|---|
| 1165 | 1166 | error: |
|---|
| 1166 | | - clk_disable_unprepare(cclk); |
|---|
| 1167 | | - clk_disable_unprepare(iclk); |
|---|
| 1168 | 1167 | spi_master_put(master); |
|---|
| 1169 | 1168 | return ret; |
|---|
| 1170 | 1169 | } |
|---|
| .. | .. |
|---|
| 1276 | 1275 | struct spi_qup *controller = spi_master_get_devdata(master); |
|---|
| 1277 | 1276 | int ret; |
|---|
| 1278 | 1277 | |
|---|
| 1279 | | - ret = pm_runtime_resume_and_get(&pdev->dev); |
|---|
| 1280 | | - if (ret < 0) |
|---|
| 1281 | | - return ret; |
|---|
| 1278 | + ret = pm_runtime_get_sync(&pdev->dev); |
|---|
| 1282 | 1279 | |
|---|
| 1283 | | - ret = spi_qup_set_state(controller, QUP_STATE_RESET); |
|---|
| 1284 | | - if (ret) |
|---|
| 1285 | | - return ret; |
|---|
| 1280 | + if (ret >= 0) { |
|---|
| 1281 | + ret = spi_qup_set_state(controller, QUP_STATE_RESET); |
|---|
| 1282 | + if (ret) |
|---|
| 1283 | + dev_warn(&pdev->dev, "failed to reset controller (%pe)\n", |
|---|
| 1284 | + ERR_PTR(ret)); |
|---|
| 1285 | + |
|---|
| 1286 | + clk_disable_unprepare(controller->cclk); |
|---|
| 1287 | + clk_disable_unprepare(controller->iclk); |
|---|
| 1288 | + } else { |
|---|
| 1289 | + dev_warn(&pdev->dev, "failed to resume, skip hw disable (%pe)\n", |
|---|
| 1290 | + ERR_PTR(ret)); |
|---|
| 1291 | + } |
|---|
| 1286 | 1292 | |
|---|
| 1287 | 1293 | spi_qup_release_dma(master); |
|---|
| 1288 | | - |
|---|
| 1289 | | - clk_disable_unprepare(controller->cclk); |
|---|
| 1290 | | - clk_disable_unprepare(controller->iclk); |
|---|
| 1291 | 1294 | |
|---|
| 1292 | 1295 | pm_runtime_put_noidle(&pdev->dev); |
|---|
| 1293 | 1296 | pm_runtime_disable(&pdev->dev); |
|---|