hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/perf/fsl_imx8_ddr_perf.c
....@@ -82,6 +82,7 @@
8282 const struct fsl_ddr_devtype_data *devtype_data;
8383 int irq;
8484 int id;
85
+ int active_counter;
8586 };
8687
8788 enum ddr_perf_filter_capabilities {
....@@ -414,6 +415,10 @@
414415
415416 ddr_perf_counter_enable(pmu, event->attr.config, counter, true);
416417
418
+ if (!pmu->active_counter++)
419
+ ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID,
420
+ EVENT_CYCLES_COUNTER, true);
421
+
417422 hwc->state = 0;
418423 }
419424
....@@ -468,6 +473,10 @@
468473 ddr_perf_counter_enable(pmu, event->attr.config, counter, false);
469474 ddr_perf_event_update(event);
470475
476
+ if (!--pmu->active_counter)
477
+ ddr_perf_counter_enable(pmu, EVENT_CYCLES_ID,
478
+ EVENT_CYCLES_COUNTER, false);
479
+
471480 hwc->state |= PERF_HES_STOPPED;
472481 }
473482
....@@ -486,25 +495,10 @@
486495
487496 static void ddr_perf_pmu_enable(struct pmu *pmu)
488497 {
489
- struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
490
-
491
- /* enable cycle counter if cycle is not active event list */
492
- if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
493
- ddr_perf_counter_enable(ddr_pmu,
494
- EVENT_CYCLES_ID,
495
- EVENT_CYCLES_COUNTER,
496
- true);
497498 }
498499
499500 static void ddr_perf_pmu_disable(struct pmu *pmu)
500501 {
501
- struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
502
-
503
- if (ddr_pmu->events[EVENT_CYCLES_COUNTER] == NULL)
504
- ddr_perf_counter_enable(ddr_pmu,
505
- EVENT_CYCLES_ID,
506
- EVENT_CYCLES_COUNTER,
507
- false);
508502 }
509503
510504 static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,